From nobody Mon Feb 9 17:57:58 2026 Received: from m16.mail.163.com (m16.mail.163.com [117.135.210.2]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 22AE618DB01; Sat, 2 Aug 2025 08:48:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=117.135.210.2 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754124529; cv=none; b=atBjKLzaneYm4probnOyvmnUvWK/uMq+RCADoOWlHGBaeMklQWBnYHQcLngeEg3lwXDBOPLKgCax3JsgiX2od4qvN75G8ha3GPcHg73d9vJl6pMtpOIPU/sB6v870EA2dt3RWFOZeVUkhxoxZRYJHSQQRX5CKjLUr1J1g4957vs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754124529; c=relaxed/simple; bh=DJRiM51sUHVMdFnuSUCnDqCrApr9XSP5DhHLcbWaI9w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uffaeXoEqnBE+hU1YoKSFbliwyqhlCPNovIBsvo+ZfPiUZXw31UDjyZTJ+5tDXqGmt2RhzHO7mpNseeduUcGI94rxCC8lbe2KnoioXQ+OeMBxdF5SlnrlnLra/5sgd953tJuwwwR0B3OkWbee/FKx9oZ6sHr/nhQqCROyrUTH4k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=bAYoUbsY; arc=none smtp.client-ip=117.135.210.2 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="bAYoUbsY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:To:Subject:Date:Message-ID:MIME-Version; bh=YG aHjg5DHhwax12wVFIRns88y7vxnsJQvKsXA6yBaOE=; b=bAYoUbsYc28jNK/YO/ Cj3QAoYnl8ikrImeSKAQ+YwRTkbjvaiqhXBjIaQhzcVI7SwKJe6e0K23ZCbYxP+z 6GJ/mzKnbl6GToMAxr6kl08ML1CRnAoYU15cFqyag4yOtwyFH3vQumunIM1i7Lm/ QQbU4S4fDAfv2csspK5U97PRc= Received: from phoenix.. (unknown []) by gzga-smtp-mtada-g0-4 (Coremail) with SMTP id _____wDX0bXE0I1oWsxLJQ--.56694S3; Sat, 02 Aug 2025 16:48:07 +0800 (CST) From: Jiawei Zhao To: ast@kernel.org Cc: daniel@iogearbox.net, andrii@kernel.org, yonghong.song@linux.dev, bpf@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 1/2] libbpf: fix USDT SIB argument handling causing unrecognized register error Date: Sat, 2 Aug 2025 08:48:02 +0000 Message-ID: <20250802084803.108777-2-phoenix500526@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250802084803.108777-1-phoenix500526@163.com> References: <20250802084803.108777-1-phoenix500526@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: _____wDX0bXE0I1oWsxLJQ--.56694S3 X-Coremail-Antispam: 1Uf129KBjvJXoWxtryfArWkXF4kJr48XryDGFg_yoW7KF4fpa y09wnayr1rJ3yS9Fn3Wa10v343Crs7Gr4rZr4xJa45ZFWxWr4UJryfKF1ayrn8GrZFyF43 ZF4FgrWfCa43Zr7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jzXdUUUUUU= X-CM-SenderInfo: pskrv0dl0viiqvswqiywtou0bp/xtbBgBmdiGiNzPBAzwABsb Content-Type: text/plain; charset="utf-8" On x86-64, USDT arguments can be specified using Scale-Index-Base (SIB) addressing, e.g. "1@-96(%rbp,%rax,8)". The current USDT implementation in libbpf cannot parse this format, causing `bpf_program__attach_usdt()` to fail with -ENOENT (unrecognized register). This patch fixes this by implementing the necessary changes: - add correct handling for SIB-addressed arguments in `bpf_usdt_arg`. - add adaptive support to `__bpf_usdt_arg_type` and `__bpf_usdt_arg_spec` to represent SIB addressing parameters. Signed-off-by: Jiawei Zhao --- tools/lib/bpf/usdt.bpf.h | 33 +++++++++++++++++++++++++++++- tools/lib/bpf/usdt.c | 43 ++++++++++++++++++++++++++++++++++------ 2 files changed, 69 insertions(+), 7 deletions(-) diff --git a/tools/lib/bpf/usdt.bpf.h b/tools/lib/bpf/usdt.bpf.h index 2a7865c8e3fe..246513088c3a 100644 --- a/tools/lib/bpf/usdt.bpf.h +++ b/tools/lib/bpf/usdt.bpf.h @@ -34,6 +34,7 @@ enum __bpf_usdt_arg_type { BPF_USDT_ARG_CONST, BPF_USDT_ARG_REG, BPF_USDT_ARG_REG_DEREF, + BPF_USDT_ARG_SIB, }; =20 struct __bpf_usdt_arg_spec { @@ -43,6 +44,10 @@ struct __bpf_usdt_arg_spec { enum __bpf_usdt_arg_type arg_type; /* offset of referenced register within struct pt_regs */ short reg_off; + /* offset of index register in pt_regs, only used in SIB mode */ + short idx_reg_off; + /* scale factor for index register, only used in SIB mode */ + short scale; /* whether arg should be interpreted as signed value */ bool arg_signed; /* number of bits that need to be cleared and, optionally, @@ -149,7 +154,7 @@ int bpf_usdt_arg(struct pt_regs *ctx, __u64 arg_num, lo= ng *res) { struct __bpf_usdt_spec *spec; struct __bpf_usdt_arg_spec *arg_spec; - unsigned long val; + unsigned long val, idx; int err, spec_id; =20 *res =3D 0; @@ -202,6 +207,32 @@ int bpf_usdt_arg(struct pt_regs *ctx, __u64 arg_num, l= ong *res) return err; #if __BYTE_ORDER__ =3D=3D __ORDER_BIG_ENDIAN__ val >>=3D arg_spec->arg_bitshift; +#endif + break; + case BPF_USDT_ARG_SIB: + /* Arg is in memory addressed by SIB (Scale-Index-Base) mode + * (e.g., "-1@-96(%rbp,%rax,8)" in USDT arg spec). Register + * is identified like with BPF_USDT_ARG_SIB case, the offset + * is in arg_spec->val_off, the scale factor is in arg_spec->scale. + * Firstly, we fetch the base register contents and the index + * register contents from pt_regs. Secondly, we multiply the + * index register contents by the scale factor, then add the + * base address and the offset to get the final address. Finally, + * we do another user-space probe read to fetch argument value + * itself. + */ + err =3D bpf_probe_read_kernel(&val, sizeof(val), (void *)ctx + arg_spec-= >reg_off); + if (err) + return err; + err =3D bpf_probe_read_kernel(&idx, sizeof(idx), (void *)ctx + arg_spec-= >idx_reg_off); + if (err) + return err; + err =3D bpf_probe_read_user(&val, sizeof(val), + (void *)val + idx * arg_spec->scale + arg_spec->val_off); + if (err) + return err; +#if __BYTE_ORDER__ =3D=3D __ORDER_BIG_ENDIAN__ + val >>=3D arg_spec->arg_bitshift; #endif break; default: diff --git a/tools/lib/bpf/usdt.c b/tools/lib/bpf/usdt.c index 4e4a52742b01..1f8b9e1c9819 100644 --- a/tools/lib/bpf/usdt.c +++ b/tools/lib/bpf/usdt.c @@ -200,6 +200,7 @@ enum usdt_arg_type { USDT_ARG_CONST, USDT_ARG_REG, USDT_ARG_REG_DEREF, + USDT_ARG_SIB, }; =20 /* should match exactly struct __bpf_usdt_arg_spec from usdt.bpf.h */ @@ -207,6 +208,8 @@ struct usdt_arg_spec { __u64 val_off; enum usdt_arg_type arg_type; short reg_off; + short idx_reg_off; + short scale; bool arg_signed; char arg_bitshift; }; @@ -1283,11 +1286,39 @@ static int calc_pt_regs_off(const char *reg_name) =20 static int parse_usdt_arg(const char *arg_str, int arg_num, struct usdt_ar= g_spec *arg, int *arg_sz) { - char reg_name[16]; - int len, reg_off; - long off; + char reg_name[16] =3D {0}, idx_reg_name[16] =3D {0}; + int len, reg_off, idx_reg_off, scale =3D 1; + long off =3D 0; + + if (sscanf(arg_str, " %d @ %ld ( %%%15[^,] , %%%15[^,] , %d ) %n", + arg_sz, &off, reg_name, idx_reg_name, &scale, &len) =3D=3D 5 || + sscanf(arg_str, " %d @ ( %%%15[^,] , %%%15[^,] , %d ) %n", + arg_sz, reg_name, idx_reg_name, &scale, &len) =3D=3D 4 || + sscanf(arg_str, " %d @ %ld ( %%%15[^,] , %%%15[^)] ) %n", + arg_sz, &off, reg_name, idx_reg_name, &len) =3D=3D 4 || + sscanf(arg_str, " %d @ ( %%%15[^,] , %%%15[^)] ) %n", + arg_sz, reg_name, idx_reg_name, &len) =3D=3D 3 + ) { + /* Scale Index Base case, e.g., 1@-96(%rbp,%rax,8) + * 1@(%rbp,%rax,8) + * 1@-96(%rbp,%rax) + * 1@(%rbp,%rax) + */ + arg->arg_type =3D USDT_ARG_SIB; + arg->val_off =3D off; + arg->scale =3D scale; + + reg_off =3D calc_pt_regs_off(reg_name); + if (reg_off < 0) + return reg_off; + arg->reg_off =3D reg_off; =20 - if (sscanf(arg_str, " %d @ %ld ( %%%15[^)] ) %n", arg_sz, &off, reg_name,= &len) =3D=3D 3) { + idx_reg_off =3D calc_pt_regs_off(idx_reg_name); + if (idx_reg_off < 0) + return idx_reg_off; + arg->idx_reg_off =3D idx_reg_off; + } else if (sscanf(arg_str, " %d @ %ld ( %%%15[^)] ) %n", + arg_sz, &off, reg_name, &len) =3D=3D 3) { /* Memory dereference case, e.g., -4@-20(%rbp) */ arg->arg_type =3D USDT_ARG_REG_DEREF; arg->val_off =3D off; @@ -1298,7 +1329,7 @@ static int parse_usdt_arg(const char *arg_str, int ar= g_num, struct usdt_arg_spec } else if (sscanf(arg_str, " %d @ ( %%%15[^)] ) %n", arg_sz, reg_name, &l= en) =3D=3D 2) { /* Memory dereference case without offset, e.g., 8@(%rsp) */ arg->arg_type =3D USDT_ARG_REG_DEREF; - arg->val_off =3D 0; + arg->val_off =3D off; reg_off =3D calc_pt_regs_off(reg_name); if (reg_off < 0) return reg_off; @@ -1306,7 +1337,7 @@ static int parse_usdt_arg(const char *arg_str, int ar= g_num, struct usdt_arg_spec } else if (sscanf(arg_str, " %d @ %%%15s %n", arg_sz, reg_name, &len) =3D= =3D 2) { /* Register read case, e.g., -4@%eax */ arg->arg_type =3D USDT_ARG_REG; - arg->val_off =3D 0; + arg->val_off =3D off; =20 reg_off =3D calc_pt_regs_off(reg_name); if (reg_off < 0) --=20 2.43.0 From nobody Mon Feb 9 17:57:58 2026 Received: from m16.mail.163.com (m16.mail.163.com [117.135.210.3]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E9652188CC9; Sat, 2 Aug 2025 08:48:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=117.135.210.3 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754124528; cv=none; b=mbwofYcNNgDcsyl7HJpn72X4fQXMyE65iWefl47rL5+LduBuvLCm52jNC6Wva5ABNCt2c4WtsUifjM2bm5Qd+Buw2pbArtuvjiA6dn5/8dB9+GfC90+gSrlbOqMDT5SEgO+tj4QZnAdxWRrQtTPBodcQl1QhFLE7NK+pPBgqjXs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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bh=ht j7auQ2DJotB/9/cDAg+sQhVrxsQ5LPGiEPy66on4E=; b=PYhV47+l2srGQVZ7af ODjv5Ohf+U6IkOH8oMfPIWzAVWYe5xZhKE+AZtU9zA0r0wthjIDZy8V2kO+dnjcq HSDL6kjCDpU0LqtGMPGlpHHw9V/ulN32UcRbQHmjljUqDA3RObLa378btRef4oBg ZO/thLHaN3HkG6wdBzZmiOqec= Received: from phoenix.. (unknown []) by gzga-smtp-mtada-g0-4 (Coremail) with SMTP id _____wDX0bXE0I1oWsxLJQ--.56694S4; Sat, 02 Aug 2025 16:48:07 +0800 (CST) From: Jiawei Zhao To: ast@kernel.org Cc: daniel@iogearbox.net, andrii@kernel.org, yonghong.song@linux.dev, bpf@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v6 2/2] selftests/bpf: Force -O2 for USDT selftests to cover SIB handling logic Date: Sat, 2 Aug 2025 08:48:03 +0000 Message-ID: <20250802084803.108777-3-phoenix500526@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250802084803.108777-1-phoenix500526@163.com> References: <20250802084803.108777-1-phoenix500526@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: _____wDX0bXE0I1oWsxLJQ--.56694S4 X-Coremail-Antispam: 1Uf129KBjvJXoWxWw4ktFy5WrWDCF4kGw48JFb_yoW5tw45pa 95Ww1UtFySq3W7JFs3ZrnrXr45WFs7JFWFyr1UXryFvr4kJF97XFZ7t3yUKFnxW393Xaya v392gry7GF45AwUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jzUDJUUUUU= X-CM-SenderInfo: pskrv0dl0viiqvswqiywtou0bp/1tbiFAGdiGiNynRtRQAAsz Content-Type: text/plain; charset="utf-8" When using GCC on x86-64 to compile an usdt prog with -O1 or higher optimization, the compiler will generate SIB addressing mode for global array and PC-relative addressing mode for global variable, e.g. "1@-96(%rbp,%rax,8)" and "-1@4+t1(%rip)". In this patch: - force -O2 optimization for usdt.test.o to generate SIB addressing usdt argument spec. - change the global variable t1 to a local variable, to avoid compiler generating PC-relative addressing mode for it. Signed-off-by: Jiawei Zhao --- tools/testing/selftests/bpf/Makefile | 8 ++++++++ tools/testing/selftests/bpf/prog_tests/usdt.c | 18 ++++++++++++------ 2 files changed, 20 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/bpf/Makefile b/tools/testing/selftests= /bpf/Makefile index 910d8d6402ef..4b77d06d5c42 100644 --- a/tools/testing/selftests/bpf/Makefile +++ b/tools/testing/selftests/bpf/Makefile @@ -759,6 +759,14 @@ TRUNNER_BPF_BUILD_RULE :=3D $$(error no BPF objects sh= ould be built) TRUNNER_BPF_CFLAGS :=3D $(eval $(call DEFINE_TEST_RUNNER,test_maps)) =20 +# Force usdt.c to use -O2 optimization to generate SIB addressing +# Only apply on x86 architecture where SIB addressing is relevant +ifeq ($(ARCH), x86) +$(OUTPUT)/usdt.test.o: CFLAGS:=3D$(subst O0,O2,$(CFLAGS)) +$(OUTPUT)/cpuv4/usdt.test.o: CFLAGS:=3D$(subst O0,O2,$(CFLAGS)) +$(OUTPUT)/no_alu32/usdt.test.o: CFLAGS:=3D$(subst O0,O2,$(CFLAGS)) +endif + # Define test_verifier test runner. # It is much simpler than test_maps/test_progs and sufficiently different = from # them (e.g., test.h is using completely pattern), that it's worth just diff --git a/tools/testing/selftests/bpf/prog_tests/usdt.c b/tools/testing/= selftests/bpf/prog_tests/usdt.c index 495d66414b57..86f354d25aef 100644 --- a/tools/testing/selftests/bpf/prog_tests/usdt.c +++ b/tools/testing/selftests/bpf/prog_tests/usdt.c @@ -14,10 +14,15 @@ static volatile int idx =3D 2; static volatile __u64 bla =3D 0xFEDCBA9876543210ULL; static volatile short nums[] =3D {-1, -2, -3, -4}; =20 -static volatile struct { - int x; - signed char y; -} t1 =3D { 1, -127 }; +/* + * TODO: At O2 optimization level, t1's USDT argument spec becomes -1@4+t= 1(%rip). + * Since libbpf doesn't support RIP addressing mode yet, this causes "unre= cognized register" errors. + * This test will be re-enabled once libbpf supports RIP addressing mode. + */ +// static volatile struct { +// int x; +// signed char y; +// } t1 =3D { 1, -127 }; =20 #define SEC(name) __attribute__((section(name), used)) =20 @@ -27,6 +32,7 @@ unsigned short test_usdt12_semaphore SEC(".probes"); =20 static void __always_inline trigger_func(int x) { long y =3D 42; + signed char t1 =3D -127; =20 if (test_usdt0_semaphore) STAP_PROBE(test, usdt0); @@ -36,7 +42,7 @@ static void __always_inline trigger_func(int x) { STAP_PROBE12(test, usdt12, x, x + 1, y, x + y, 5, y / 7, bla, &bla, -9, nums[x], - nums[idx], t1.y); + nums[idx], t1); } } =20 @@ -106,7 +112,7 @@ static void subtest_basic_usdt(void) ASSERT_EQ(bss->usdt12_args[8], -9, "usdt12_arg9"); ASSERT_EQ(bss->usdt12_args[9], nums[1], "usdt12_arg10"); ASSERT_EQ(bss->usdt12_args[10], nums[idx], "usdt12_arg11"); - ASSERT_EQ(bss->usdt12_args[11], t1.y, "usdt12_arg12"); + ASSERT_EQ(bss->usdt12_args[11], -127, "usdt12_arg12"); =20 int usdt12_expected_arg_sizes[12] =3D { 4, 4, 8, 8, 4, 8, 8, 8, 4, 2, 2, = 1 }; =20 --=20 2.43.0