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Fri, 1 Aug 2025 02:58:04 -0700 From: Haotien Hsu To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , "Jonathan Hunter" , Mathias Nyman , "Brad Griffis" , Sumit Gupta , "Vedant Deshpande" , Akhil R , Jinjie Ruan , , , , CC: Haotien Hsu , Henry Lin , "Jui Chang Kuo" , Wayne Chang , WK Tsai Subject: [PATCH 1/4] dt-bindings: usb: Add wake-up support for Tegra234 XUSB host controller Date: Fri, 1 Aug 2025 17:57:45 +0800 Message-ID: <20250801095748.385437-2-haotienh@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250801095748.385437-1-haotienh@nvidia.com> References: <20250801095748.385437-1-haotienh@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00026369:EE_|DM4PR12MB5915:EE_ X-MS-Office365-Filtering-Correlation-Id: 2d0635cd-ad52-49bc-953c-08ddd0e20167 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|1800799024|7416014|376014|921020; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Aug 2025 09:58:45.8522 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2d0635cd-ad52-49bc-953c-08ddd0e20167 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00026369.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5915 Content-Type: text/plain; charset="utf-8" Populate USB wake events for Tegra234 XUSB host controller. These wake-up events are optional to maintain backward compatibility and because the USB controller does not require them for normal operation. Signed-off-by: Haotien Hsu Acked-by: Conor Dooley --- .../bindings/usb/nvidia,tegra234-xusb.yaml | 28 +++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yam= l b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml index db761dcbf72a..6365c6647cd7 100644 --- a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml @@ -32,9 +32,32 @@ properties: - const: bar2 =20 interrupts: + minItems: 2 items: - description: xHCI host interrupt - description: mailbox interrupt + - description: USB wake event 0 + - description: USB wake event 1 + - description: USB wake event 2 + - description: USB wake event 3 + - description: USB wake event 4 + - description: USB wake event 5 + - description: USB wake event 6 + description: | + The first two interrupts are required for the USB host controller. T= he remaining USB wake + event interrupts are optional. Each USB wake event is independent; i= t is not necessary to use + all of these events on a platform. The USB host controller can funct= ion even if no wake-up + events are defined. The USB wake event interrupts are handled by the= Tegra PMC; hence, the + interrupt controller for these is the PMC and the interrupt IDs corr= espond to the PMC wake + event IDs. A complete list of wake event IDs is provided below, and = this information is also + present in the Tegra TRM document. + PMC wake-up 76 for USB3 port 0 wakeup + PMC wake-up 77 for USB3 port 1 wakeup + PMC wake-up 78 for USB3 port 2 and port 3 wakeup + PMC wake-up 79 for USB2 port 0 wakeup + PMC wake-up 80 for USB2 port 1 wakeup + PMC wake-up 81 for USB2 port 2 wakeup + PMC wake-up 82 for USB2 port 3 wakeup =20 clocks: items: @@ -127,8 +150,9 @@ examples: <0x03650000 0x10000>; reg-names =3D "hcd", "fpci", "bar2"; =20 - interrupts =3D , - ; + interrupts-extended =3D <&gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <&pmc 76 IRQ_TYPE_LEVEL_HIGH>; =20 clocks =3D <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>, <&bpmp TEGRA234_CLK_XUSB_FALCON>, --=20 2.34.1