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charset="utf-8" For Qualcomm SoCs which needs level shifter for SD card, extra delay is seen on receiver data path. To compensate this delay enable tuning for SDR50 mode for targets which has level shifter. SDHCI_SDR50_NEEDS_TUNING caps will be set for targets with level shifter on Qualcomm SOC's. Signed-off-by: Sarthak Garg Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-msm.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 66c0d1ba2a33..bf91cb96a0ea 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -81,6 +81,7 @@ #define CORE_IO_PAD_PWR_SWITCH_EN BIT(15) #define CORE_IO_PAD_PWR_SWITCH BIT(16) #define CORE_HC_SELECT_IN_EN BIT(18) +#define CORE_HC_SELECT_IN_SDR50 (4 << 19) #define CORE_HC_SELECT_IN_HS400 (6 << 19) #define CORE_HC_SELECT_IN_MASK (7 << 19) =20 @@ -1133,6 +1134,10 @@ static bool sdhci_msm_is_tuning_needed(struct sdhci_= host *host) { struct mmc_ios *ios =3D &host->mmc->ios; =20 + if (ios->timing =3D=3D MMC_TIMING_UHS_SDR50 && + host->flags & SDHCI_SDR50_NEEDS_TUNING) + return true; + /* * Tuning is required for SDR104, HS200 and HS400 cards and * if clock frequency is greater than 100MHz in these modes. @@ -1201,6 +1206,8 @@ static int sdhci_msm_execute_tuning(struct mmc_host *= mmc, u32 opcode) struct mmc_ios ios =3D host->mmc->ios; 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charset="utf-8" Some platforms may require limiting the maximum frequency used in SD High-Speed (HS) mode due to board-level hardware constraints. For example, certain boards may include level shifters or other components that cannot reliably operate at the default 50 MHz HS frequency. Introduce a new optional device tree property max-sd-hs-frequency to limit the maximum frequency (in Hz) used for SD cards operating in High-Speed (HS) mode. Signed-off-by: Sarthak Garg --- .../devicetree/bindings/mmc/mmc-controller-common.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller-common.ya= ml b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml index 9a7235439759..6c2529b976d1 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller-common.yaml @@ -93,6 +93,16 @@ properties: minimum: 400000 maximum: 384000000 =20 + max-sd-hs-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Maximum frequency (in Hz) to be used for SD cards operating in + High-Speed (HS) mode. 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charset="utf-8" Introduce a new device tree flag to cap the maximum High-Speed (HS) mode frequency for SD cards, accommodating board-specific constraints such as the inclusion of a level shifter which cannot support the default 50Mhz HS frequency and others. Signed-off-by: Sarthak Garg --- drivers/mmc/core/host.c | 2 ++ drivers/mmc/core/sd.c | 2 +- include/linux/mmc/host.h | 1 + 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index dacb5bd9bb71..7892e80bc073 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c @@ -302,6 +302,8 @@ int mmc_of_parse(struct mmc_host *host) /* f_max is obtained from the optional "max-frequency" property */ device_property_read_u32(dev, "max-frequency", &host->f_max); =20 + device_property_read_u32(dev, "max-sd-hs-frequency", &host->max_sd_hs_fre= q); + /* * Configure CD and WP pins. They are both by default active low to * match the SDHCI spec. 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charset="utf-8" The kernel now handles level shifter limitations affecting SD card modes, making it unnecessary to explicitly disable SDR104 and SDR50 capabilities in the device tree. However, due to board-specific hardware constraints particularly related to level shifter in this case the maximum frequency for SD High-Speed (HS) mode must be limited to 37.5 MHz to ensure reliable operation of SD card in HS mode. This is achieved using the max-sd-hs-frequency property in the board DTS. Signed-off-by: Sarthak Garg --- arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 1 + arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts | 1 + arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- 4 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/= qcom/sm8550-hdk.dts index 29bc1ddfc7b2..a6bc3c11598b 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts @@ -1164,6 +1164,7 @@ &sdhc_2 { vmmc-supply =3D <&vreg_l9b_2p9>; vqmmc-supply =3D <&vreg_l8b_1p8>; =20 + max-sd-hs-frequency =3D <37500000>; bus-width =3D <4>; no-sdio; no-mmc; diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/= qcom/sm8550-mtp.dts index 5648ab60ba4c..166d3595633d 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts @@ -818,6 +818,7 @@ &sdhc_2 { pinctrl-1 =3D <&sdc2_sleep &sdc2_card_det_n>; vmmc-supply =3D <&vreg_l9b_2p9>; vqmmc-supply =3D <&vreg_l8b_1p8>; + max-sd-hs-frequency =3D <37500000>; bus-width =3D <4>; no-sdio; no-mmc; diff --git a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts b/= arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts index d90dc7b37c4a..039ead5b8784 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts @@ -716,6 +716,7 @@ &sdhc_2 { pinctrl-names =3D "default", "sleep"; vmmc-supply =3D <&pm8550_l9>; vqmmc-supply =3D <&pm8550_l8>; + max-sd-hs-frequency =3D <37500000>; no-sdio; no-mmc; status =3D "okay"; diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qco= m/sm8550.dtsi index 82cabf777cd2..bc7c4b77f277 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -3191,9 +3191,6 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, bus-width =3D <4>; dma-coherent; =20 - /* Forbid SDR104/SDR50 - broken hw! */ - sdhci-caps-mask =3D <0x3 0>; - status =3D "disabled"; =20 sdhc2_opp_table: opp-table { --=20 2.34.1