From nobody Sun Oct 5 18:14:31 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D34DC233158; Thu, 31 Jul 2025 12:08:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753963715; cv=none; b=qOGsYUKEmr0mTXszxneFUMzYWt36LkaupLh/mYpQG1upzyJzC7h0palxZuaWRDg2oqFf76HRNcG2G83TAI1R+euX4FG27T5C/ZwgFTnd5tWLzyfCvydCczcAAzHS8tA8phgMql5c3YmhDboMAYfST+EF4ztjAEFJYpzk1CrXXTs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753963715; c=relaxed/simple; bh=CnrG0NW6RrCrnMU3nt86I14SqWszkJRx0k1q2LjVyqY=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=DOi1XKuOyUtfJOegC1utwfnM/PodtO852cSFol4hb3YeaWLS/1n6d2AKYConA6Ul+/KS3SgUtEoB/gzmb8E8R5q/47imPd03LgT+1AWFxD1cBNvnOrfSLeLKdUK9JO3sRJ7r4GtedjBac03R1/hl+XE9mgy78MxWSngM8hgNA2A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=S+ASQAb8; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="S+ASQAb8" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 56VC8FOJ3025590; Thu, 31 Jul 2025 07:08:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1753963695; bh=+WVY+FchNflwyhjUu1n/fND1UpVRfjWqymxZncmzm3A=; h=From:To:CC:Subject:Date; b=S+ASQAb8SHTApNSeI96umGhd0hiBOwGZH/GANo5fM89vk/mCjw8Xl/6h34M4RJgaV xx8D//ni7/ThL/y/i0qnfjnxVFDQzHXtJ3ZcVRzTEpn6VxGoFk4KeNxkOmo//HxsrV XknKui3i3S1DWFVO+TzeZyzHvbvM+j4CtxRFYoi8= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 56VC8FXl014082 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Thu, 31 Jul 2025 07:08:15 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Thu, 31 Jul 2025 07:08:15 -0500 Received: from fllvem-mr08.itg.ti.com (10.64.41.88) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Thu, 31 Jul 2025 07:08:15 -0500 Received: from fllv0122.itg.ti.com (fllv0122.itg.ti.com [10.247.120.72]) by fllvem-mr08.itg.ti.com (8.18.1/8.18.1) with ESMTP id 56VC8Fqh3405092; Thu, 31 Jul 2025 07:08:15 -0500 Received: from localhost (danish-tpc.dhcp.ti.com [172.24.231.152]) by fllv0122.itg.ti.com (8.14.7/8.14.7) with ESMTP id 56VC8E1t016802; Thu, 31 Jul 2025 07:08:14 -0500 From: MD Danish Anwar To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Meghana Malladi , Himanshu Mittal , Ravi Gunasekaran CC: , , , , Vignesh Raghavendra , Roger Quadros , Subject: [PATCH net] net: ti: icssg-prueth: Fix emac link speed handling Date: Thu, 31 Jul 2025 17:38:12 +0530 Message-ID: <20250731120812.1606839-1-danishanwar@ti.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" When link settings are changed emac->speed is populated by emac_adjust_link(). The link speed and other settings are then written into the DRAM. However if both ports are brought down after this and brought up again or if the operating mode is changed and a firmware reload is needed, the DRAM is cleared by icssg_config(). As a result the link settings are lost. Fix this by calling emac_adjust_link() after icssg_config(). This re populates the settings in the DRAM after a new firmware load. Fixes: 9facce84f406 ("net: ti: icssg-prueth: Fix firmware load sequence.") Signed-off-by: MD Danish Anwar --- NOTE: emac_adjust_link() is defined after prueth_emac_common_start() as a result to call this from prueth_emac_common_start() I am using forward declaration of the function. The other alternate is to move the definition of emac_adjust_link() before prueth_emac_common_start(). drivers/net/ethernet/ti/icssg/icssg_prueth.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/ti/icssg/icssg_prueth.c b/drivers/net/eth= ernet/ti/icssg/icssg_prueth.c index 2b973d6e2341..8ca0ea768e16 100644 --- a/drivers/net/ethernet/ti/icssg/icssg_prueth.c +++ b/drivers/net/ethernet/ti/icssg/icssg_prueth.c @@ -50,6 +50,8 @@ /* CTRLMMR_ICSSG_RGMII_CTRL register bits */ #define ICSSG_CTRL_RGMII_ID_MODE BIT(24) =20 +static void emac_adjust_link(struct net_device *ndev); + static int emac_get_tx_ts(struct prueth_emac *emac, struct emac_tx_ts_response *rsp) { @@ -229,6 +231,7 @@ static int prueth_emac_common_start(struct prueth *prue= th) ret =3D icssg_config(prueth, emac, slice); if (ret) goto disable_class; + emac_adjust_link(emac->ndev); } =20 ret =3D prueth_emac_start(prueth); base-commit: 759dfc7d04bab1b0b86113f1164dc1fec192b859 --=20 2.34.1