From nobody Sun Oct 5 18:20:49 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CCFDA8F66 for ; Thu, 31 Jul 2025 12:23:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753964638; cv=none; b=E+27aH4YatdWMfhyKOiYEzVIaXAt1u4WUqOuvt+R0Q28gHX9kqnpS+5546hqKy5eIcWReTcKNSO80+BFrhYASXpeY6n+7ESZQC8fhUC7AfpnldlbP1DVKyR4t3eR8mQqpRKlgL6NztS0+5MeMr7vpp5xnS0R3dwiCsHJvfFSO4k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753964638; c=relaxed/simple; bh=32YBZVpnq5FoHjaGA4Y0J5jJQ8sAi9FM2wJFn8p9BiY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ETKo0InL8liuhfsIy7JRUjWa62lYv3PRdqGNN2hktQbHGSp8OetWpWmRqPOAf1NEJpa5hmmRKbu3QlpUvkImnXk6Z0ltH8Il5oYs1HSm4eFUDUL0s4yv1od7Lovc/kvbBG+loADTUgxRrx7zXX7hAhOCYFExjw2FkbEl5mXsQGc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0AE612C41; Thu, 31 Jul 2025 05:23:48 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 69BCA3F673; Thu, 31 Jul 2025 05:23:54 -0700 (PDT) From: Leo Yan Date: Thu, 31 Jul 2025 13:23:38 +0100 Subject: [PATCH v6 02/10] coresight: catu: Support atclk Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250731-arm_cs_fix_clock_v4-v6-2-1dfe10bb3f6f@arm.com> References: <20250731-arm_cs_fix_clock_v4-v6-0-1dfe10bb3f6f@arm.com> In-Reply-To: <20250731-arm_cs_fix_clock_v4-v6-0-1dfe10bb3f6f@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Yeoreum Yun , Alexander Shishkin , Greg Kroah-Hartman , Mark Brown Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753964630; l=2806; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=32YBZVpnq5FoHjaGA4Y0J5jJQ8sAi9FM2wJFn8p9BiY=; b=Txoj5ztL+U6zLYwQwYDKI82ZQMH3VC8kBd+sHj4jEsBwt+T5473czgVPrapRih1eCkvRI0X+m gasl89v68Y2DOTUeA/YZdgqHRvNeW7ERmSrUO3GrCx9fYD8OJsF6TR+ X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= The atclk is an optional clock for the CoreSight CATU, but the driver misses to initialize it. This change enables atclk in probe of the CATU driver, and dynamically control the clock during suspend and resume. The checks for driver data and clocks in suspend and resume are not needed, remove them. Add error handling in the resume function. Fixes: fcacb5c154ba ("coresight: Introduce support for Coresight Address Tr= anslation Unit") Reviewed-by: Anshuman Khandual Reviewed-by: Yeoreum Yun Tested-by: James Clark Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-catu.c | 22 +++++++++++++++++----- drivers/hwtracing/coresight/coresight-catu.h | 1 + 2 files changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtraci= ng/coresight/coresight-catu.c index 5058432233da1932f1965008fc1b98b560490414..af2a55f0c907c392d092a50612b= 23c115a1b0f5f 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -520,6 +520,10 @@ static int __catu_probe(struct device *dev, struct res= ource *res) struct coresight_platform_data *pdata =3D NULL; void __iomem *base; =20 + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); + catu_desc.name =3D coresight_alloc_device_name(&catu_devs, dev); if (!catu_desc.name) return -ENOMEM; @@ -668,18 +672,26 @@ static int catu_runtime_suspend(struct device *dev) { struct catu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); + return 0; } =20 static int catu_runtime_resume(struct device *dev) { struct catu_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); - return 0; + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; + + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-catu.h b/drivers/hwtraci= ng/coresight/coresight-catu.h index 755776cd19c5bb724845ca586ace1e0b29e72556..6e6b7aac206dcae9ff062355e50= 179637b4d1703 100644 --- a/drivers/hwtracing/coresight/coresight-catu.h +++ b/drivers/hwtracing/coresight/coresight-catu.h @@ -62,6 +62,7 @@ =20 struct catu_drvdata { struct clk *pclk; + struct clk *atclk; void __iomem *base; struct coresight_device *csdev; int irq; --=20 2.34.1