From nobody Sun Oct 5 18:20:50 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0979B239E7C for ; Thu, 31 Jul 2025 12:23:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753964636; cv=none; b=rG7R95iHCx7ugTYXfKiym/odjUNpME/cvt5IFqptGWBqvsowRYCaCpj+R5Dmd+T9WmZqWBKOifeWiaMr9omhsVZBl4RdXHmmDn7KMqB/jXFCBeJgWhvafkpZtwXPJFqnxm2jspSK4vmJ+FgPOeFD4Zp76a4o0jPRDFCTl8Tgo3I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753964636; c=relaxed/simple; bh=WOy52O3owryCLLjZCAAcK0OIaY0xmsPZ2HMMUD2bKhM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lI7K41I1qT2H2rl3t1bMxE2g0icRAC4JvDpac0LXn/yXfD/SKslvN7CYY3z9j+OWVa/9KA/nK68VV+LHKhdV+WmbNYt4ykIgy+3olVXFihL7scVQE3GkKsyK2IXDxDQgPP2HwkCtssw/lH2nR/w/67T1ilOmlbu2etF8fXaHmYs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1FD6D2BC3; Thu, 31 Jul 2025 05:23:46 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8052D3F673; Thu, 31 Jul 2025 05:23:52 -0700 (PDT) From: Leo Yan Date: Thu, 31 Jul 2025 13:23:37 +0100 Subject: [PATCH v6 01/10] coresight: tmc: Support atclk Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250731-arm_cs_fix_clock_v4-v6-1-1dfe10bb3f6f@arm.com> References: <20250731-arm_cs_fix_clock_v4-v6-0-1dfe10bb3f6f@arm.com> In-Reply-To: <20250731-arm_cs_fix_clock_v4-v6-0-1dfe10bb3f6f@arm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Yeoreum Yun , Alexander Shishkin , Greg Kroah-Hartman , Mark Brown Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753964630; l=3703; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=WOy52O3owryCLLjZCAAcK0OIaY0xmsPZ2HMMUD2bKhM=; b=NQDNWjSQj2ttQz+tqLMif6Il5KrB3XwZqOapL8mUhLZC18ZnqC0MzFaE9ftCJouJiJ5+bSrTs cfrgI8s5hSYBFN7YPQ6mgs4y/ARtwvQSHwJa7s2AQoBhkNqhKphaAgp X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= The atclk is an optional clock for the CoreSight TMC, but the driver misses to initialize it. In most cases, TMC shares the atclk clock with other CoreSight components. Since these components enable the clock before the TMC device is initialized, the TMC continues properly, which is why we don=E2=80=99t observe any lockup issues. This change enables atclk in probe of the TMC driver. Given the clock is optional, it is possible to return NULL if the clock does not exist. IS_ERR() is tolerant for this case. Dynamically disable and enable atclk during suspend and resume. The clock pointers will never be error values if the driver has successfully probed, and the case of a NULL pointer case will be handled by the clock core layer. The driver data is always valid after probe. Therefore, remove the related checks. Also in the resume flow adds error handling. Fixes: bc4bf7fe98da ("coresight-tmc: add CoreSight TMC driver") Reviewed-by: Anshuman Khandual Reviewed-by: Yeoreum Yun Tested-by: James Clark Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-tmc-core.c | 22 +++++++++++++++++---= -- drivers/hwtracing/coresight/coresight-tmc.h | 2 ++ 2 files changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index be964656be9335f1b74277ba4e012ab8d6ed1785..85ba037c27f7b18fd4aed244712= 9f15316e635d5 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -779,6 +779,10 @@ static int __tmc_probe(struct device *dev, struct reso= urce *res) struct coresight_desc desc =3D { 0 }; struct coresight_dev_list *dev_list =3D NULL; =20 + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); + ret =3D -ENOMEM; =20 /* Validity for the resource is already checked by the AMBA core */ @@ -1010,18 +1014,26 @@ static int tmc_runtime_suspend(struct device *dev) { struct tmc_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); + return 0; } =20 static int tmc_runtime_resume(struct device *dev) { struct tmc_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); - return 0; + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; + + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracin= g/coresight/coresight-tmc.h index 6541a27a018e6c3da8685e2e1c93b228d44e66fc..cbb4ba43915855a8acbb9205167= e87185c9a8c6c 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -210,6 +210,7 @@ struct tmc_resrv_buf { =20 /** * struct tmc_drvdata - specifics associated to an TMC component + * @atclk: optional clock for the core parts of the TMC. * @pclk: APB clock if present, otherwise NULL * @base: memory mapped base address for this component. * @csdev: component vitals needed by the framework. @@ -244,6 +245,7 @@ struct tmc_resrv_buf { * Used by ETR/ETF. */ struct tmc_drvdata { + struct clk *atclk; struct clk *pclk; void __iomem *base; struct coresight_device *csdev; --=20 2.34.1