From nobody Sun Oct 5 20:02:13 2025 Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5034B286413 for ; Wed, 30 Jul 2025 12:16:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.34 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753877781; cv=none; b=d678kUICGwNdFIz2e2/gZky5aN2pY/0z9q/9u+LVEGQZ2oLP8axC1aBlHGFc+0eWB7Y7WAV5Qae/GdCgOa6N4hpYUJdmYQIqoZOky7Q33YYqzKgjrdxDbOCBxqR7BVH+GTplt1Gdufy8ZP+RY4Vx0/v1/3OGpTCNt+qR2M/H4Zs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753877781; c=relaxed/simple; bh=Rzr3QPpFd375//AXann9f66aucF7VKu6W1prHE7ybQs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:MIME-Version: Content-Type:References; b=BKM26Rr54560wsZH3ERkLU4adf4IERXuGSyczV6OeXlab624y5fd10wuW2WIN1CMc8nbl9GhfDT6NjxhKoZGeQzlZ/ESroKQVlScSrrapyNYDpHnuEG276+vuQowtRMLKRd9gl9kfAoGl0jBnzHurc+TJMNi/d+JE9Hzo6Ri7yo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=Wlmb1ECs; arc=none smtp.client-ip=203.254.224.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="Wlmb1ECs" Received: from epcas5p1.samsung.com (unknown [182.195.41.39]) by mailout4.samsung.com (KnoxPortal) with ESMTP id 20250730121617epoutp04098674659a0886b63c2dada1a8fd6991~XBovS5hcO1154111541epoutp04d for ; Wed, 30 Jul 2025 12:16:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout4.samsung.com 20250730121617epoutp04098674659a0886b63c2dada1a8fd6991~XBovS5hcO1154111541epoutp04d DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1753877777; bh=1l/wPiUpNSi4o0asMtc7DuFhzofL0nAWqqEmJuQjjpM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Wlmb1ECs9+kJUHi3ZyzhVCPTUue4dIqsjFL7O56getAJF/DDdq1Q5/ggyEi7qHEUv wL9sokejSobSiN24kPjGHFGyMW/CejmsHkBtYWq489z/HDOlr4Ef60HjUPLTKra8OA WKdsbhtQ1rxb+At0i7EEJnNnUV3iBqF5ao/fRm+M= Received: from epsnrtp04.localdomain (unknown [182.195.42.156]) by epcas5p4.samsung.com (KnoxPortal) with ESMTPS id 20250730121617epcas5p4fc490e311e714f2a5218628746092d18~XBou6ma0T0400404004epcas5p4E; Wed, 30 Jul 2025 12:16:17 +0000 (GMT) Received: from epcas5p1.samsung.com (unknown [182.195.38.88]) by epsnrtp04.localdomain (Postfix) with ESMTP id 4bsWQm1685z6B9m6; Wed, 30 Jul 2025 12:16:16 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p1.samsung.com (KnoxPortal) with ESMTPA id 20250730121223epcas5p1386bdf99a0af820dd4411fbdbd413cd5~XBlU7d_G42385823858epcas5p19; Wed, 30 Jul 2025 12:12:23 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121221epsmtip1a0ca696b3768d52d37c61ba151ce7ab8~XBlT4uD9Z0450404504epsmtip1f; Wed, 30 Jul 2025 12:12:21 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 01/20] nvdimm/label: Introduce NDD_CXL_LABEL flag to set cxl label format Date: Wed, 30 Jul 2025 17:41:50 +0530 Message-Id: <20250730121209.303202-2-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121223epcas5p1386bdf99a0af820dd4411fbdbd413cd5 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121223epcas5p1386bdf99a0af820dd4411fbdbd413cd5 References: <20250730121209.303202-1-s.neeraj@samsung.com> Prior to LSA 2.1 version, LSA contain only namespace labels. LSA 2.1 introduced in CXL 2.0 Spec, which contain region label along with namespace label. NDD_LABELING flag is used for namespace. Introduced NDD_CXL_LABEL flag for region label. Based on these flags nvdimm driver performs operation on namespace label or region label. NDD_CXL_LABEL will be utilized by cxl driver to enable LSA2.1 region label support Accordingly updated label index version Signed-off-by: Neeraj Kumar --- drivers/nvdimm/dimm.c | 1 + drivers/nvdimm/dimm_devs.c | 7 +++++++ drivers/nvdimm/label.c | 22 ++++++++++++++++++---- drivers/nvdimm/nd.h | 1 + include/linux/libnvdimm.h | 3 +++ 5 files changed, 30 insertions(+), 4 deletions(-) diff --git a/drivers/nvdimm/dimm.c b/drivers/nvdimm/dimm.c index 91d9163ee303..8753b5cd91cc 100644 --- a/drivers/nvdimm/dimm.c +++ b/drivers/nvdimm/dimm.c @@ -62,6 +62,7 @@ static int nvdimm_probe(struct device *dev) if (rc < 0) dev_dbg(dev, "failed to unlock dimm: %d\n", rc); =20 + ndd->cxl =3D nvdimm_check_cxl_label_format(ndd->dev); =20 /* * EACCES failures reading the namespace label-area-properties diff --git a/drivers/nvdimm/dimm_devs.c b/drivers/nvdimm/dimm_devs.c index 21498d461fde..6149770c1b27 100644 --- a/drivers/nvdimm/dimm_devs.c +++ b/drivers/nvdimm/dimm_devs.c @@ -18,6 +18,13 @@ =20 static DEFINE_IDA(dimm_ida); =20 +bool nvdimm_check_cxl_label_format(struct device *dev) +{ + struct nvdimm *nvdimm =3D to_nvdimm(dev); + + return test_bit(NDD_CXL_LABEL, &nvdimm->flags); +} + /* * Retrieve bus and dimm handle and return if this bus supports * get_config_data commands diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c index 04f4a049599a..7a011ee02d79 100644 --- a/drivers/nvdimm/label.c +++ b/drivers/nvdimm/label.c @@ -688,11 +688,25 @@ static int nd_label_write_index(struct nvdimm_drvdata= *ndd, int index, u32 seq, - (unsigned long) to_namespace_index(ndd, 0); nsindex->labeloff =3D __cpu_to_le64(offset); nsindex->nslot =3D __cpu_to_le32(nslot); - nsindex->major =3D __cpu_to_le16(1); - if (sizeof_namespace_label(ndd) < 256) + + /* Set LSA Label Index Version */ + if (ndd->cxl) { + /* CXL r3.2 Spec: Table 9-9 Label Index Block Layout */ + nsindex->major =3D __cpu_to_le16(2); nsindex->minor =3D __cpu_to_le16(1); - else - nsindex->minor =3D __cpu_to_le16(2); + } else { + nsindex->major =3D __cpu_to_le16(1); + /* + * NVDIMM Namespace Specification + * Table 2: Namespace Label Index Block Fields + */ + if (sizeof_namespace_label(ndd) < 256) + nsindex->minor =3D __cpu_to_le16(1); + else + /* UEFI Specification 2.7: Label Index Block Definitions */ + nsindex->minor =3D __cpu_to_le16(2); + } + nsindex->checksum =3D __cpu_to_le64(0); if (flags & ND_NSINDEX_INIT) { unsigned long *free =3D (unsigned long *) nsindex->free; diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h index cc5c8f3f81e8..1cc06cc58d14 100644 --- a/drivers/nvdimm/nd.h +++ b/drivers/nvdimm/nd.h @@ -522,6 +522,7 @@ void nvdimm_set_labeling(struct device *dev); void nvdimm_set_locked(struct device *dev); void nvdimm_clear_locked(struct device *dev); int nvdimm_security_setup_events(struct device *dev); +bool nvdimm_check_cxl_label_format(struct device *dev); #if IS_ENABLED(CONFIG_NVDIMM_KEYS) int nvdimm_security_unlock(struct device *dev); #else diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h index e772aae71843..0a55900842c8 100644 --- a/include/linux/libnvdimm.h +++ b/include/linux/libnvdimm.h @@ -44,6 +44,9 @@ enum { /* dimm provider wants synchronous registration by __nvdimm_create() */ NDD_REGISTER_SYNC =3D 8, =20 + /* dimm supports region labels (LSA Format 2.1) */ + NDD_CXL_LABEL =3D 9, + /* need to set a limit somewhere, but yes, this is likely overkill */ ND_IOCTL_MAX_BUFLEN =3D SZ_4M, ND_CMD_MAX_ELEM =3D 5, --=20 2.34.1 From nobody Sun Oct 5 20:02:13 2025 Received: from mailout1.samsung.com (mailout1.samsung.com [203.254.224.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3AC7C29898B for ; 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Wed, 30 Jul 2025 12:16:21 +0000 (GMT) Received: from epcas5p3.samsung.com (unknown [182.195.38.93]) by epsnrtp04.localdomain (Postfix) with ESMTP id 4bsWQr6PlRz6B9m8; Wed, 30 Jul 2025 12:16:20 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p3.samsung.com (KnoxPortal) with ESMTPA id 20250730121224epcas5p3c3a6563ce186d2fdb9c3ff5f66e37f3e~XBlWOgl9r2399523995epcas5p3g; Wed, 30 Jul 2025 12:12:24 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121223epsmtip15b6cad35c1f33e5a385c5fda08dcbaf9~XBlVKicbe0243702437epsmtip1j; Wed, 30 Jul 2025 12:12:23 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 02/20] nvdimm/label: Prep patch to accommodate cxl lsa 2.1 support Date: Wed, 30 Jul 2025 17:41:51 +0530 Message-Id: <20250730121209.303202-3-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121224epcas5p3c3a6563ce186d2fdb9c3ff5f66e37f3e X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121224epcas5p3c3a6563ce186d2fdb9c3ff5f66e37f3e References: <20250730121209.303202-1-s.neeraj@samsung.com> LSA 2.1 format introduces region label, which can also reside into LSA along with only namespace label as per v1.1 and v1.2 As both namespace and region labels are of same size of 256 bytes. Thus renamed "struct nd_namespace_label" to "struct nd_lsa_label", where both namespace label and region label can stay as union. No functional change introduced. Signed-off-by: Neeraj Kumar --- drivers/nvdimm/label.c | 58 +++++++++++++++++++-------------- drivers/nvdimm/label.h | 12 ++++++- drivers/nvdimm/namespace_devs.c | 33 +++++++++++++------ drivers/nvdimm/nd.h | 2 +- 4 files changed, 68 insertions(+), 37 deletions(-) diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c index 7a011ee02d79..75bc11da4c11 100644 --- a/drivers/nvdimm/label.c +++ b/drivers/nvdimm/label.c @@ -271,7 +271,7 @@ static void nd_label_copy(struct nvdimm_drvdata *ndd, memcpy(dst, src, sizeof_namespace_index(ndd)); } =20 -static struct nd_namespace_label *nd_label_base(struct nvdimm_drvdata *ndd) +static struct nd_lsa_label *nd_label_base(struct nvdimm_drvdata *ndd) { void *base =3D to_namespace_index(ndd, 0); =20 @@ -279,7 +279,7 @@ static struct nd_namespace_label *nd_label_base(struct = nvdimm_drvdata *ndd) } =20 static int to_slot(struct nvdimm_drvdata *ndd, - struct nd_namespace_label *nd_label) + struct nd_lsa_label *nd_label) { unsigned long label, base; =20 @@ -289,14 +289,14 @@ static int to_slot(struct nvdimm_drvdata *ndd, return (label - base) / sizeof_namespace_label(ndd); } =20 -static struct nd_namespace_label *to_label(struct nvdimm_drvdata *ndd, int= slot) +static struct nd_lsa_label *to_label(struct nvdimm_drvdata *ndd, int slot) { unsigned long label, base; =20 base =3D (unsigned long) nd_label_base(ndd); label =3D base + sizeof_namespace_label(ndd) * slot; =20 - return (struct nd_namespace_label *) label; + return (struct nd_lsa_label *) label; } =20 #define for_each_clear_bit_le(bit, addr, size) \ @@ -382,9 +382,10 @@ static void nsl_calculate_checksum(struct nvdimm_drvda= ta *ndd, } =20 static bool slot_valid(struct nvdimm_drvdata *ndd, - struct nd_namespace_label *nd_label, u32 slot) + struct nd_lsa_label *lsa_label, u32 slot) { bool valid; + struct nd_namespace_label *nd_label =3D &lsa_label->ns_label; =20 /* check that we are written where we expect to be written */ if (slot !=3D nsl_get_slot(ndd, nd_label)) @@ -405,6 +406,7 @@ int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd) return 0; /* no label, nothing to reserve */ =20 for_each_clear_bit_le(slot, free, nslot) { + struct nd_lsa_label *lsa_label; struct nd_namespace_label *nd_label; struct nd_region *nd_region =3D NULL; struct nd_label_id label_id; @@ -412,9 +414,10 @@ int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd) uuid_t label_uuid; u32 flags; =20 - nd_label =3D to_label(ndd, slot); + lsa_label =3D to_label(ndd, slot); + nd_label =3D &lsa_label->ns_label; =20 - if (!slot_valid(ndd, nd_label, slot)) + if (!slot_valid(ndd, lsa_label, slot)) continue; =20 nsl_get_uuid(ndd, nd_label, &label_uuid); @@ -565,11 +568,13 @@ int nd_label_active_count(struct nvdimm_drvdata *ndd) return 0; =20 for_each_clear_bit_le(slot, free, nslot) { + struct nd_lsa_label *lsa_label; struct nd_namespace_label *nd_label; =20 - nd_label =3D to_label(ndd, slot); + lsa_label =3D to_label(ndd, slot); + nd_label =3D &lsa_label->ns_label; =20 - if (!slot_valid(ndd, nd_label, slot)) { + if (!slot_valid(ndd, lsa_label, slot)) { u32 label_slot =3D nsl_get_slot(ndd, nd_label); u64 size =3D nsl_get_rawsize(ndd, nd_label); u64 dpa =3D nsl_get_dpa(ndd, nd_label); @@ -584,7 +589,7 @@ int nd_label_active_count(struct nvdimm_drvdata *ndd) return count; } =20 -struct nd_namespace_label *nd_label_active(struct nvdimm_drvdata *ndd, int= n) +struct nd_lsa_label *nd_label_active(struct nvdimm_drvdata *ndd, int n) { struct nd_namespace_index *nsindex; unsigned long *free; @@ -594,10 +599,10 @@ struct nd_namespace_label *nd_label_active(struct nvd= imm_drvdata *ndd, int n) return NULL; =20 for_each_clear_bit_le(slot, free, nslot) { - struct nd_namespace_label *nd_label; + struct nd_lsa_label *lsa_label; =20 - nd_label =3D to_label(ndd, slot); - if (!slot_valid(ndd, nd_label, slot)) + lsa_label =3D to_label(ndd, slot); + if (!slot_valid(ndd, lsa_label, slot)) continue; =20 if (n-- =3D=3D 0) @@ -738,7 +743,7 @@ static int nd_label_write_index(struct nvdimm_drvdata *= ndd, int index, u32 seq, } =20 static unsigned long nd_label_offset(struct nvdimm_drvdata *ndd, - struct nd_namespace_label *nd_label) + struct nd_lsa_label *nd_label) { return (unsigned long) nd_label - (unsigned long) to_namespace_index(ndd, 0); @@ -892,6 +897,7 @@ static int __pmem_label_update(struct nd_region *nd_reg= ion, struct nd_namespace_common *ndns =3D &nspm->nsio.common; struct nd_interleave_set *nd_set =3D nd_region->nd_set; struct nvdimm_drvdata *ndd =3D to_ndd(nd_mapping); + struct nd_lsa_label *lsa_label; struct nd_namespace_label *nd_label; struct nd_namespace_index *nsindex; struct nd_label_ent *label_ent; @@ -923,8 +929,10 @@ static int __pmem_label_update(struct nd_region *nd_re= gion, return -ENXIO; dev_dbg(ndd->dev, "allocated: %d\n", slot); =20 - nd_label =3D to_label(ndd, slot); - memset(nd_label, 0, sizeof_namespace_label(ndd)); + lsa_label =3D to_label(ndd, slot); + memset(lsa_label, 0, sizeof_namespace_label(ndd)); + + nd_label =3D &lsa_label->ns_label; nsl_set_uuid(ndd, nd_label, nspm->uuid); nsl_set_name(ndd, nd_label, nspm->alt_name); nsl_set_flags(ndd, nd_label, flags); @@ -942,7 +950,7 @@ static int __pmem_label_update(struct nd_region *nd_reg= ion, nd_dbg_dpa(nd_region, ndd, res, "\n"); =20 /* update label */ - offset =3D nd_label_offset(ndd, nd_label); + offset =3D nd_label_offset(ndd, lsa_label); rc =3D nvdimm_set_config_data(ndd, offset, nd_label, sizeof_namespace_label(ndd)); if (rc < 0) @@ -954,7 +962,7 @@ static int __pmem_label_update(struct nd_region *nd_reg= ion, if (!label_ent->label) continue; if (test_and_clear_bit(ND_LABEL_REAP, &label_ent->flags) || - nsl_uuid_equal(ndd, label_ent->label, nspm->uuid)) + nsl_uuid_equal(ndd, &label_ent->label->ns_label, nspm->uuid)) reap_victim(nd_mapping, label_ent); } =20 @@ -964,14 +972,14 @@ static int __pmem_label_update(struct nd_region *nd_r= egion, if (rc =3D=3D 0) { list_for_each_entry(label_ent, &nd_mapping->labels, list) if (!label_ent->label) { - label_ent->label =3D nd_label; - nd_label =3D NULL; + label_ent->label =3D lsa_label; + lsa_label =3D NULL; break; } - dev_WARN_ONCE(&nspm->nsio.common.dev, nd_label, + dev_WARN_ONCE(&nspm->nsio.common.dev, lsa_label, "failed to track label: %d\n", - to_slot(ndd, nd_label)); - if (nd_label) + to_slot(ndd, lsa_label)); + if (lsa_label) rc =3D -ENXIO; } mutex_unlock(&nd_mapping->lock); @@ -1042,12 +1050,12 @@ static int del_labels(struct nd_mapping *nd_mapping= , uuid_t *uuid) =20 mutex_lock(&nd_mapping->lock); list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) { - struct nd_namespace_label *nd_label =3D label_ent->label; + struct nd_lsa_label *nd_label =3D label_ent->label; =20 if (!nd_label) continue; active++; - if (!nsl_uuid_equal(ndd, nd_label, uuid)) + if (!nsl_uuid_equal(ndd, &nd_label->ns_label, uuid)) continue; active--; slot =3D to_slot(ndd, nd_label); diff --git a/drivers/nvdimm/label.h b/drivers/nvdimm/label.h index 0650fb4b9821..4883b3a1320f 100644 --- a/drivers/nvdimm/label.h +++ b/drivers/nvdimm/label.h @@ -183,6 +183,16 @@ struct nd_namespace_label { }; }; =20 +/* + * LSA 2.1 format introduces region label, which can also reside + * into LSA along with only namespace label as per v1.1 and v1.2 + */ +struct nd_lsa_label { + union { + struct nd_namespace_label ns_label; + }; +}; + #define NVDIMM_BTT_GUID "8aed63a2-29a2-4c66-8b12-f05d15d3922a" #define NVDIMM_BTT2_GUID "18633bfc-1735-4217-8ac9-17239282d3f8" #define NVDIMM_PFN_GUID "266400ba-fb9f-4677-bcb0-968f11d0d225" @@ -215,7 +225,7 @@ struct nvdimm_drvdata; int nd_label_data_init(struct nvdimm_drvdata *ndd); size_t sizeof_namespace_index(struct nvdimm_drvdata *ndd); int nd_label_active_count(struct nvdimm_drvdata *ndd); -struct nd_namespace_label *nd_label_active(struct nvdimm_drvdata *ndd, int= n); +struct nd_lsa_label *nd_label_active(struct nvdimm_drvdata *ndd, int n); u32 nd_label_alloc_slot(struct nvdimm_drvdata *ndd); bool nd_label_free_slot(struct nvdimm_drvdata *ndd, u32 slot); u32 nd_label_nfree(struct nvdimm_drvdata *ndd); diff --git a/drivers/nvdimm/namespace_devs.c b/drivers/nvdimm/namespace_dev= s.c index 55cfbf1e0a95..bdf1ed6f23d8 100644 --- a/drivers/nvdimm/namespace_devs.c +++ b/drivers/nvdimm/namespace_devs.c @@ -1009,10 +1009,11 @@ static int namespace_update_uuid(struct nd_region *= nd_region, =20 mutex_lock(&nd_mapping->lock); list_for_each_entry(label_ent, &nd_mapping->labels, list) { - struct nd_namespace_label *nd_label =3D label_ent->label; + struct nd_namespace_label *nd_label; struct nd_label_id label_id; uuid_t uuid; =20 + nd_label =3D &label_ent->label->ns_label; if (!nd_label) continue; nsl_get_uuid(ndd, nd_label, &uuid); @@ -1573,11 +1574,14 @@ static bool has_uuid_at_pos(struct nd_region *nd_re= gion, const uuid_t *uuid, bool found_uuid =3D false; =20 list_for_each_entry(label_ent, &nd_mapping->labels, list) { - struct nd_namespace_label *nd_label =3D label_ent->label; + struct nd_lsa_label *lsa_label =3D label_ent->label; + struct nd_namespace_label *nd_label; u16 position; =20 - if (!nd_label) + if (!lsa_label) continue; + + nd_label =3D &lsa_label->ns_label; position =3D nsl_get_position(ndd, nd_label); =20 if (!nsl_validate_isetcookie(ndd, nd_label, cookie)) @@ -1615,17 +1619,21 @@ static int select_pmem_id(struct nd_region *nd_regi= on, const uuid_t *pmem_id) for (i =3D 0; i < nd_region->ndr_mappings; i++) { struct nd_mapping *nd_mapping =3D &nd_region->mapping[i]; struct nvdimm_drvdata *ndd =3D to_ndd(nd_mapping); + struct nd_lsa_label *lsa_label =3D NULL; struct nd_namespace_label *nd_label =3D NULL; u64 hw_start, hw_end, pmem_start, pmem_end; struct nd_label_ent *label_ent; =20 lockdep_assert_held(&nd_mapping->lock); list_for_each_entry(label_ent, &nd_mapping->labels, list) { - nd_label =3D label_ent->label; - if (!nd_label) + lsa_label =3D label_ent->label; + if (!lsa_label) continue; + + nd_label =3D &lsa_label->ns_label; if (nsl_uuid_equal(ndd, nd_label, pmem_id)) break; + lsa_label =3D NULL; nd_label =3D NULL; } =20 @@ -1746,19 +1754,21 @@ static struct device *create_namespace_pmem(struct = nd_region *nd_region, =20 /* Calculate total size and populate namespace properties from label0 */ for (i =3D 0; i < nd_region->ndr_mappings; i++) { + struct nd_lsa_label *lsa_label; struct nd_namespace_label *label0; struct nvdimm_drvdata *ndd; =20 nd_mapping =3D &nd_region->mapping[i]; label_ent =3D list_first_entry_or_null(&nd_mapping->labels, typeof(*label_ent), list); - label0 =3D label_ent ? label_ent->label : NULL; + lsa_label =3D label_ent ? label_ent->label : NULL; =20 - if (!label0) { + if (!lsa_label) { WARN_ON(1); continue; } =20 + label0 =3D &lsa_label->ns_label; ndd =3D to_ndd(nd_mapping); size +=3D nsl_get_rawsize(ndd, label0); if (nsl_get_position(ndd, label0) !=3D 0) @@ -1943,12 +1953,15 @@ static struct device **scan_labels(struct nd_region= *nd_region) =20 /* "safe" because create_namespace_pmem() might list_move() label_ent */ list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) { - struct nd_namespace_label *nd_label =3D label_ent->label; + struct nd_lsa_label *lsa_label =3D label_ent->label; + struct nd_namespace_label *nd_label; struct device **__devs; =20 - if (!nd_label) + if (!lsa_label) continue; =20 + nd_label =3D &lsa_label->ns_label; + /* skip labels that describe extents outside of the region */ if (nsl_get_dpa(ndd, nd_label) < nd_mapping->start || nsl_get_dpa(ndd, nd_label) > map_end) @@ -2122,7 +2135,7 @@ static int init_active_labels(struct nd_region *nd_re= gion) if (!count) continue; for (j =3D 0; j < count; j++) { - struct nd_namespace_label *label; + struct nd_lsa_label *label; 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Wed, 30 Jul 2025 12:12:25 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121224epsmtip13253f60e17e0bf37ddbc56e42f1609e2~XBlWdw6At0197501975epsmtip13; Wed, 30 Jul 2025 12:12:24 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 03/20] nvdimm/namespace_label: Add namespace label changes as per CXL LSA v2.1 Date: Wed, 30 Jul 2025 17:41:52 +0530 Message-Id: <20250730121209.303202-4-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121225epcas5p2742d108bd0c52c8d7d46b655892c5c19 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121225epcas5p2742d108bd0c52c8d7d46b655892c5c19 References: <20250730121209.303202-1-s.neeraj@samsung.com> CXL 3.2 Spec mentions CXL LSA 2.1 Namespace Labels at section 9.13.2.5 Modified __pmem_label_update function using setter functions to update namespace label as per CXL LSA 2.1 Signed-off-by: Neeraj Kumar --- drivers/nvdimm/label.c | 3 +++ drivers/nvdimm/nd.h | 27 +++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c index 75bc11da4c11..3f8a6bdb77c7 100644 --- a/drivers/nvdimm/label.c +++ b/drivers/nvdimm/label.c @@ -933,6 +933,7 @@ static int __pmem_label_update(struct nd_region *nd_reg= ion, memset(lsa_label, 0, sizeof_namespace_label(ndd)); =20 nd_label =3D &lsa_label->ns_label; + nsl_set_type(ndd, nd_label); nsl_set_uuid(ndd, nd_label, nspm->uuid); nsl_set_name(ndd, nd_label, nspm->alt_name); nsl_set_flags(ndd, nd_label, flags); @@ -944,7 +945,9 @@ static int __pmem_label_update(struct nd_region *nd_reg= ion, nsl_set_lbasize(ndd, nd_label, nspm->lbasize); nsl_set_dpa(ndd, nd_label, res->start); nsl_set_slot(ndd, nd_label, slot); + nsl_set_alignment(ndd, nd_label, 0); nsl_set_type_guid(ndd, nd_label, &nd_set->type_guid); + nsl_set_region_uuid(ndd, nd_label, NULL); nsl_set_claim_class(ndd, nd_label, ndns->claim_class); nsl_calculate_checksum(ndd, nd_label); nd_dbg_dpa(nd_region, ndd, res, "\n"); diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h index 61348dee687d..651847f1bbf9 100644 --- a/drivers/nvdimm/nd.h +++ b/drivers/nvdimm/nd.h @@ -295,6 +295,33 @@ static inline const u8 *nsl_uuid_raw(struct nvdimm_drv= data *ndd, return nd_label->efi.uuid; } =20 +static inline void nsl_set_type(struct nvdimm_drvdata *ndd, + struct nd_namespace_label *ns_label) +{ + uuid_t tmp; + + if (ndd->cxl) { + uuid_parse(CXL_NAMESPACE_UUID, &tmp); + export_uuid(ns_label->cxl.type, &tmp); + } +} + +static inline void nsl_set_alignment(struct nvdimm_drvdata *ndd, + struct nd_namespace_label *ns_label, + u32 align) +{ + if (ndd->cxl) + ns_label->cxl.align =3D __cpu_to_le16(align); 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Wed, 30 Jul 2025 12:12:27 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121226epsmtip153824ac64b0f5fd47646b248cf298b48~XBlXwxs220197501975epsmtip14; Wed, 30 Jul 2025 12:12:25 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 04/20] nvdimm/label: CXL labels skip the need for 'interleave-set cookie' Date: Wed, 30 Jul 2025 17:41:53 +0530 Message-Id: <20250730121209.303202-5-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121227epcas5p4675fdb3130de49cd99351c5efd09e29e X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121227epcas5p4675fdb3130de49cd99351c5efd09e29e References: <20250730121209.303202-1-s.neeraj@samsung.com> CXL LSA v2.1 utilizes the region labels stored in the LSA for interleave set configuration instead of interleave-set cookie used in previous LSA versions. As interleave-set cookie is not required for CXL LSA v2.1 format so skip its usage for CXL LSA 2.1 format Signed-off-by: Neeraj Kumar Acked-by: Ira Weiny Reviewed-by: Jonathan Cameron --- drivers/nvdimm/namespace_devs.c | 3 ++- drivers/nvdimm/region_devs.c | 5 +++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/nvdimm/namespace_devs.c b/drivers/nvdimm/namespace_dev= s.c index bdf1ed6f23d8..5b73119dc8fd 100644 --- a/drivers/nvdimm/namespace_devs.c +++ b/drivers/nvdimm/namespace_devs.c @@ -1692,7 +1692,8 @@ static struct device *create_namespace_pmem(struct nd= _region *nd_region, int rc =3D 0; u16 i; =20 - if (cookie =3D=3D 0) { + /* CXL labels skip the need for 'interleave-set cookie' */ + if (!ndd->cxl && cookie =3D=3D 0) { dev_dbg(&nd_region->dev, "invalid interleave-set-cookie\n"); return ERR_PTR(-ENXIO); } diff --git a/drivers/nvdimm/region_devs.c b/drivers/nvdimm/region_devs.c index de1ee5ebc851..2debe60f8bf0 100644 --- a/drivers/nvdimm/region_devs.c +++ b/drivers/nvdimm/region_devs.c @@ -858,6 +858,11 @@ u64 nd_region_interleave_set_cookie(struct nd_region *= nd_region, if (!nd_set) return 0; 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Wed, 30 Jul 2025 12:12:28 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121227epsmtip1733b1f82b704618305e1a65fee684a46~XBlZCUxZ90289802898epsmtip1T; Wed, 30 Jul 2025 12:12:27 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 05/20] nvdimm/region_label: Add region label updation routine Date: Wed, 30 Jul 2025 17:41:54 +0530 Message-Id: <20250730121209.303202-6-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121228epcas5p411e5cc6d29fb9417178dbd07a1d8f02d X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121228epcas5p411e5cc6d29fb9417178dbd07a1d8f02d References: <20250730121209.303202-1-s.neeraj@samsung.com> Added __pmem_region_label_update region label update routine to update region label. Also used guard(mutex)(&nd_mapping->lock) in place of mutex_lock() and mutex_unlock() Signed-off-by: Neeraj Kumar --- drivers/nvdimm/label.c | 171 +++++++++++++++++++++++++++++--- drivers/nvdimm/label.h | 2 + drivers/nvdimm/namespace_devs.c | 12 +++ drivers/nvdimm/nd.h | 20 ++++ include/linux/libnvdimm.h | 8 ++ 5 files changed, 198 insertions(+), 15 deletions(-) diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c index 3f8a6bdb77c7..94f2d0ba7aca 100644 --- a/drivers/nvdimm/label.c +++ b/drivers/nvdimm/label.c @@ -381,6 +381,16 @@ static void nsl_calculate_checksum(struct nvdimm_drvda= ta *ndd, nsl_set_checksum(ndd, nd_label, sum); } =20 +static void rgl_calculate_checksum(struct nvdimm_drvdata *ndd, + struct cxl_region_label *rg_label) +{ + u64 sum; + + rgl_set_checksum(rg_label, 0); + sum =3D nd_fletcher64(rg_label, sizeof_namespace_label(ndd), 1); + rgl_set_checksum(rg_label, sum); +} + static bool slot_valid(struct nvdimm_drvdata *ndd, struct nd_lsa_label *lsa_label, u32 slot) { @@ -960,7 +970,7 @@ static int __pmem_label_update(struct nd_region *nd_reg= ion, return rc; =20 /* Garbage collect the previous label */ - mutex_lock(&nd_mapping->lock); + guard(mutex)(&nd_mapping->lock); list_for_each_entry(label_ent, &nd_mapping->labels, list) { if (!label_ent->label) continue; @@ -972,20 +982,20 @@ static int __pmem_label_update(struct nd_region *nd_r= egion, /* update index */ rc =3D nd_label_write_index(ndd, ndd->ns_next, nd_inc_seq(__le32_to_cpu(nsindex->seq)), 0); - if (rc =3D=3D 0) { - list_for_each_entry(label_ent, &nd_mapping->labels, list) - if (!label_ent->label) { - label_ent->label =3D lsa_label; - lsa_label =3D NULL; - break; - } - dev_WARN_ONCE(&nspm->nsio.common.dev, lsa_label, - "failed to track label: %d\n", - to_slot(ndd, lsa_label)); - if (lsa_label) - rc =3D -ENXIO; - } - mutex_unlock(&nd_mapping->lock); + if (rc) + return rc; + + list_for_each_entry(label_ent, &nd_mapping->labels, list) + if (!label_ent->label) { + label_ent->label =3D lsa_label; + lsa_label =3D NULL; + break; + } + dev_WARN_ONCE(&nspm->nsio.common.dev, lsa_label, + "failed to track label: %d\n", + to_slot(ndd, lsa_label)); + if (lsa_label) + rc =3D -ENXIO; =20 return rc; } @@ -1127,6 +1137,137 @@ int nd_pmem_namespace_label_update(struct nd_region= *nd_region, return 0; } =20 +static int __pmem_region_label_update(struct nd_region *nd_region, + struct nd_mapping *nd_mapping, int pos, unsigned long flags) +{ + struct nd_interleave_set *nd_set =3D nd_region->nd_set; + struct nvdimm_drvdata *ndd =3D to_ndd(nd_mapping); + struct nd_lsa_label *nd_label; + struct cxl_region_label *rg_label; + struct nd_namespace_index *nsindex; + struct nd_label_ent *label_ent; + unsigned long *free; + u32 nslot, slot; + size_t offset; + int rc; + uuid_t tmp; + + if (!preamble_next(ndd, &nsindex, &free, &nslot)) + return -ENXIO; + + /* allocate and write the label to the staging (next) index */ + slot =3D nd_label_alloc_slot(ndd); + if (slot =3D=3D UINT_MAX) + return -ENXIO; + dev_dbg(ndd->dev, "allocated: %d\n", slot); + + nd_label =3D to_label(ndd, slot); + + memset(nd_label, 0, sizeof_namespace_label(ndd)); + rg_label =3D &nd_label->rg_label; + + /* Set Region Label Format identification UUID */ + uuid_parse(CXL_REGION_UUID, &tmp); + export_uuid(nd_label->rg_label.type, &tmp); + + /* Set Current Region Label UUID */ + export_uuid(nd_label->rg_label.uuid, &nd_set->uuid); + + rg_label->flags =3D __cpu_to_le32(flags); + rg_label->nlabel =3D __cpu_to_le16(nd_region->ndr_mappings); + rg_label->position =3D __cpu_to_le16(pos); + rg_label->dpa =3D __cpu_to_le64(nd_mapping->start); + rg_label->rawsize =3D __cpu_to_le64(nd_mapping->size); + rg_label->hpa =3D __cpu_to_le64(nd_set->res->start); + rg_label->slot =3D __cpu_to_le32(slot); + rg_label->ig =3D __cpu_to_le32(nd_set->interleave_granularity); + rg_label->align =3D __cpu_to_le16(0); + + /* Update fletcher64 Checksum */ + rgl_calculate_checksum(ndd, rg_label); + + /* update label */ + offset =3D nd_label_offset(ndd, nd_label); + rc =3D nvdimm_set_config_data(ndd, offset, nd_label, + sizeof_namespace_label(ndd)); + if (rc < 0) { + nd_label_free_slot(ndd, slot); + return rc; + } + + /* Garbage collect the previous label */ + guard(mutex)(&nd_mapping->lock); + list_for_each_entry(label_ent, &nd_mapping->labels, list) { + if (!label_ent->label) + continue; + if (rgl_uuid_equal(&label_ent->label->rg_label, &nd_set->uuid)) + reap_victim(nd_mapping, label_ent); + } + + /* update index */ + rc =3D nd_label_write_index(ndd, ndd->ns_next, + nd_inc_seq(__le32_to_cpu(nsindex->seq)), 0); + if (rc) + return rc; + + list_for_each_entry(label_ent, &nd_mapping->labels, list) + if (!label_ent->label) { + label_ent->label =3D nd_label; + nd_label =3D NULL; + break; + } + dev_WARN_ONCE(&nd_region->dev, nd_label, + "failed to track label: %d\n", + to_slot(ndd, nd_label)); + if (nd_label) + rc =3D -ENXIO; + + return rc; +} + +int nd_pmem_region_label_update(struct nd_region *nd_region) +{ + int i, rc; + + for (i =3D 0; i < nd_region->ndr_mappings; i++) { + struct nd_mapping *nd_mapping =3D &nd_region->mapping[i]; + struct nvdimm_drvdata *ndd =3D to_ndd(nd_mapping); + + /* No need to update region label for non cxl format */ + if (!ndd->cxl) + continue; + + /* Init labels to include region label */ + rc =3D init_labels(nd_mapping, 1); + + if (rc < 0) + return rc; + + rc =3D __pmem_region_label_update(nd_region, nd_mapping, i, + NSLABEL_FLAG_UPDATING); + + if (rc) + return rc; + } + + /* Clear the UPDATING flag per UEFI 2.7 expectations */ + for (i =3D 0; i < nd_region->ndr_mappings; i++) { + struct nd_mapping *nd_mapping =3D &nd_region->mapping[i]; + struct nvdimm_drvdata *ndd =3D to_ndd(nd_mapping); + + /* No need to update region label for non cxl format */ + if (!ndd->cxl) + continue; + + rc =3D __pmem_region_label_update(nd_region, nd_mapping, i, 0); + + if (rc) + return rc; + } + + return 0; +} + int __init nd_label_init(void) { WARN_ON(guid_parse(NVDIMM_BTT_GUID, &nvdimm_btt_guid)); diff --git a/drivers/nvdimm/label.h b/drivers/nvdimm/label.h index 4883b3a1320f..0f428695017d 100644 --- a/drivers/nvdimm/label.h +++ b/drivers/nvdimm/label.h @@ -190,6 +190,7 @@ struct nd_namespace_label { struct nd_lsa_label { union { struct nd_namespace_label ns_label; + struct cxl_region_label rg_label; }; }; =20 @@ -233,4 +234,5 @@ struct nd_region; struct nd_namespace_pmem; int nd_pmem_namespace_label_update(struct nd_region *nd_region, struct nd_namespace_pmem *nspm, resource_size_t size); +int nd_pmem_region_label_update(struct nd_region *nd_region); #endif /* __LABEL_H__ */ diff --git a/drivers/nvdimm/namespace_devs.c b/drivers/nvdimm/namespace_dev= s.c index 5b73119dc8fd..02ae8162566c 100644 --- a/drivers/nvdimm/namespace_devs.c +++ b/drivers/nvdimm/namespace_devs.c @@ -232,6 +232,18 @@ static ssize_t __alt_name_store(struct device *dev, co= nst char *buf, return rc; } =20 +int nd_region_label_update(struct nd_region *nd_region) +{ + int rc; + + nvdimm_bus_lock(&nd_region->dev); + rc =3D nd_pmem_region_label_update(nd_region); + nvdimm_bus_unlock(&nd_region->dev); + + return rc; +} +EXPORT_SYMBOL_GPL(nd_region_label_update); + static int nd_namespace_label_update(struct nd_region *nd_region, struct device *dev) { diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h index 651847f1bbf9..15d94e3937f0 100644 --- a/drivers/nvdimm/nd.h +++ b/drivers/nvdimm/nd.h @@ -322,6 +322,26 @@ static inline void nsl_set_region_uuid(struct nvdimm_d= rvdata *ndd, export_uuid(ns_label->cxl.region_uuid, uuid); } =20 +static inline bool rgl_uuid_equal(struct cxl_region_label *rg_label, + const uuid_t *uuid) +{ + uuid_t tmp; + + import_uuid(&tmp, rg_label->uuid); + return uuid_equal(&tmp, uuid); +} + +static inline u64 rgl_get_checksum(struct cxl_region_label *rg_label) +{ + return __le64_to_cpu(rg_label->checksum); +} + +static inline void rgl_set_checksum(struct cxl_region_label *rg_label, + u64 checksum) +{ + rg_label->checksum =3D __cpu_to_le64(checksum); +} + bool nsl_validate_type_guid(struct nvdimm_drvdata *ndd, struct nd_namespace_label *nd_label, guid_t *guid); enum nvdimm_claim_class nsl_get_claim_class(struct nvdimm_drvdata *ndd, diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h index 0a55900842c8..b06bd45373f4 100644 --- a/include/linux/libnvdimm.h +++ b/include/linux/libnvdimm.h @@ -115,6 +115,13 @@ struct nd_interleave_set { u64 altcookie; =20 guid_t type_guid; + + /* v2.1 region label info */ + uuid_t uuid; + int interleave_ways; + int interleave_granularity; + struct resource *res; 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Wed, 30 Jul 2025 12:12:30 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121228epsmtip126796f2fb4772cc27086930f0f001d0a~XBlaV9Kf30450404504epsmtip1i; Wed, 30 Jul 2025 12:12:28 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 06/20] nvdimm/region_label: Add region label deletion routine Date: Wed, 30 Jul 2025 17:41:55 +0530 Message-Id: <20250730121209.303202-7-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121230epcas5p11650f090de55d0a2db541ee32e9a6fee X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121230epcas5p11650f090de55d0a2db541ee32e9a6fee References: <20250730121209.303202-1-s.neeraj@samsung.com> Added cxl v2.1 format region label deletion routine. This function is used to delete region label from LSA Signed-off-by: Neeraj Kumar --- drivers/nvdimm/label.c | 77 ++++++++++++++++++++++++++++++--- drivers/nvdimm/label.h | 6 +++ drivers/nvdimm/namespace_devs.c | 12 +++++ drivers/nvdimm/nd.h | 9 ++++ include/linux/libnvdimm.h | 1 + 5 files changed, 100 insertions(+), 5 deletions(-) diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c index 94f2d0ba7aca..be18278d6cea 100644 --- a/drivers/nvdimm/label.c +++ b/drivers/nvdimm/label.c @@ -1044,7 +1044,8 @@ static int init_labels(struct nd_mapping *nd_mapping,= int num_labels) return max(num_labels, old_num_labels); } =20 -static int del_labels(struct nd_mapping *nd_mapping, uuid_t *uuid) +static int del_labels(struct nd_mapping *nd_mapping, uuid_t *uuid, + enum label_type ltype) { struct nvdimm_drvdata *ndd =3D to_ndd(nd_mapping); struct nd_label_ent *label_ent, *e; @@ -1068,8 +1069,23 @@ static int del_labels(struct nd_mapping *nd_mapping,= uuid_t *uuid) if (!nd_label) continue; active++; - if (!nsl_uuid_equal(ndd, &nd_label->ns_label, uuid)) - continue; + + switch (ltype) { + case NS_LABEL_TYPE: + if (!nsl_uuid_equal(ndd, &nd_label->ns_label, uuid)) + continue; + + break; + case RG_LABEL_TYPE: + if (!rgl_uuid_equal(&nd_label->rg_label, uuid)) + continue; + + break; + default: + dev_err(ndd->dev, "Invalid label type\n"); + return 0; + } + active--; slot =3D to_slot(ndd, nd_label); nd_label_free_slot(ndd, slot); @@ -1079,7 +1095,7 @@ static int del_labels(struct nd_mapping *nd_mapping, = uuid_t *uuid) } list_splice_tail_init(&list, &nd_mapping->labels); =20 - if (active =3D=3D 0) { + if ((ltype =3D=3D NS_LABEL_TYPE) && (active =3D=3D 0)) { nd_mapping_free_labels(nd_mapping); dev_dbg(ndd->dev, "no more active labels\n"); } @@ -1101,7 +1117,8 @@ int nd_pmem_namespace_label_update(struct nd_region *= nd_region, int count =3D 0; =20 if (size =3D=3D 0) { - rc =3D del_labels(nd_mapping, nspm->uuid); + rc =3D del_labels(nd_mapping, nspm->uuid, + NS_LABEL_TYPE); if (rc) return rc; continue; @@ -1268,6 +1285,56 @@ int nd_pmem_region_label_update(struct nd_region *nd= _region) return 0; } =20 +int nd_pmem_region_label_delete(struct nd_region *nd_region) +{ + int i, rc; + struct nd_interleave_set *nd_set =3D nd_region->nd_set; + struct nd_label_ent *label_ent; + int ns_region_cnt =3D 0; + + for (i =3D 0; i < nd_region->ndr_mappings; i++) { + struct nd_mapping *nd_mapping =3D &nd_region->mapping[i]; + struct nvdimm_drvdata *ndd =3D to_ndd(nd_mapping); + + /* Find non cxl format supported ndr_mappings */ + if (!ndd->cxl) { + dev_info(&nd_region->dev, "Region label unsupported\n"); + return -EINVAL; + } + + /* Find if any NS label using this region */ + mutex_lock(&nd_mapping->lock); + list_for_each_entry(label_ent, &nd_mapping->labels, list) { + if (!label_ent->label) + continue; + + /* + * Check if any available NS labels has same + * region_uuid in LSA + */ + if (nsl_region_uuid_equal(&label_ent->label->ns_label, + &nd_set->uuid)) + ns_region_cnt++; + } + mutex_unlock(&nd_mapping->lock); + } + + if (ns_region_cnt) { + dev_dbg(&nd_region->dev, "Region/Namespace label in use\n"); + return -EBUSY; + } + + for (i =3D 0; i < nd_region->ndr_mappings; i++) { + struct nd_mapping *nd_mapping =3D &nd_region->mapping[i]; + + rc =3D del_labels(nd_mapping, &nd_set->uuid, RG_LABEL_TYPE); + if (rc) + return rc; + } + + return 0; +} + int __init nd_label_init(void) { WARN_ON(guid_parse(NVDIMM_BTT_GUID, &nvdimm_btt_guid)); diff --git a/drivers/nvdimm/label.h b/drivers/nvdimm/label.h index 0f428695017d..cc14068511cf 100644 --- a/drivers/nvdimm/label.h +++ b/drivers/nvdimm/label.h @@ -30,6 +30,11 @@ enum { ND_NSINDEX_INIT =3D 0x1, }; =20 +enum label_type { + RG_LABEL_TYPE, + NS_LABEL_TYPE, +}; + /** * struct nd_namespace_index - label set superblock * @sig: NAMESPACE_INDEX\0 @@ -235,4 +240,5 @@ struct nd_namespace_pmem; int nd_pmem_namespace_label_update(struct nd_region *nd_region, struct nd_namespace_pmem *nspm, resource_size_t size); int nd_pmem_region_label_update(struct nd_region *nd_region); +int nd_pmem_region_label_delete(struct nd_region *nd_region); #endif /* __LABEL_H__ */ diff --git a/drivers/nvdimm/namespace_devs.c b/drivers/nvdimm/namespace_dev= s.c index 02ae8162566c..e5c2f78ca7dd 100644 --- a/drivers/nvdimm/namespace_devs.c +++ b/drivers/nvdimm/namespace_devs.c @@ -244,6 +244,18 @@ int nd_region_label_update(struct nd_region *nd_region) } EXPORT_SYMBOL_GPL(nd_region_label_update); =20 +int nd_region_label_delete(struct nd_region *nd_region) +{ + int rc; + + nvdimm_bus_lock(&nd_region->dev); + rc =3D nd_pmem_region_label_delete(nd_region); + nvdimm_bus_unlock(&nd_region->dev); + + return rc; +} +EXPORT_SYMBOL_GPL(nd_region_label_delete); + static int nd_namespace_label_update(struct nd_region *nd_region, struct device *dev) { diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h index 15d94e3937f0..6585747154c2 100644 --- a/drivers/nvdimm/nd.h +++ b/drivers/nvdimm/nd.h @@ -322,6 +322,15 @@ static inline void nsl_set_region_uuid(struct nvdimm_d= rvdata *ndd, export_uuid(ns_label->cxl.region_uuid, uuid); } =20 +static inline bool nsl_region_uuid_equal(struct nd_namespace_label *ns_lab= el, + const uuid_t *uuid) +{ + uuid_t tmp; + + import_uuid(&tmp, ns_label->cxl.region_uuid); + return uuid_equal(&tmp, uuid); +} + static inline bool rgl_uuid_equal(struct cxl_region_label *rg_label, const uuid_t *uuid) { diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h index b06bd45373f4..b2e16914ab52 100644 --- a/include/linux/libnvdimm.h +++ b/include/linux/libnvdimm.h @@ -310,6 +310,7 @@ int nvdimm_has_cache(struct nd_region *nd_region); int nvdimm_in_overwrite(struct nvdimm *nvdimm); bool is_nvdimm_sync(struct nd_region *nd_region); int nd_region_label_update(struct nd_region *nd_region); +int nd_region_label_delete(struct nd_region *nd_region); =20 static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void= *buf, unsigned int buf_len, int *cmd_rc) --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 089C029AAF5 for ; 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Wed, 30 Jul 2025 12:16:44 +0000 (GMT) Received: from epcas5p2.samsung.com (unknown [182.195.38.95]) by epsnrtp01.localdomain (Postfix) with ESMTP id 4bsWRH6p3jz6B9m6; Wed, 30 Jul 2025 12:16:43 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p2.samsung.com (KnoxPortal) with ESMTPA id 20250730121231epcas5p2c12cb2b4914279d1f1c93e56a32c3908~XBlcsRj-H2146721467epcas5p2r; Wed, 30 Jul 2025 12:12:31 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121230epsmtip1475d92b8baf2091b2cf7dd28aa1ee4ec~XBlbp5udN0289802898epsmtip1V; Wed, 30 Jul 2025 12:12:30 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 07/20] nvdimm/namespace_label: Update namespace init_labels and its region_uuid Date: Wed, 30 Jul 2025 17:41:56 +0530 Message-Id: <20250730121209.303202-8-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121231epcas5p2c12cb2b4914279d1f1c93e56a32c3908 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121231epcas5p2c12cb2b4914279d1f1c93e56a32c3908 References: <20250730121209.303202-1-s.neeraj@samsung.com> nd_mapping->labels maintains the list of labels present into LSA. init_labels() prepares this list while adding new label into LSA and updates nd_mapping->labels accordingly. During cxl region creation nd_mapping->labels list and LSA was updated with one region label. Therefore during new namespace label creation pre-include the previously created region label, so increase num_labels count by 1. Also updated nsl_set_region_uuid with region uuid with which namespace is associated with. Signed-off-by: Neeraj Kumar --- drivers/nvdimm/label.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c index be18278d6cea..fd02b557612e 100644 --- a/drivers/nvdimm/label.c +++ b/drivers/nvdimm/label.c @@ -957,7 +957,7 @@ static int __pmem_label_update(struct nd_region *nd_reg= ion, nsl_set_slot(ndd, nd_label, slot); nsl_set_alignment(ndd, nd_label, 0); nsl_set_type_guid(ndd, nd_label, &nd_set->type_guid); - nsl_set_region_uuid(ndd, nd_label, NULL); + nsl_set_region_uuid(ndd, nd_label, &nd_set->uuid); nsl_set_claim_class(ndd, nd_label, ndns->claim_class); nsl_calculate_checksum(ndd, nd_label); nd_dbg_dpa(nd_region, ndd, res, "\n"); @@ -1129,7 +1129,8 @@ int nd_pmem_namespace_label_update(struct nd_region *= nd_region, count++; WARN_ON_ONCE(!count); =20 - rc =3D init_labels(nd_mapping, count); + /* Adding 1 to pre include the already added region label */ + rc =3D init_labels(nd_mapping, count + 1); if (rc < 0) return rc; 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Wed, 30 Jul 2025 12:12:31 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 08/20] nvdimm/label: Include region label in slot validation Date: Wed, 30 Jul 2025 17:41:57 +0530 Message-Id: <20250730121209.303202-9-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121232epcas5p4cd632fe09d1bc51499d9e3ac3c2633b3 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121232epcas5p4cd632fe09d1bc51499d9e3ac3c2633b3 References: <20250730121209.303202-1-s.neeraj@samsung.com> slot validation routine validates label slot by calculating label checksum. It was only validating namespace label. This changeset also validates region label if present. Also validate and calculate lsa v2.1 namespace label checksum Signed-off-by: Neeraj Kumar Reviewed-by: Jonathan Cameron --- drivers/nvdimm/label.c | 55 ++++++++++++++++++++++++++++++++++-------- drivers/nvdimm/nd.h | 19 +++++++++++++++ 2 files changed, 64 insertions(+), 10 deletions(-) diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c index fd02b557612e..c4748e30f2b6 100644 --- a/drivers/nvdimm/label.c +++ b/drivers/nvdimm/label.c @@ -359,7 +359,7 @@ static bool nsl_validate_checksum(struct nvdimm_drvdata= *ndd, { u64 sum, sum_save; =20 - if (!ndd->cxl && !efi_namespace_label_has(ndd, checksum)) + if (!efi_namespace_label_has(ndd, checksum)) return true; =20 sum_save =3D nsl_get_checksum(ndd, nd_label); @@ -374,13 +374,25 @@ static void nsl_calculate_checksum(struct nvdimm_drvd= ata *ndd, { u64 sum; =20 - if (!ndd->cxl && !efi_namespace_label_has(ndd, checksum)) + if (!efi_namespace_label_has(ndd, checksum)) return; nsl_set_checksum(ndd, nd_label, 0); sum =3D nd_fletcher64(nd_label, sizeof_namespace_label(ndd), 1); nsl_set_checksum(ndd, nd_label, sum); } =20 +static bool rgl_validate_checksum(struct nvdimm_drvdata *ndd, + struct cxl_region_label *rg_label) +{ + u64 sum, sum_save; + + sum_save =3D rgl_get_checksum(rg_label); + rgl_set_checksum(rg_label, 0); + sum =3D nd_fletcher64(rg_label, sizeof_namespace_label(ndd), 1); + rgl_set_checksum(rg_label, sum_save); + return sum =3D=3D sum_save; +} + static void rgl_calculate_checksum(struct nvdimm_drvdata *ndd, struct cxl_region_label *rg_label) { @@ -395,14 +407,27 @@ static bool slot_valid(struct nvdimm_drvdata *ndd, struct nd_lsa_label *lsa_label, u32 slot) { bool valid; + char *label_name; struct nd_namespace_label *nd_label =3D &lsa_label->ns_label; + struct cxl_region_label *rg_label =3D &lsa_label->rg_label; =20 /* check that we are written where we expect to be written */ - if (slot !=3D nsl_get_slot(ndd, nd_label)) - return false; - valid =3D nsl_validate_checksum(ndd, nd_label); + if (is_region_label(ndd, lsa_label)) { + label_name =3D "rg"; + if (slot !=3D rgl_get_slot(rg_label)) + return false; + valid =3D rgl_validate_checksum(ndd, rg_label); + } else { + label_name =3D "ns"; + if (slot !=3D nsl_get_slot(ndd, nd_label)) + return false; + valid =3D nsl_validate_checksum(ndd, nd_label); + } + if (!valid) - dev_dbg(ndd->dev, "fail checksum. slot: %d\n", slot); + dev_dbg(ndd->dev, "%s label checksum fail. slot: %d\n", + label_name, slot); + return valid; } =20 @@ -580,18 +605,28 @@ int nd_label_active_count(struct nvdimm_drvdata *ndd) for_each_clear_bit_le(slot, free, nslot) { struct nd_lsa_label *lsa_label; struct nd_namespace_label *nd_label; + struct cxl_region_label *rg_label; + u32 lslot; + u64 size, dpa; =20 lsa_label =3D to_label(ndd, slot); nd_label =3D &lsa_label->ns_label; + rg_label =3D &lsa_label->rg_label; =20 if (!slot_valid(ndd, lsa_label, slot)) { - u32 label_slot =3D nsl_get_slot(ndd, nd_label); - u64 size =3D nsl_get_rawsize(ndd, nd_label); - u64 dpa =3D nsl_get_dpa(ndd, nd_label); + if (is_region_label(ndd, lsa_label)) { + lslot =3D __le32_to_cpu(rg_label->slot); + size =3D __le64_to_cpu(rg_label->rawsize); + dpa =3D __cpu_to_le64(rg_label->dpa); + } else { + lslot =3D nsl_get_slot(ndd, nd_label); + size =3D nsl_get_rawsize(ndd, nd_label); + dpa =3D nsl_get_dpa(ndd, nd_label); + } =20 dev_dbg(ndd->dev, "slot%d invalid slot: %d dpa: %llx size: %llx\n", - slot, label_slot, dpa, size); + slot, lslot, dpa, size); continue; } count++; diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h index 6585747154c2..4145c7df2a8f 100644 --- a/drivers/nvdimm/nd.h +++ b/drivers/nvdimm/nd.h @@ -331,6 +331,20 @@ static inline bool nsl_region_uuid_equal(struct nd_nam= espace_label *ns_label, return uuid_equal(&tmp, uuid); } =20 +static inline bool is_region_label(struct nvdimm_drvdata *ndd, + struct nd_lsa_label *nd_label) +{ + uuid_t ns_type, region_type; + + if (!ndd->cxl) + return false; + + uuid_parse(CXL_REGION_UUID, ®ion_type); + import_uuid(&ns_type, nd_label->ns_label.cxl.type); + return uuid_equal(®ion_type, &ns_type); + +} + static inline bool rgl_uuid_equal(struct cxl_region_label *rg_label, const uuid_t *uuid) { @@ -340,6 +354,11 @@ static inline bool rgl_uuid_equal(struct cxl_region_la= bel *rg_label, return uuid_equal(&tmp, uuid); } =20 +static inline u32 rgl_get_slot(struct cxl_region_label *rg_label) +{ + return __le32_to_cpu(rg_label->slot); +} + static inline u64 rgl_get_checksum(struct cxl_region_label *rg_label) { return __le64_to_cpu(rg_label->checksum); --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3E4E29ACC6 for ; Wed, 30 Jul 2025 12:16:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753877819; cv=none; b=KRWxQdyNmDWKq9ODXZmDXM7OdV07Zdltr0m3n7fVHueZP13Wph4Cj5LPBNaZ6ZSV7aj3StX5iq4ESXfTNq2hTV9myShShDVIYPuHVaoyIX9ffOM9/S8khTuKVLQ49I9piqG5iguNYmNHFxNptMnZGuWD9efUCddkbzejquPRykk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Wed, 30 Jul 2025 12:12:34 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121232epsmtip137e525c5ce4722df799cc72cd2c5d722~XBleMx_yp0289802898epsmtip1X; Wed, 30 Jul 2025 12:12:32 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 09/20] nvdimm/namespace_label: Skip region label during ns label DPA reservation Date: Wed, 30 Jul 2025 17:41:58 +0530 Message-Id: <20250730121209.303202-10-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121234epcas5p2605fbec7bc95f6096550792844b8f8ee X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121234epcas5p2605fbec7bc95f6096550792844b8f8ee References: <20250730121209.303202-1-s.neeraj@samsung.com> If Namespace label is present in LSA during nvdimm_probe then DPA reservation is required. But this reservation is not required by region label. Therefore if LSA scanning finds any region label, skip it. Signed-off-by: Neeraj Kumar --- drivers/nvdimm/label.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c index c4748e30f2b6..064a945dcdd1 100644 --- a/drivers/nvdimm/label.c +++ b/drivers/nvdimm/label.c @@ -452,6 +452,10 @@ int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd) lsa_label =3D to_label(ndd, slot); nd_label =3D &lsa_label->ns_label; =20 + /* skip region label, dpa reservation for ns label only */ + if (is_region_label(ndd, lsa_label)) + continue; + if (!slot_valid(ndd, lsa_label, slot)) continue; =20 --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 42D57298999 for ; Wed, 30 Jul 2025 12:17:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.34 ARC-Seal: i=1; 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Wed, 30 Jul 2025 12:16:59 +0000 (GMT) Received: from epcas5p1.samsung.com (unknown [182.195.38.89]) by epsnrtp04.localdomain (Postfix) with ESMTP id 4bsWRZ2P9sz6B9mB; Wed, 30 Jul 2025 12:16:58 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p4.samsung.com (KnoxPortal) with ESMTPA id 20250730121235epcas5p4494147524e77e99bc16d9b510e8971a4~XBlghH0m60910709107epcas5p4O; Wed, 30 Jul 2025 12:12:35 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121234epsmtip16992c0bbf3bf81b85aafdf8f9d13bdd3~XBlfeCUPg0197501975epsmtip17; Wed, 30 Jul 2025 12:12:34 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 10/20] nvdimm/region_label: Preserve cxl region information from region label Date: Wed, 30 Jul 2025 17:41:59 +0530 Message-Id: <20250730121209.303202-11-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121235epcas5p4494147524e77e99bc16d9b510e8971a4 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121235epcas5p4494147524e77e99bc16d9b510e8971a4 References: <20250730121209.303202-1-s.neeraj@samsung.com> Preserve region information from region label during nvdimm_probe. This preserved region information is used for creating cxl region to achieve region persistency across reboot. Signed-off-by: Neeraj Kumar --- drivers/nvdimm/dimm.c | 4 ++++ drivers/nvdimm/label.c | 41 +++++++++++++++++++++++++++++++++++++++ drivers/nvdimm/nd-core.h | 2 ++ drivers/nvdimm/nd.h | 1 + include/linux/libnvdimm.h | 14 +++++++++++++ 5 files changed, 62 insertions(+) diff --git a/drivers/nvdimm/dimm.c b/drivers/nvdimm/dimm.c index 8753b5cd91cc..da4f37f0ae3b 100644 --- a/drivers/nvdimm/dimm.c +++ b/drivers/nvdimm/dimm.c @@ -107,6 +107,10 @@ static int nvdimm_probe(struct device *dev) if (rc) goto err; =20 + /* Preserve cxl region info if available */ + if (ndd->cxl) + nvdimm_cxl_region_preserve(ndd); + return 0; =20 err: diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c index 064a945dcdd1..bcac05371f87 100644 --- a/drivers/nvdimm/label.c +++ b/drivers/nvdimm/label.c @@ -473,6 +473,47 @@ int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd) return 0; } =20 +int nvdimm_cxl_region_preserve(struct nvdimm_drvdata *ndd) +{ + struct nvdimm *nvdimm =3D to_nvdimm(ndd->dev); + struct cxl_pmem_region_params *params =3D &nvdimm->cxl_region_params; + struct nd_namespace_index *nsindex; + unsigned long *free; + u32 nslot, slot; + + if (!preamble_current(ndd, &nsindex, &free, &nslot)) + return 0; /* no label, nothing to preserve */ + + for_each_clear_bit_le(slot, free, nslot) { + struct nd_lsa_label *nd_label; + struct cxl_region_label *rg_label; + uuid_t rg_type, region_type; + + nd_label =3D to_label(ndd, slot); + rg_label =3D &nd_label->rg_label; + uuid_parse(CXL_REGION_UUID, ®ion_type); + import_uuid(&rg_type, nd_label->rg_label.type); + + /* REVISIT: Currently preserving only one region */ + if (uuid_equal(®ion_type, &rg_type)) { + nvdimm->is_region_label =3D true; + import_uuid(¶ms->uuid, rg_label->uuid); + params->flags =3D __le32_to_cpu(rg_label->flags); + params->nlabel =3D __le16_to_cpu(rg_label->nlabel); + params->position =3D __le16_to_cpu(rg_label->position); + params->dpa =3D __le64_to_cpu(rg_label->dpa); + params->rawsize =3D __le64_to_cpu(rg_label->rawsize); + params->hpa =3D __le64_to_cpu(rg_label->hpa); + params->slot =3D __le32_to_cpu(rg_label->slot); + params->ig =3D __le32_to_cpu(rg_label->ig); + params->align =3D __le32_to_cpu(rg_label->align); + break; + } + } + + return 0; +} + int nd_label_data_init(struct nvdimm_drvdata *ndd) { size_t config_size, read_size, max_xfer, offset; diff --git a/drivers/nvdimm/nd-core.h b/drivers/nvdimm/nd-core.h index bfc6bfeb6e24..a73fac81531e 100644 --- a/drivers/nvdimm/nd-core.h +++ b/drivers/nvdimm/nd-core.h @@ -46,6 +46,8 @@ struct nvdimm { } sec; struct delayed_work dwork; const struct nvdimm_fw_ops *fw_ops; + bool is_region_label; + struct cxl_pmem_region_params cxl_region_params; }; =20 static inline unsigned long nvdimm_security_flags( diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h index 4145c7df2a8f..f78c8fc1de8a 100644 --- a/drivers/nvdimm/nd.h +++ b/drivers/nvdimm/nd.h @@ -598,6 +598,7 @@ void nvdimm_set_locked(struct device *dev); void nvdimm_clear_locked(struct device *dev); int nvdimm_security_setup_events(struct device *dev); bool nvdimm_check_cxl_label_format(struct device *dev); +int nvdimm_cxl_region_preserve(struct nvdimm_drvdata *ndd); #if IS_ENABLED(CONFIG_NVDIMM_KEYS) int nvdimm_security_unlock(struct device *dev); #else diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h index b2e16914ab52..cdabb43a8a7f 100644 --- a/include/linux/libnvdimm.h +++ b/include/linux/libnvdimm.h @@ -106,6 +106,20 @@ struct nd_cmd_desc { int out_sizes[ND_CMD_MAX_ELEM]; }; =20 +struct cxl_pmem_region_params { + uuid_t uuid; + u32 flags; + u16 nlabel; + u16 position; + u64 dpa; + u64 rawsize; + u64 hpa; + u32 slot; + u32 ig; + u32 align; + int nr_targets; +}; + struct nd_interleave_set { /* v1.1 definition of the interleave-set-cookie algorithm */ u64 cookie1; --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE0A1DF71 for ; Wed, 30 Jul 2025 12:17:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Wed, 30 Jul 2025 12:17:03 +0000 (GMT) Received: from epcas5p1.samsung.com (unknown [182.195.38.93]) by epsnrtp04.localdomain (Postfix) with ESMTP id 4bsWRf4bv6z6B9m8; Wed, 30 Jul 2025 12:17:02 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p4.samsung.com (KnoxPortal) with ESMTPA id 20250730121236epcas5p4b8939ed1bfff468c965a9dbd6bc261b6~XBlhzccnz0910609106epcas5p4Q; Wed, 30 Jul 2025 12:12:36 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121235epsmtip12e690e7f29b26df3d68b39d43915790c~XBlgwSscL0289802898epsmtip1Y; Wed, 30 Jul 2025 12:12:35 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 11/20] nvdimm/region_label: Export routine to fetch region information Date: Wed, 30 Jul 2025 17:42:00 +0530 Message-Id: <20250730121209.303202-12-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121236epcas5p4b8939ed1bfff468c965a9dbd6bc261b6 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121236epcas5p4b8939ed1bfff468c965a9dbd6bc261b6 References: <20250730121209.303202-1-s.neeraj@samsung.com> cxl region information preserved from LSA need to be exported so as to use by cxl driver for cxl region re-creation Signed-off-by: Neeraj Kumar --- drivers/nvdimm/dimm_devs.c | 18 ++++++++++++++++++ include/linux/libnvdimm.h | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/nvdimm/dimm_devs.c b/drivers/nvdimm/dimm_devs.c index 6149770c1b27..dece150580c4 100644 --- a/drivers/nvdimm/dimm_devs.c +++ b/drivers/nvdimm/dimm_devs.c @@ -280,6 +280,24 @@ void *nvdimm_provider_data(struct nvdimm *nvdimm) } EXPORT_SYMBOL_GPL(nvdimm_provider_data); =20 +bool nvdimm_has_cxl_region(struct nvdimm *nvdimm) +{ + if (nvdimm) + return nvdimm->is_region_label; + + return false; +} +EXPORT_SYMBOL_GPL(nvdimm_has_cxl_region); + +void *nvdimm_get_cxl_region_param(struct nvdimm *nvdimm) +{ + if (nvdimm) + return &nvdimm->cxl_region_params; + + return NULL; +} +EXPORT_SYMBOL_GPL(nvdimm_get_cxl_region_param); + static ssize_t commands_show(struct device *dev, struct device_attribute *attr, char *buf) { diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h index cdabb43a8a7f..9a5d17c4b89b 100644 --- a/include/linux/libnvdimm.h +++ b/include/linux/libnvdimm.h @@ -325,6 +325,8 @@ int nvdimm_in_overwrite(struct nvdimm *nvdimm); bool is_nvdimm_sync(struct nd_region *nd_region); int nd_region_label_update(struct nd_region *nd_region); int nd_region_label_delete(struct nd_region *nd_region); +bool nvdimm_has_cxl_region(struct nvdimm *nvdimm); +void *nvdimm_get_cxl_region_param(struct nvdimm *nvdimm); =20 static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void= *buf, unsigned int buf_len, int *cmd_rc) --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63E9829B8C7 for ; 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Wed, 30 Jul 2025 12:17:08 +0000 (GMT) Received: from epcas5p2.samsung.com (unknown [182.195.38.92]) by epsnrtp01.localdomain (Postfix) with ESMTP id 4bsWRl0sMkz6B9m5; Wed, 30 Jul 2025 12:17:07 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p2.samsung.com (KnoxPortal) with ESMTPA id 20250730121238epcas5p212dcce5cc5713173913ee154d5098a2c~XBljFTZu_0097600976epcas5p2O; Wed, 30 Jul 2025 12:12:38 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121237epsmtip13c8287fd090107c3e59f03af1f42d134~XBliCVJ7b0197501975epsmtip18; Wed, 30 Jul 2025 12:12:36 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 12/20] nvdimm/namespace_label: Skip region label during namespace creation Date: Wed, 30 Jul 2025 17:42:01 +0530 Message-Id: <20250730121209.303202-13-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121238epcas5p212dcce5cc5713173913ee154d5098a2c X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121238epcas5p212dcce5cc5713173913ee154d5098a2c References: <20250730121209.303202-1-s.neeraj@samsung.com> During namespace creation skip presence of region label if present. Also preserve region label into labels list if present. Signed-off-by: Neeraj Kumar --- drivers/nvdimm/namespace_devs.c | 50 +++++++++++++++++++++++++++++---- 1 file changed, 45 insertions(+), 5 deletions(-) diff --git a/drivers/nvdimm/namespace_devs.c b/drivers/nvdimm/namespace_dev= s.c index e5c2f78ca7dd..8edd26407939 100644 --- a/drivers/nvdimm/namespace_devs.c +++ b/drivers/nvdimm/namespace_devs.c @@ -1985,6 +1985,10 @@ static struct device **scan_labels(struct nd_region = *nd_region) if (!lsa_label) continue; =20 + /* skip region labels if present */ + if (is_region_label(ndd, lsa_label)) + continue; + nd_label =3D &lsa_label->ns_label; =20 /* skip labels that describe extents outside of the region */ @@ -2025,9 +2029,30 @@ static struct device **scan_labels(struct nd_region = *nd_region) =20 if (count =3D=3D 0) { struct nd_namespace_pmem *nspm; + for (i =3D 0; i < nd_region->ndr_mappings; i++) { + struct nd_label_ent *le, *e; + LIST_HEAD(list); =20 - /* Publish a zero-sized namespace for userspace to configure. */ - nd_mapping_free_labels(nd_mapping); + nd_mapping =3D &nd_region->mapping[i]; + if (list_empty(&nd_mapping->labels)) + continue; + + list_for_each_entry_safe(le, e, &nd_mapping->labels, + list) { + struct nd_lsa_label *nd_label =3D le->label; + + /* preserve region labels if present */ + if (is_region_label(ndd, nd_label)) + list_move_tail(&le->list, &list); + } + + /* + * Publish a zero-sized namespace for userspace + * to configure. + */ + nd_mapping_free_labels(nd_mapping); + list_splice_init(&list, &nd_mapping->labels); + } nspm =3D kzalloc(sizeof(*nspm), GFP_KERNEL); if (!nspm) goto err; @@ -2039,7 +2064,7 @@ static struct device **scan_labels(struct nd_region *= nd_region) } else if (is_memory(&nd_region->dev)) { /* clean unselected labels */ for (i =3D 0; i < nd_region->ndr_mappings; i++) { - struct list_head *l, *e; + struct nd_label_ent *le, *e; LIST_HEAD(list); int j; =20 @@ -2050,10 +2075,25 @@ static struct device **scan_labels(struct nd_region= *nd_region) } =20 j =3D count; - list_for_each_safe(l, e, &nd_mapping->labels) { + list_for_each_entry_safe(le, e, &nd_mapping->labels, + list) { + struct nd_lsa_label *nd_label =3D le->label; + + /* preserve region labels */ + if (is_region_label(ndd, nd_label)) { + list_move_tail(&le->list, &list); + continue; + } + + /* + * Once preserving selected ns label done + * break out of loop + */ if (!j--) break; - list_move_tail(l, &list); + + /* preserve selected ns label */ + list_move_tail(&le->list, &list); } nd_mapping_free_labels(nd_mapping); list_splice_init(&list, &nd_mapping->labels); --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0DB5A29C327 for ; Wed, 30 Jul 2025 12:17:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.34 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753877837; cv=none; b=esikgo1twK+/ett7vJ+otDKy0s7s2N5hKgwf8bxEtvt4YXoA+Yupx3TG3mCOMA5TCT7K1b1A2XUJ+m/65L9C6DfDX9lXUPKjL9ghSHoWfkStkYy5hAm7kkIcc64n2zxA0VKZfgWgON7zln5leplJC+hkghha4Gt8q/7wBdvM/x4= ARC-Message-Signature: i=1; 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Wed, 30 Jul 2025 12:12:39 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121238epsmtip1d0dabb4d91af0fa30a476a6c70c1325c~XBljUKzdA0450704507epsmtip1T; Wed, 30 Jul 2025 12:12:38 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 13/20] cxl/mem: Refactor cxl pmem region auto-assembling Date: Wed, 30 Jul 2025 17:42:02 +0530 Message-Id: <20250730121209.303202-14-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121239epcas5p37956b2999f61e17e8dbfbde7972cef35 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121239epcas5p37956b2999f61e17e8dbfbde7972cef35 References: <20250730121209.303202-1-s.neeraj@samsung.com> In 84ec985944ef3, devm_cxl_add_nvdimm() sequence was changed and called before devm_cxl_add_endpoint(). It's because cxl pmem region auto-assembly used to get called at last in cxl_endpoint_port_probe(), which requires cxl_nvd presence. For cxl region persistency, region creation happens during nvdimm_probe which need the completion of endpoint probe. In order to accommodate both cxl pmem region auto-assembly and cxl region persistency, refactored following 1. Re-Sequence devm_cxl_add_nvdimm() after devm_cxl_add_endpoint(). This will be called only after successful completion of endpoint probe. 2. Moved cxl pmem region auto-assembly from cxl_endpoint_port_probe() to cxl_mem_probe() after devm_cxl_add_nvdimm(). It gurantees both the completion of endpoint probe and cxl_nvd presence before its call. Signed-off-by: Neeraj Kumar --- drivers/cxl/core/region.c | 33 +++++++++++++++++++++++++++++++++ drivers/cxl/cxl.h | 4 ++++ drivers/cxl/mem.c | 24 +++++++++++++++--------- drivers/cxl/port.c | 39 +-------------------------------------- 4 files changed, 53 insertions(+), 47 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index e9bf42d91689..eef501f3384c 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3497,6 +3497,39 @@ int cxl_add_to_region(struct cxl_endpoint_decoder *c= xled) } EXPORT_SYMBOL_NS_GPL(cxl_add_to_region, "CXL"); =20 +static int discover_region(struct device *dev, void *unused) +{ + struct cxl_endpoint_decoder *cxled; + int rc; + + if (!is_endpoint_decoder(dev)) + return 0; + + cxled =3D to_cxl_endpoint_decoder(dev); + if ((cxled->cxld.flags & CXL_DECODER_F_ENABLE) =3D=3D 0) + return 0; + + if (cxled->state !=3D CXL_DECODER_STATE_AUTO) + return 0; + + /* + * Region enumeration is opportunistic, if this add-event fails, + * continue to the next endpoint decoder. + */ + rc =3D cxl_add_to_region(cxled); + if (rc) + dev_dbg(dev, "failed to add to region: %#llx-%#llx\n", + cxled->cxld.hpa_range.start, cxled->cxld.hpa_range.end); + + return 0; +} + +void cxl_region_discovery(struct cxl_port *port) +{ + device_for_each_child(&port->dev, NULL, discover_region); +} +EXPORT_SYMBOL_NS_GPL(cxl_region_discovery, "CXL"); + u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa) { struct cxl_region_ref *iter; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index b7111e3568d0..6edcec95e9ba 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -864,6 +864,7 @@ struct cxl_pmem_region *to_cxl_pmem_region(struct devic= e *dev); int cxl_add_to_region(struct cxl_endpoint_decoder *cxled); struct cxl_dax_region *to_cxl_dax_region(struct device *dev); u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa); +void cxl_region_discovery(struct cxl_port *port); #else static inline bool is_cxl_pmem_region(struct device *dev) { @@ -886,6 +887,9 @@ static inline u64 cxl_port_get_spa_cache_alias(struct c= xl_port *endpoint, { return 0; } +static inline void cxl_region_discovery(struct cxl_port *port) +{ +} #endif =20 void cxl_endpoint_parse_cdat(struct cxl_port *port); diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index 6e6777b7bafb..54501616ff09 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem.c @@ -152,15 +152,6 @@ static int cxl_mem_probe(struct device *dev) return -ENXIO; } =20 - if (cxl_pmem_size(cxlds) && IS_ENABLED(CONFIG_CXL_PMEM)) { - rc =3D devm_cxl_add_nvdimm(parent_port, cxlmd); - if (rc) { - if (rc =3D=3D -ENODEV) - dev_info(dev, "PMEM disabled by platform\n"); - return rc; - } - } - if (dport->rch) endpoint_parent =3D parent_port->uport_dev; else @@ -184,6 +175,21 @@ static int cxl_mem_probe(struct device *dev) if (rc) dev_dbg(dev, "CXL memdev EDAC registration failed rc=3D%d\n", rc); =20 + if (cxl_pmem_size(cxlds) && IS_ENABLED(CONFIG_CXL_PMEM)) { + rc =3D devm_cxl_add_nvdimm(parent_port, cxlmd); + if (rc) { + if (rc =3D=3D -ENODEV) + dev_info(dev, "PMEM disabled by platform\n"); + return rc; + } + } + + /* + * Now that all endpoint decoders are successfully enumerated, try to + * assemble region autodiscovery from committed decoders. + */ + cxl_region_discovery(cxlmd->endpoint); + /* * The kernel may be operating out of CXL memory on this device, * there is no spec defined way to determine whether this device diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c index fe4b593331da..090ae3577f32 100644 --- a/drivers/cxl/port.c +++ b/drivers/cxl/port.c @@ -30,33 +30,6 @@ static void schedule_detach(void *cxlmd) schedule_cxl_memdev_detach(cxlmd); } =20 -static int discover_region(struct device *dev, void *unused) -{ - struct cxl_endpoint_decoder *cxled; - int rc; - - if (!is_endpoint_decoder(dev)) - return 0; - - cxled =3D to_cxl_endpoint_decoder(dev); - if ((cxled->cxld.flags & CXL_DECODER_F_ENABLE) =3D=3D 0) - return 0; - - if (cxled->state !=3D CXL_DECODER_STATE_AUTO) - return 0; - - /* - * Region enumeration is opportunistic, if this add-event fails, - * continue to the next endpoint decoder. - */ - rc =3D cxl_add_to_region(cxled); - if (rc) - dev_dbg(dev, "failed to add to region: %#llx-%#llx\n", - cxled->cxld.hpa_range.start, cxled->cxld.hpa_range.end); - - return 0; -} - static int cxl_switch_port_probe(struct cxl_port *port) { struct cxl_hdm *cxlhdm; @@ -121,17 +94,7 @@ static int cxl_endpoint_port_probe(struct cxl_port *por= t) if (rc) return rc; =20 - rc =3D devm_cxl_enumerate_decoders(cxlhdm, &info); - if (rc) - return rc; - - /* - * Now that all endpoint decoders are successfully enumerated, try to - * assemble regions from committed decoders - */ - device_for_each_child(&port->dev, NULL, discover_region); - - return 0; + return devm_cxl_enumerate_decoders(cxlhdm, &info); } =20 static int cxl_port_probe(struct device *dev) --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 684B929CB24 for ; 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Wed, 30 Jul 2025 12:17:17 +0000 (GMT) Received: from epcas5p3.samsung.com (unknown [182.195.38.91]) by epsnrtp03.localdomain (Postfix) with ESMTP id 4bsWRw2YBYz3hhT7; Wed, 30 Jul 2025 12:17:16 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p3.samsung.com (KnoxPortal) with ESMTPA id 20250730121241epcas5p3e5708a89d764d1de9322fd759f921de0~XBllr_RIg0107801078epcas5p34; Wed, 30 Jul 2025 12:12:41 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121239epsmtip1826f4524111adab28e1fc08512b5cac7~XBlknIbEO0440404404epsmtip1_; Wed, 30 Jul 2025 12:12:39 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 14/20] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation Date: Wed, 30 Jul 2025 17:42:03 +0530 Message-Id: <20250730121209.303202-15-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121241epcas5p3e5708a89d764d1de9322fd759f921de0 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121241epcas5p3e5708a89d764d1de9322fd759f921de0 References: <20250730121209.303202-1-s.neeraj@samsung.com> devm_cxl_pmem_add_region() is used to create cxl region based on region information scanned from LSA. devm_cxl_add_region() is used to just allocate cxlr and its fields are filled later by userspace tool using device attributes (*_store()). Inspiration for devm_cxl_pmem_add_region() is taken from these device attributes (_store*) calls. It allocates cxlr and fills information parsed from LSA and calls device_add(&cxlr->dev) to initiate further region creation porbes Renamed __create_region() to cxl_create_region() and make it an exported routine. This will be used in later patch to create cxl region after fetching region information from LSA. Also created some helper routines and refactored dpa_size_store(), commit_store() to avoid duplicate code usage in devm_cxl_pmem_add_region() Signed-off-by: Neeraj Kumar --- drivers/cxl/core/core.h | 1 + drivers/cxl/core/port.c | 29 ++++++---- drivers/cxl/core/region.c | 118 +++++++++++++++++++++++++++++++++----- drivers/cxl/cxl.h | 12 ++++ 4 files changed, 134 insertions(+), 26 deletions(-) diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index 2669f251d677..80c83e0117c6 100644 --- a/drivers/cxl/core/core.h +++ b/drivers/cxl/core/core.h @@ -94,6 +94,7 @@ int cxl_dpa_free(struct cxl_endpoint_decoder *cxled); resource_size_t cxl_dpa_size(struct cxl_endpoint_decoder *cxled); resource_size_t cxl_dpa_resource_start(struct cxl_endpoint_decoder *cxled); bool cxl_resource_contains_addr(const struct resource *res, const resource= _size_t addr); +ssize_t resize_or_free_dpa(struct cxl_endpoint_decoder *cxled, u64 size); =20 enum cxl_rcrb { CXL_RCRB_DOWNSTREAM, diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 29197376b18e..ba743e31f721 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -243,16 +243,9 @@ static ssize_t dpa_size_show(struct device *dev, struc= t device_attribute *attr, return sysfs_emit(buf, "%pa\n", &size); } =20 -static ssize_t dpa_size_store(struct device *dev, struct device_attribute = *attr, - const char *buf, size_t len) +ssize_t resize_or_free_dpa(struct cxl_endpoint_decoder *cxled, u64 size) { - struct cxl_endpoint_decoder *cxled =3D to_cxl_endpoint_decoder(dev); - unsigned long long size; - ssize_t rc; - - rc =3D kstrtoull(buf, 0, &size); - if (rc) - return rc; + int rc; =20 if (!IS_ALIGNED(size, SZ_256M)) return -EINVAL; @@ -262,9 +255,23 @@ static ssize_t dpa_size_store(struct device *dev, stru= ct device_attribute *attr, return rc; =20 if (size =3D=3D 0) - return len; + return 0; + + return cxl_dpa_alloc(cxled, size); +} + +static ssize_t dpa_size_store(struct device *dev, struct device_attribute = *attr, + const char *buf, size_t len) +{ + struct cxl_endpoint_decoder *cxled =3D to_cxl_endpoint_decoder(dev); + unsigned long long size; + ssize_t rc; + + rc =3D kstrtoull(buf, 0, &size); + if (rc) + return rc; =20 - rc =3D cxl_dpa_alloc(cxled, size); + rc =3D resize_or_free_dpa(cxled, size); if (rc) return rc; =20 diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index eef501f3384c..8578e046aa78 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -703,6 +703,23 @@ static int free_hpa(struct cxl_region *cxlr) return 0; } =20 +static ssize_t resize_or_free_region_hpa(struct cxl_region *cxlr, u64 size) +{ + int rc; + + ACQUIRE(rwsem_write_kill, rwsem)(&cxl_rwsem.region); + rc =3D ACQUIRE_ERR(rwsem_write_kill, &rwsem); + if (rc) + return rc; + + if (size) + rc =3D alloc_hpa(cxlr, size); + else + rc =3D free_hpa(cxlr); + + return rc; +} + static ssize_t size_store(struct device *dev, struct device_attribute *att= r, const char *buf, size_t len) { @@ -714,15 +731,7 @@ static ssize_t size_store(struct device *dev, struct d= evice_attribute *attr, if (rc) return rc; =20 - ACQUIRE(rwsem_write_kill, rwsem)(&cxl_rwsem.region); - if ((rc =3D ACQUIRE_ERR(rwsem_write_kill, &rwsem))) - return rc; - - if (val) - rc =3D alloc_hpa(cxlr, val); - else - rc =3D free_hpa(cxlr); - + rc =3D resize_or_free_region_hpa(cxlr, val); if (rc) return rc; =20 @@ -2569,6 +2578,76 @@ static struct cxl_region *devm_cxl_add_region(struct= cxl_root_decoder *cxlrd, return ERR_PTR(rc); } =20 +static struct cxl_region * +devm_cxl_pmem_add_region(struct cxl_root_decoder *cxlrd, + int id, + enum cxl_partition_mode mode, + enum cxl_decoder_type type, + struct cxl_pmem_region_params *params, + struct cxl_decoder *cxld) +{ + struct cxl_port *root_port; + struct cxl_region *cxlr; + struct cxl_endpoint_decoder *cxled; + struct cxl_region_params *p; + struct device *dev; + int rc; + + cxlr =3D cxl_region_alloc(cxlrd, id); + if (IS_ERR(cxlr)) + return cxlr; + cxlr->mode =3D mode; + cxlr->type =3D type; + + dev =3D &cxlr->dev; + rc =3D dev_set_name(dev, "region%d", id); + if (rc) + goto err; + + p =3D &cxlr->params; + p->uuid =3D params->uuid; + p->interleave_ways =3D params->nlabel; + p->interleave_granularity =3D params->ig; + + if (resize_or_free_region_hpa(cxlr, params->rawsize)) + goto err; + + cxled =3D to_cxl_endpoint_decoder(&cxld->dev); + if (resize_or_free_dpa(cxled, 0)) + goto err; + + if (cxl_dpa_set_part(cxled, CXL_PARTMODE_PMEM)) + goto err; + + if (resize_or_free_dpa(cxled, params->rawsize)) + goto err; + + /* Attaching only one target due to interleave_way =3D=3D 1 */ + if (attach_target(cxlr, cxled, params->position, TASK_INTERRUPTIBLE)) + goto err; + + if (__commit(cxlr)) + goto err; + + rc =3D device_add(dev); + if (rc) + goto err; + + root_port =3D to_cxl_port(cxlrd->cxlsd.cxld.dev.parent); + rc =3D devm_add_action_or_reset(root_port->uport_dev, + unregister_region, cxlr); + if (rc) + return ERR_PTR(rc); + + dev_dbg(root_port->uport_dev, "%s: created %s\n", + dev_name(&cxlrd->cxlsd.cxld.dev), dev_name(dev)); + return cxlr; + +err: + put_device(dev); + return ERR_PTR(rc); +} + static ssize_t __create_region_show(struct cxl_root_decoder *cxlrd, char *= buf) { return sysfs_emit(buf, "region%u\n", atomic_read(&cxlrd->region_id)); @@ -2586,8 +2665,10 @@ static ssize_t create_ram_region_show(struct device = *dev, return __create_region_show(to_cxl_root_decoder(dev), buf); } =20 -static struct cxl_region *__create_region(struct cxl_root_decoder *cxlrd, - enum cxl_partition_mode mode, int id) +struct cxl_region *cxl_create_region(struct cxl_root_decoder *cxlrd, + enum cxl_partition_mode mode, int id, + struct cxl_pmem_region_params *params, + struct cxl_decoder *cxld) { int rc; =20 @@ -2609,8 +2690,14 @@ static struct cxl_region *__create_region(struct cxl= _root_decoder *cxlrd, return ERR_PTR(-EBUSY); } =20 - return devm_cxl_add_region(cxlrd, id, mode, CXL_DECODER_HOSTONLYMEM); + if (params) + return devm_cxl_pmem_add_region(cxlrd, id, mode, + CXL_DECODER_HOSTONLYMEM, params, cxld); + else + return devm_cxl_add_region(cxlrd, id, mode, + CXL_DECODER_HOSTONLYMEM); } +EXPORT_SYMBOL_NS_GPL(cxl_create_region, "CXL"); =20 static ssize_t create_region_store(struct device *dev, const char *buf, size_t len, enum cxl_partition_mode mode) @@ -2623,7 +2710,7 @@ static ssize_t create_region_store(struct device *dev= , const char *buf, if (rc !=3D 1) return -EINVAL; =20 - cxlr =3D __create_region(cxlrd, mode, id); + cxlr =3D cxl_create_region(cxlrd, mode, id, NULL, NULL); if (IS_ERR(cxlr)) return PTR_ERR(cxlr); =20 @@ -3414,8 +3501,9 @@ static struct cxl_region *construct_region(struct cxl= _root_decoder *cxlrd, struct cxl_region *cxlr; =20 do { - cxlr =3D __create_region(cxlrd, cxlds->part[part].mode, - atomic_read(&cxlrd->region_id)); + cxlr =3D cxl_create_region(cxlrd, cxlds->part[part].mode, + atomic_read(&cxlrd->region_id), + NULL, NULL); } while (IS_ERR(cxlr) && PTR_ERR(cxlr) =3D=3D -EBUSY); =20 if (IS_ERR(cxlr)) { diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 6edcec95e9ba..129db2e49aa7 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -865,6 +865,10 @@ int cxl_add_to_region(struct cxl_endpoint_decoder *cxl= ed); struct cxl_dax_region *to_cxl_dax_region(struct device *dev); u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa); void cxl_region_discovery(struct cxl_port *port); +struct cxl_region *cxl_create_region(struct cxl_root_decoder *cxlrd, + enum cxl_partition_mode mode, int id, + struct cxl_pmem_region_params *params, + struct cxl_decoder *cxld); #else static inline bool is_cxl_pmem_region(struct device *dev) { @@ -890,6 +894,14 @@ static inline u64 cxl_port_get_spa_cache_alias(struct = cxl_port *endpoint, static inline void cxl_region_discovery(struct cxl_port *port) { } +static inline struct cxl_region * +cxl_create_region(struct cxl_root_decoder *cxlrd, + enum cxl_partition_mode mode, int id, + struct cxl_pmem_region_params *params, + struct cxl_decoder *cxld) +{ + return NULL; +} #endif =20 void cxl_endpoint_parse_cdat(struct cxl_port *port); --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BB9C295D91 for ; Wed, 30 Jul 2025 12:17:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.25 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Wed, 30 Jul 2025 12:17:21 +0000 (GMT) Received: from epcas5p1.samsung.com (unknown [182.195.38.87]) by epsnrtp01.localdomain (Postfix) with ESMTP id 4bsWS03GH3z6B9m5; Wed, 30 Jul 2025 12:17:20 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p4.samsung.com (KnoxPortal) with ESMTPA id 20250730121242epcas5p4bdfc11e82e28d525364262fb2b6d8feb~XBlnEHh4N2430924309epcas5p4p; Wed, 30 Jul 2025 12:12:42 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121241epsmtip1f1f2c514fb546bf544978d7f9523112e~XBll6uwfN0426504265epsmtip1A; Wed, 30 Jul 2025 12:12:41 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 15/20] cxl: Add a routine to find cxl root decoder on cxl bus using cxl port Date: Wed, 30 Jul 2025 17:42:04 +0530 Message-Id: <20250730121209.303202-16-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121242epcas5p4bdfc11e82e28d525364262fb2b6d8feb X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121242epcas5p4bdfc11e82e28d525364262fb2b6d8feb References: <20250730121209.303202-1-s.neeraj@samsung.com> Add cxl_find_root_decoder_by_port() to find root decoder on cxl bus. It is used to find root decoder using cxl port. Signed-off-by: Neeraj Kumar --- drivers/cxl/core/port.c | 27 +++++++++++++++++++++++++++ drivers/cxl/cxl.h | 1 + 2 files changed, 28 insertions(+) diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index ba743e31f721..c1bb0e0286ed 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -524,6 +524,33 @@ struct cxl_switch_decoder *to_cxl_switch_decoder(struc= t device *dev) } EXPORT_SYMBOL_NS_GPL(to_cxl_switch_decoder, "CXL"); =20 +static int match_root_decoder(struct device *dev, const void *data) +{ + return is_root_decoder(dev); +} + +/** + * cxl_find_root_decoder_by_port() - find a cxl root decoder on cxl bus + * @port: any descendant port in CXL port topology + */ +struct cxl_root_decoder *cxl_find_root_decoder_by_port(struct cxl_port *po= rt) +{ + struct cxl_root *cxl_root __free(put_cxl_root) =3D find_cxl_root(port); + struct device *dev; + + if (!cxl_root) + return NULL; + + dev =3D device_find_child(&cxl_root->port.dev, NULL, match_root_decoder); + if (!dev) + return NULL; + + /* Release device ref taken via device_find_child() */ + put_device(dev); + return to_cxl_root_decoder(dev); +} +EXPORT_SYMBOL_NS_GPL(cxl_find_root_decoder_by_port, "CXL"); + static void cxl_ep_release(struct cxl_ep *ep) { put_device(ep->ep); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 129db2e49aa7..e249372b642d 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -857,6 +857,7 @@ struct cxl_nvdimm *to_cxl_nvdimm(struct device *dev); bool is_cxl_nvdimm(struct device *dev); int devm_cxl_add_nvdimm(struct cxl_port *parent_port, struct cxl_memdev *c= xlmd); struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct cxl_port *port); +struct cxl_root_decoder *cxl_find_root_decoder_by_port(struct cxl_port *po= rt); =20 #ifdef CONFIG_CXL_REGION bool is_cxl_pmem_region(struct device *dev); --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E2FD029E0EF for ; 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Wed, 30 Jul 2025 12:17:25 +0000 (GMT) Received: from epcas5p2.samsung.com (unknown [182.195.38.94]) by epsnrtp01.localdomain (Postfix) with ESMTP id 4bsWS46S3Fz6B9m5; Wed, 30 Jul 2025 12:17:24 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p4.samsung.com (KnoxPortal) with ESMTPA id 20250730121243epcas5p4c40126a3cf5c8019b36eb8287c3ec2c8~XBloOwOKS0910609106epcas5p4Z; Wed, 30 Jul 2025 12:12:43 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121242epsmtip12bdc71955106fc2fbe7c3fde57cda3a1~XBlnMOYEI0440404404epsmtip1-; Wed, 30 Jul 2025 12:12:42 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 16/20] cxl/mem: Preserve cxl root decoder during mem probe Date: Wed, 30 Jul 2025 17:42:05 +0530 Message-Id: <20250730121209.303202-17-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121243epcas5p4c40126a3cf5c8019b36eb8287c3ec2c8 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121243epcas5p4c40126a3cf5c8019b36eb8287c3ec2c8 References: <20250730121209.303202-1-s.neeraj@samsung.com> Saved root decoder info is required for cxl region persistency Signed-off-by: Neeraj Kumar --- drivers/cxl/cxlmem.h | 1 + drivers/cxl/mem.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index 751478dfc410..72dfcf4671f2 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -59,6 +59,7 @@ struct cxl_memdev { struct cxl_nvdimm_bridge *cxl_nvb; struct cxl_nvdimm *cxl_nvd; struct cxl_port *endpoint; + struct cxl_root_decoder *cxlrd; int id; int depth; u8 scrub_cycle; diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index 54501616ff09..1a0da7253a24 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem.c @@ -152,6 +152,8 @@ static int cxl_mem_probe(struct device *dev) return -ENXIO; } =20 + cxlmd->cxlrd =3D cxl_find_root_decoder_by_port(parent_port); + if (dport->rch) endpoint_parent =3D parent_port->uport_dev; else --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout1.samsung.com (mailout1.samsung.com [203.254.224.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 438CF29E107 for ; Wed, 30 Jul 2025 12:17:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.24 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753877854; cv=none; b=FSw8PFUBqlS7/D6jq1G94zeKMyJxieZ9IzaDXHs6vkzSKHIvRTJ0XSCz8vDYg9OtuZVRNpZP72ymTTkz5Wsc90gg1fnIQ0A3/7aEM0/aJYxnum7d9RWHeiruZ4XmCKL79JDZ3WhCXfyFN1ovDryu90kaIVkIdCbs4p/PiMhaKZo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753877854; c=relaxed/simple; bh=8QH1l6WhkxI25RXDqtdyvnQAdOa9RFZNwZRhHLcA25w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:MIME-Version: Content-Type:References; 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Wed, 30 Jul 2025 12:12:43 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 17/20] cxl/pmem: Preserve region information into nd_set Date: Wed, 30 Jul 2025 17:42:06 +0530 Message-Id: <20250730121209.303202-18-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121245epcas5p247b6675350f4f7e70e9b3c8465340e84 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121245epcas5p247b6675350f4f7e70e9b3c8465340e84 References: <20250730121209.303202-1-s.neeraj@samsung.com> Save region information stored in cxlr to nd_set during cxl_pmem_region_probe in nd_set. This saved region information is being stored into LSA, which will be used for cxl region persistence Signed-off-by: Neeraj Kumar --- drivers/cxl/pmem.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/cxl/pmem.c b/drivers/cxl/pmem.c index e197883690ef..38a5bcdc68ce 100644 --- a/drivers/cxl/pmem.c +++ b/drivers/cxl/pmem.c @@ -377,6 +377,7 @@ static int cxl_pmem_region_probe(struct device *dev) struct nd_mapping_desc mappings[CXL_DECODER_MAX_INTERLEAVE]; struct cxl_pmem_region *cxlr_pmem =3D to_cxl_pmem_region(dev); struct cxl_region *cxlr =3D cxlr_pmem->cxlr; + struct cxl_region_params *p =3D &cxlr->params; struct cxl_nvdimm_bridge *cxl_nvb =3D cxlr->cxl_nvb; struct cxl_pmem_region_info *info =3D NULL; struct nd_interleave_set *nd_set; @@ -465,12 +466,12 @@ static int cxl_pmem_region_probe(struct device *dev) ndr_desc.num_mappings =3D cxlr_pmem->nr_mappings; ndr_desc.mapping =3D mappings; =20 - /* - * TODO enable CXL labels which skip the need for 'interleave-set cookie' - */ - nd_set->cookie1 =3D - nd_fletcher64(info, sizeof(*info) * cxlr_pmem->nr_mappings, 0); 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Wed, 30 Jul 2025 12:12:46 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121245epsmtip14f19240cbd39db281060e427fa204d36~XBlpuwWOi0450704507epsmtip1U; Wed, 30 Jul 2025 12:12:45 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 18/20] cxl/pmem: Add support of cxl lsa 2.1 support in cxl pmem Date: Wed, 30 Jul 2025 17:42:07 +0530 Message-Id: <20250730121209.303202-19-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121246epcas5p48a2fd8e653f05a0282cbffc1f702f26f X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121246epcas5p48a2fd8e653f05a0282cbffc1f702f26f References: <20250730121209.303202-1-s.neeraj@samsung.com> Add support of cxl lsa 2.1 using NDD_CXL_LABEL flag. It also creates cxl region based on region information parsed from LSA. Signed-off-by: Neeraj Kumar --- drivers/cxl/core/region.c | 58 +++++++++++++++++++++++++++++++++++++++ drivers/cxl/cxl.h | 4 +++ drivers/cxl/pmem.c | 2 ++ 3 files changed, 64 insertions(+) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 8578e046aa78..19ccdd136da0 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -2665,6 +2665,64 @@ static ssize_t create_ram_region_show(struct device = *dev, return __create_region_show(to_cxl_root_decoder(dev), buf); } =20 +static int match_free_ep_decoder(struct device *dev, const void *data) +{ + struct cxl_decoder *cxld =3D to_cxl_decoder(dev); + + return !cxld->region; +} + +static struct cxl_decoder *cxl_find_free_ep_decoder(struct cxl_port *port) +{ + struct device *dev; + + dev =3D device_find_child(&port->dev, NULL, match_free_ep_decoder); + if (!dev) + return NULL; + + /* Release device ref taken via device_find_child() */ + put_device(dev); + return to_cxl_decoder(dev); +} + +void create_pmem_region(struct nvdimm *nvdimm) +{ + struct cxl_nvdimm *cxl_nvd; + struct cxl_memdev *cxlmd; + struct cxl_nvdimm_bridge *cxl_nvb; + struct cxl_pmem_region_params *params; + struct cxl_root_decoder *cxlrd; + struct cxl_decoder *cxld; + struct cxl_region *cxlr; + + if (!nvdimm_has_cxl_region(nvdimm)) + return; + + lockdep_assert_held(&cxl_rwsem.region); + cxl_nvd =3D nvdimm_provider_data(nvdimm); + params =3D nvdimm_get_cxl_region_param(nvdimm); + cxlmd =3D cxl_nvd->cxlmd; + cxl_nvb =3D cxlmd->cxl_nvb; + cxlrd =3D cxlmd->cxlrd; + + /* + * FIXME: Limitation: Region creation support only for + * interleave way =3D=3D 1 + */ + if (!(params->nlabel =3D=3D 1)) + dev_info(&cxlmd->dev, + "Region Creation is not supported with iw > 1\n"); + else { + cxld =3D cxl_find_free_ep_decoder(cxlmd->endpoint); + cxlr =3D cxl_create_region(cxlrd, CXL_PARTMODE_PMEM, + atomic_read(&cxlrd->region_id), + params, cxld); + if (IS_ERR(cxlr)) + dev_info(&cxlmd->dev, "Region Creation failed\n"); + } +} +EXPORT_SYMBOL_NS_GPL(create_pmem_region, "CXL"); + struct cxl_region *cxl_create_region(struct cxl_root_decoder *cxlrd, enum cxl_partition_mode mode, int id, struct cxl_pmem_region_params *params, diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index e249372b642d..51c56069f451 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -870,6 +870,7 @@ struct cxl_region *cxl_create_region(struct cxl_root_de= coder *cxlrd, enum cxl_partition_mode mode, int id, struct cxl_pmem_region_params *params, struct cxl_decoder *cxld); +void create_pmem_region(struct nvdimm *nvdimm); #else static inline bool is_cxl_pmem_region(struct device *dev) { @@ -903,6 +904,9 @@ cxl_create_region(struct cxl_root_decoder *cxlrd, { return NULL; } +static inline void create_pmem_region(struct nvdimm *nvdimm) +{ +} #endif =20 void cxl_endpoint_parse_cdat(struct cxl_port *port); diff --git a/drivers/cxl/pmem.c b/drivers/cxl/pmem.c index 38a5bcdc68ce..4a7428a5a82c 100644 --- a/drivers/cxl/pmem.c +++ b/drivers/cxl/pmem.c @@ -135,6 +135,7 @@ static int cxl_nvdimm_probe(struct device *dev) return rc; =20 set_bit(NDD_LABELING, &flags); + set_bit(NDD_CXL_LABEL, &flags); set_bit(NDD_REGISTER_SYNC, &flags); set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask); set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask); @@ -155,6 +156,7 @@ static int cxl_nvdimm_probe(struct device *dev) return -ENOMEM; =20 dev_set_drvdata(dev, nvdimm); + create_pmem_region(nvdimm); return devm_add_action_or_reset(dev, unregister_nvdimm, nvdimm); } =20 --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF227296142 for ; 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Wed, 30 Jul 2025 12:17:39 +0000 (GMT) Received: from epcas5p4.samsung.com (unknown [182.195.38.90]) by epsnrtp01.localdomain (Postfix) with ESMTP id 4bsWSL72xqz6B9m7; Wed, 30 Jul 2025 12:17:38 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p4.samsung.com (KnoxPortal) with ESMTPA id 20250730121247epcas5p425b79da65bcb003917cbf02fc047a7db~XBlsFJpZw0910709107epcas5p4n; Wed, 30 Jul 2025 12:12:47 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121246epsmtip1f68f907d031285e2dd75cbbb6f6e7600~XBlrAp5RF0440404404epsmtip1B; Wed, 30 Jul 2025 12:12:46 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 19/20] cxl/pmem_region: Prep patch to accommodate pmem_region attributes Date: Wed, 30 Jul 2025 17:42:08 +0530 Message-Id: <20250730121209.303202-20-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121247epcas5p425b79da65bcb003917cbf02fc047a7db X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121247epcas5p425b79da65bcb003917cbf02fc047a7db References: <20250730121209.303202-1-s.neeraj@samsung.com> Created a separate file core/pmem_region.c along with CONFIG_PMEM_REGION Moved pmem_region related code from core/region.c to core/pmem_region.c For region label update, need to create device attribute, which calls nvdimm exported function thus making pmem_region dependent on libnvdimm. Because of this dependency of pmem region on libnvdimm, segregated pmem region related code from core/region.c Signed-off-by: Neeraj Kumar --- drivers/cxl/Kconfig | 12 ++ drivers/cxl/core/Makefile | 1 + drivers/cxl/core/core.h | 8 +- drivers/cxl/core/pmem_region.c | 202 +++++++++++++++++++++++++++++++++ drivers/cxl/core/port.c | 2 +- drivers/cxl/core/region.c | 191 +------------------------------ drivers/cxl/cxl.h | 34 ++++-- tools/testing/cxl/Kbuild | 1 + 8 files changed, 251 insertions(+), 200 deletions(-) create mode 100644 drivers/cxl/core/pmem_region.c diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig index 48b7314afdb8..33d9fceb5975 100644 --- a/drivers/cxl/Kconfig +++ b/drivers/cxl/Kconfig @@ -211,6 +211,18 @@ config CXL_REGION =20 If unsure say 'y' =20 +config CXL_PMEM_REGION + bool "CXL: Pmem Region Support" + default CXL_BUS + depends on CXL_REGION + select LIBNVDIMM + help + Enable the CXL core to enumerate and provision CXL pmem regions. + A CXL pmem region need to update region label into LSA. For LSA + updation/deletion libnvdimm is required. + + If unsure say 'y' + config CXL_REGION_INVALIDATION_TEST bool "CXL: Region Cache Management Bypass (TEST)" depends on CXL_REGION diff --git a/drivers/cxl/core/Makefile b/drivers/cxl/core/Makefile index 5ad8fef210b5..399157beb917 100644 --- a/drivers/cxl/core/Makefile +++ b/drivers/cxl/core/Makefile @@ -17,6 +17,7 @@ cxl_core-y +=3D cdat.o cxl_core-y +=3D ras.o cxl_core-$(CONFIG_TRACING) +=3D trace.o cxl_core-$(CONFIG_CXL_REGION) +=3D region.o +cxl_core-$(CONFIG_CXL_PMEM_REGION) +=3D pmem_region.o cxl_core-$(CONFIG_CXL_MCE) +=3D mce.o cxl_core-$(CONFIG_CXL_FEATURES) +=3D features.o cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) +=3D edac.o diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index 80c83e0117c6..e3869c3d53bf 100644 --- a/drivers/cxl/core/core.h +++ b/drivers/cxl/core/core.h @@ -34,7 +34,6 @@ int cxl_decoder_detach(struct cxl_region *cxlr, #define CXL_REGION_ATTR(x) (&dev_attr_##x.attr) #define CXL_REGION_TYPE(x) (&cxl_region_type) #define SET_CXL_REGION_ATTR(x) (&dev_attr_##x.attr), -#define CXL_PMEM_REGION_TYPE(x) (&cxl_pmem_region_type) #define CXL_DAX_REGION_TYPE(x) (&cxl_dax_region_type) int cxl_region_init(void); void cxl_region_exit(void); @@ -74,10 +73,15 @@ static inline void cxl_region_exit(void) #define CXL_REGION_ATTR(x) NULL #define CXL_REGION_TYPE(x) NULL #define SET_CXL_REGION_ATTR(x) -#define CXL_PMEM_REGION_TYPE(x) NULL #define CXL_DAX_REGION_TYPE(x) NULL #endif =20 +#ifdef CONFIG_CXL_PMEM_REGION +#define CXL_PMEM_REGION_TYPE (&cxl_pmem_region_type) +#else +#define CXL_PMEM_REGION_TYPE NULL +#endif + struct cxl_send_command; struct cxl_mem_query_commands; int cxl_query_cmd(struct cxl_mailbox *cxl_mbox, diff --git a/drivers/cxl/core/pmem_region.c b/drivers/cxl/core/pmem_region.c new file mode 100644 index 000000000000..cd1177d345e6 --- /dev/null +++ b/drivers/cxl/core/pmem_region.c @@ -0,0 +1,202 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright(c) 2020 Intel Corporation. */ +#include +#include +#include +#include +#include "core.h" + +/** + * DOC: cxl pmem region + * + * The core CXL PMEM region infrastructure supports persistent memory + * region creation using LIBNVDIMM subsystem. It has dependency on + * LIBNVDIMM, pmem region need updation of cxl region information into + * LSA. LIBNVDIMM dependency is only for pmem region, it is therefore + * need this separate file. + */ + +bool is_cxl_pmem_region(struct device *dev) +{ + return dev->type =3D=3D &cxl_pmem_region_type; +} +EXPORT_SYMBOL_NS_GPL(is_cxl_pmem_region, "CXL"); + +struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev) +{ + if (dev_WARN_ONCE(dev, !is_cxl_pmem_region(dev), + "not a cxl_pmem_region device\n")) + return NULL; + return container_of(dev, struct cxl_pmem_region, dev); +} +EXPORT_SYMBOL_NS_GPL(to_cxl_pmem_region, "CXL"); + +static void cxl_pmem_region_release(struct device *dev) +{ + struct cxl_pmem_region *cxlr_pmem =3D to_cxl_pmem_region(dev); + int i; + + for (i =3D 0; i < cxlr_pmem->nr_mappings; i++) { + struct cxl_memdev *cxlmd =3D cxlr_pmem->mapping[i].cxlmd; + + put_device(&cxlmd->dev); + } + + kfree(cxlr_pmem); +} + +static const struct attribute_group *cxl_pmem_region_attribute_groups[] = =3D { + &cxl_base_attribute_group, + NULL, +}; + +const struct device_type cxl_pmem_region_type =3D { + .name =3D "cxl_pmem_region", + .release =3D cxl_pmem_region_release, + .groups =3D cxl_pmem_region_attribute_groups, +}; + +static struct lock_class_key cxl_pmem_region_key; + +static int cxl_pmem_region_alloc(struct cxl_region *cxlr) +{ + struct cxl_region_params *p =3D &cxlr->params; + struct cxl_nvdimm_bridge *cxl_nvb; + struct device *dev; + int i; + + guard(rwsem_read)(&cxl_rwsem.region); + if (p->state !=3D CXL_CONFIG_COMMIT) + return -ENXIO; + + struct cxl_pmem_region *cxlr_pmem __free(kfree) =3D + kzalloc(struct_size(cxlr_pmem, mapping, p->nr_targets), GFP_KERNEL); + if (!cxlr_pmem) + return -ENOMEM; + + cxlr_pmem->hpa_range.start =3D p->res->start; + cxlr_pmem->hpa_range.end =3D p->res->end; + + /* Snapshot the region configuration underneath the cxl_region_rwsem */ + cxlr_pmem->nr_mappings =3D p->nr_targets; + for (i =3D 0; i < p->nr_targets; i++) { + struct cxl_endpoint_decoder *cxled =3D p->targets[i]; + struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); + struct cxl_pmem_region_mapping *m =3D &cxlr_pmem->mapping[i]; + + /* + * Regions never span CXL root devices, so by definition the + * bridge for one device is the same for all. + */ + if (i =3D=3D 0) { + cxl_nvb =3D cxl_find_nvdimm_bridge(cxlmd->endpoint); + if (!cxl_nvb) + return -ENODEV; + cxlr->cxl_nvb =3D cxl_nvb; + } + m->cxlmd =3D cxlmd; + get_device(&cxlmd->dev); + m->start =3D cxled->dpa_res->start; + m->size =3D resource_size(cxled->dpa_res); + m->position =3D i; + } + + dev =3D &cxlr_pmem->dev; + device_initialize(dev); + lockdep_set_class(&dev->mutex, &cxl_pmem_region_key); + device_set_pm_not_required(dev); + dev->parent =3D &cxlr->dev; + dev->bus =3D &cxl_bus_type; + dev->type =3D &cxl_pmem_region_type; + cxlr_pmem->cxlr =3D cxlr; + cxlr->cxlr_pmem =3D no_free_ptr(cxlr_pmem); + + return 0; +} + +static void cxlr_pmem_unregister(void *_cxlr_pmem) +{ + struct cxl_pmem_region *cxlr_pmem =3D _cxlr_pmem; + struct cxl_region *cxlr =3D cxlr_pmem->cxlr; + struct cxl_nvdimm_bridge *cxl_nvb =3D cxlr->cxl_nvb; + + /* + * Either the bridge is in ->remove() context under the device_lock(), + * or cxlr_release_nvdimm() is cancelling the bridge's release action + * for @cxlr_pmem and doing it itself (while manually holding the bridge + * lock). + */ + device_lock_assert(&cxl_nvb->dev); + cxlr->cxlr_pmem =3D NULL; + cxlr_pmem->cxlr =3D NULL; + device_unregister(&cxlr_pmem->dev); +} + +static void cxlr_release_nvdimm(void *_cxlr) +{ + struct cxl_region *cxlr =3D _cxlr; + struct cxl_nvdimm_bridge *cxl_nvb =3D cxlr->cxl_nvb; + + scoped_guard(device, &cxl_nvb->dev) { + if (cxlr->cxlr_pmem) + devm_release_action(&cxl_nvb->dev, cxlr_pmem_unregister, + cxlr->cxlr_pmem); + } + cxlr->cxl_nvb =3D NULL; + put_device(&cxl_nvb->dev); +} + +/** + * devm_cxl_add_pmem_region() - add a cxl_region-to-nd_region bridge + * @cxlr: parent CXL region for this pmem region bridge device + * + * Return: 0 on success negative error code on failure. + */ +int devm_cxl_add_pmem_region(struct cxl_region *cxlr) +{ + struct cxl_pmem_region *cxlr_pmem; + struct cxl_nvdimm_bridge *cxl_nvb; + struct device *dev; + int rc; + + rc =3D cxl_pmem_region_alloc(cxlr); + if (rc) + return rc; + cxlr_pmem =3D cxlr->cxlr_pmem; + cxl_nvb =3D cxlr->cxl_nvb; + + dev =3D &cxlr_pmem->dev; + rc =3D dev_set_name(dev, "pmem_region%d", cxlr->id); + if (rc) + goto err; + + rc =3D device_add(dev); + if (rc) + goto err; + + dev_dbg(&cxlr->dev, "%s: register %s\n", dev_name(dev->parent), + dev_name(dev)); + + scoped_guard(device, &cxl_nvb->dev) { + if (cxl_nvb->dev.driver) + rc =3D devm_add_action_or_reset(&cxl_nvb->dev, + cxlr_pmem_unregister, + cxlr_pmem); + else + rc =3D -ENXIO; + } + + if (rc) + goto err_bridge; + + /* @cxlr carries a reference on @cxl_nvb until cxlr_release_nvdimm */ + return devm_add_action_or_reset(&cxlr->dev, cxlr_release_nvdimm, cxlr); + +err: + put_device(dev); +err_bridge: + put_device(&cxl_nvb->dev); + cxlr->cxl_nvb =3D NULL; + return rc; +} +EXPORT_SYMBOL_NS_GPL(devm_cxl_add_pmem_region, "CXL"); diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index c1bb0e0286ed..11ddf7ed8357 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -53,7 +53,7 @@ static int cxl_device_id(const struct device *dev) return CXL_DEVICE_NVDIMM_BRIDGE; if (dev->type =3D=3D &cxl_nvdimm_type) return CXL_DEVICE_NVDIMM; - if (dev->type =3D=3D CXL_PMEM_REGION_TYPE()) + if (dev->type =3D=3D CXL_PMEM_REGION_TYPE) return CXL_DEVICE_PMEM_REGION; if (dev->type =3D=3D CXL_DAX_REGION_TYPE()) return CXL_DEVICE_DAX_REGION; diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 19ccdd136da0..f064e031c28a 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -30,8 +30,6 @@ * 3. Decoder targets */ =20 -static struct cxl_region *to_cxl_region(struct device *dev); - #define __ACCESS_ATTR_RO(_level, _name) { \ .attr =3D { .name =3D __stringify(_name), .mode =3D 0444 }, \ .show =3D _name##_access##_level##_show, \ @@ -2385,7 +2383,7 @@ bool is_cxl_region(struct device *dev) } EXPORT_SYMBOL_NS_GPL(is_cxl_region, "CXL"); =20 -static struct cxl_region *to_cxl_region(struct device *dev) +struct cxl_region *to_cxl_region(struct device *dev) { if (dev_WARN_ONCE(dev, dev->type !=3D &cxl_region_type, "not a cxl_region device\n")) @@ -2393,6 +2391,7 @@ static struct cxl_region *to_cxl_region(struct device= *dev) =20 return container_of(dev, struct cxl_region, dev); } +EXPORT_SYMBOL_NS_GPL(to_cxl_region, "CXL"); =20 static void unregister_region(void *_cxlr) { @@ -2839,46 +2838,6 @@ static ssize_t delete_region_store(struct device *de= v, } DEVICE_ATTR_WO(delete_region); =20 -static void cxl_pmem_region_release(struct device *dev) -{ - struct cxl_pmem_region *cxlr_pmem =3D to_cxl_pmem_region(dev); - int i; - - for (i =3D 0; i < cxlr_pmem->nr_mappings; i++) { - struct cxl_memdev *cxlmd =3D cxlr_pmem->mapping[i].cxlmd; - - put_device(&cxlmd->dev); - } - - kfree(cxlr_pmem); -} - -static const struct attribute_group *cxl_pmem_region_attribute_groups[] = =3D { - &cxl_base_attribute_group, - NULL, -}; - -const struct device_type cxl_pmem_region_type =3D { - .name =3D "cxl_pmem_region", - .release =3D cxl_pmem_region_release, - .groups =3D cxl_pmem_region_attribute_groups, -}; - -bool is_cxl_pmem_region(struct device *dev) -{ - return dev->type =3D=3D &cxl_pmem_region_type; -} -EXPORT_SYMBOL_NS_GPL(is_cxl_pmem_region, "CXL"); - -struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev) -{ - if (dev_WARN_ONCE(dev, !is_cxl_pmem_region(dev), - "not a cxl_pmem_region device\n")) - return NULL; - return container_of(dev, struct cxl_pmem_region, dev); -} -EXPORT_SYMBOL_NS_GPL(to_cxl_pmem_region, "CXL"); - struct cxl_poison_context { struct cxl_port *port; int part; @@ -3133,64 +3092,6 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const st= ruct cxl_memdev *cxlmd, return hpa; } =20 -static struct lock_class_key cxl_pmem_region_key; - -static int cxl_pmem_region_alloc(struct cxl_region *cxlr) -{ - struct cxl_region_params *p =3D &cxlr->params; - struct cxl_nvdimm_bridge *cxl_nvb; - struct device *dev; - int i; - - guard(rwsem_read)(&cxl_rwsem.region); - if (p->state !=3D CXL_CONFIG_COMMIT) - return -ENXIO; - - struct cxl_pmem_region *cxlr_pmem __free(kfree) =3D - kzalloc(struct_size(cxlr_pmem, mapping, p->nr_targets), GFP_KERNEL); - if (!cxlr_pmem) - return -ENOMEM; - - cxlr_pmem->hpa_range.start =3D p->res->start; - cxlr_pmem->hpa_range.end =3D p->res->end; - - /* Snapshot the region configuration underneath the cxl_rwsem.region */ - cxlr_pmem->nr_mappings =3D p->nr_targets; - for (i =3D 0; i < p->nr_targets; i++) { - struct cxl_endpoint_decoder *cxled =3D p->targets[i]; - struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); - struct cxl_pmem_region_mapping *m =3D &cxlr_pmem->mapping[i]; - - /* - * Regions never span CXL root devices, so by definition the - * bridge for one device is the same for all. - */ - if (i =3D=3D 0) { - cxl_nvb =3D cxl_find_nvdimm_bridge(cxlmd->endpoint); - if (!cxl_nvb) - return -ENODEV; - cxlr->cxl_nvb =3D cxl_nvb; - } - m->cxlmd =3D cxlmd; - get_device(&cxlmd->dev); - m->start =3D cxled->dpa_res->start; - m->size =3D resource_size(cxled->dpa_res); - m->position =3D i; - } - - dev =3D &cxlr_pmem->dev; - device_initialize(dev); - lockdep_set_class(&dev->mutex, &cxl_pmem_region_key); - device_set_pm_not_required(dev); - dev->parent =3D &cxlr->dev; - dev->bus =3D &cxl_bus_type; - dev->type =3D &cxl_pmem_region_type; - cxlr_pmem->cxlr =3D cxlr; - cxlr->cxlr_pmem =3D no_free_ptr(cxlr_pmem); - - return 0; -} - static void cxl_dax_region_release(struct device *dev) { struct cxl_dax_region *cxlr_dax =3D to_cxl_dax_region(dev); @@ -3254,92 +3155,6 @@ static struct cxl_dax_region *cxl_dax_region_alloc(s= truct cxl_region *cxlr) return cxlr_dax; } =20 -static void cxlr_pmem_unregister(void *_cxlr_pmem) -{ - struct cxl_pmem_region *cxlr_pmem =3D _cxlr_pmem; - struct cxl_region *cxlr =3D cxlr_pmem->cxlr; - struct cxl_nvdimm_bridge *cxl_nvb =3D cxlr->cxl_nvb; - - /* - * Either the bridge is in ->remove() context under the device_lock(), - * or cxlr_release_nvdimm() is cancelling the bridge's release action - * for @cxlr_pmem and doing it itself (while manually holding the bridge - * lock). - */ - device_lock_assert(&cxl_nvb->dev); - cxlr->cxlr_pmem =3D NULL; - cxlr_pmem->cxlr =3D NULL; - device_unregister(&cxlr_pmem->dev); -} - -static void cxlr_release_nvdimm(void *_cxlr) -{ - struct cxl_region *cxlr =3D _cxlr; - struct cxl_nvdimm_bridge *cxl_nvb =3D cxlr->cxl_nvb; - - scoped_guard(device, &cxl_nvb->dev) { - if (cxlr->cxlr_pmem) - devm_release_action(&cxl_nvb->dev, cxlr_pmem_unregister, - cxlr->cxlr_pmem); - } - cxlr->cxl_nvb =3D NULL; - put_device(&cxl_nvb->dev); -} - -/** - * devm_cxl_add_pmem_region() - add a cxl_region-to-nd_region bridge - * @cxlr: parent CXL region for this pmem region bridge device - * - * Return: 0 on success negative error code on failure. - */ -static int devm_cxl_add_pmem_region(struct cxl_region *cxlr) -{ - struct cxl_pmem_region *cxlr_pmem; - struct cxl_nvdimm_bridge *cxl_nvb; - struct device *dev; - int rc; - - rc =3D cxl_pmem_region_alloc(cxlr); - if (rc) - return rc; - cxlr_pmem =3D cxlr->cxlr_pmem; - cxl_nvb =3D cxlr->cxl_nvb; - - dev =3D &cxlr_pmem->dev; - rc =3D dev_set_name(dev, "pmem_region%d", cxlr->id); - if (rc) - goto err; - - rc =3D device_add(dev); - if (rc) - goto err; - - dev_dbg(&cxlr->dev, "%s: register %s\n", dev_name(dev->parent), - dev_name(dev)); - - scoped_guard(device, &cxl_nvb->dev) { - if (cxl_nvb->dev.driver) - rc =3D devm_add_action_or_reset(&cxl_nvb->dev, - cxlr_pmem_unregister, - cxlr_pmem); - else - rc =3D -ENXIO; - } - - if (rc) - goto err_bridge; - - /* @cxlr carries a reference on @cxl_nvb until cxlr_release_nvdimm */ - return devm_add_action_or_reset(&cxlr->dev, cxlr_release_nvdimm, cxlr); - -err: - put_device(dev); -err_bridge: - put_device(&cxl_nvb->dev); - cxlr->cxl_nvb =3D NULL; - return rc; -} - static void cxlr_dax_unregister(void *_cxlr_dax) { struct cxl_dax_region *cxlr_dax =3D _cxlr_dax; @@ -3780,6 +3595,8 @@ static int cxl_region_probe(struct device *dev) dev_dbg(&cxlr->dev, "CXL EDAC registration for region_id=3D%d failed\n", cxlr->id); =20 + if (!IS_ENABLED(CONFIG_CXL_PMEM_REGION)) + return -EINVAL; return devm_cxl_add_pmem_region(cxlr); case CXL_PARTMODE_RAM: rc =3D devm_cxl_region_edac_register(cxlr); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 51c56069f451..b7592cc76192 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -816,6 +816,7 @@ int cxl_dvsec_rr_decode(struct cxl_dev_state *cxlds, struct cxl_endpoint_dvsec_info *info); =20 bool is_cxl_region(struct device *dev); +struct cxl_region *to_cxl_region(struct device *dev); =20 extern const struct bus_type cxl_bus_type; =20 @@ -860,8 +861,6 @@ struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct= cxl_port *port); struct cxl_root_decoder *cxl_find_root_decoder_by_port(struct cxl_port *po= rt); =20 #ifdef CONFIG_CXL_REGION -bool is_cxl_pmem_region(struct device *dev); -struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev); int cxl_add_to_region(struct cxl_endpoint_decoder *cxled); struct cxl_dax_region *to_cxl_dax_region(struct device *dev); u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa); @@ -872,14 +871,6 @@ struct cxl_region *cxl_create_region(struct cxl_root_d= ecoder *cxlrd, struct cxl_decoder *cxld); void create_pmem_region(struct nvdimm *nvdimm); #else -static inline bool is_cxl_pmem_region(struct device *dev) -{ - return false; -} -static inline struct cxl_pmem_region *to_cxl_pmem_region(struct device *de= v) -{ - return NULL; -} static inline int cxl_add_to_region(struct cxl_endpoint_decoder *cxled) { return 0; @@ -909,6 +900,29 @@ static inline void create_pmem_region(struct nvdimm *n= vdimm) } #endif =20 +#ifdef CONFIG_CXL_PMEM_REGION +bool is_cxl_pmem_region(struct device *dev); +struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev); +int devm_cxl_add_pmem_region(struct cxl_region *cxlr); +void create_pmem_region(struct nvdimm *nvdimm); +#else +static inline bool is_cxl_pmem_region(struct device *dev) +{ + return false; +} +static inline struct cxl_pmem_region *to_cxl_pmem_region(struct device *de= v) +{ + return NULL; +} +static inline int devm_cxl_add_pmem_region(struct cxl_region *cxlr) +{ + return 0; +} +static inline void create_pmem_region(struct nvdimm *nvdimm) +{ +} +#endif + void cxl_endpoint_parse_cdat(struct cxl_port *port); void cxl_switch_parse_cdat(struct cxl_port *port); =20 diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild index d07f14cb7aa4..cf58ada337b7 100644 --- a/tools/testing/cxl/Kbuild +++ b/tools/testing/cxl/Kbuild @@ -64,6 +64,7 @@ cxl_core-y +=3D $(CXL_CORE_SRC)/cdat.o cxl_core-y +=3D $(CXL_CORE_SRC)/ras.o cxl_core-$(CONFIG_TRACING) +=3D $(CXL_CORE_SRC)/trace.o cxl_core-$(CONFIG_CXL_REGION) +=3D $(CXL_CORE_SRC)/region.o +cxl_core-$(CONFIG_CXL_PMEM_REGION) +=3D $(CXL_CORE_SRC)/pmem_region.o cxl_core-$(CONFIG_CXL_MCE) +=3D $(CXL_CORE_SRC)/mce.o cxl_core-$(CONFIG_CXL_FEATURES) +=3D $(CXL_CORE_SRC)/features.o cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) +=3D $(CXL_CORE_SRC)/edac.o --=20 2.34.1 From nobody Sun Oct 5 20:02:14 2025 Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C705B2BD03C for ; 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Wed, 30 Jul 2025 12:17:42 +0000 (GMT) Received: from epcas5p2.samsung.com (unknown [182.195.38.89]) by epsnrtp03.localdomain (Postfix) with ESMTP id 4bsWSP6Rg5z3hhT3; Wed, 30 Jul 2025 12:17:41 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas5p2.samsung.com (KnoxPortal) with ESMTPA id 20250730121249epcas5p249c2e3fec3464cfea3a1c84bc285cd49~XBltWzLs70097800978epcas5p2p; Wed, 30 Jul 2025 12:12:49 +0000 (GMT) Received: from test-PowerEdge-R740xd.samsungds.net (unknown [107.99.41.79]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250730121248epsmtip1b44e851ee72a608296b27f03b1168fdd~XBlsUBEkq0450704507epsmtip1V; Wed, 30 Jul 2025 12:12:48 +0000 (GMT) From: Neeraj Kumar To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, linux-kernel@vger.kernel.org, gost.dev@samsung.com Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com, Neeraj Kumar Subject: [PATCH V2 20/20] cxl/pmem_region: Add sysfs attribute cxl region label updation/deletion Date: Wed, 30 Jul 2025 17:42:09 +0530 Message-Id: <20250730121209.303202-21-s.neeraj@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250730121209.303202-1-s.neeraj@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250730121249epcas5p249c2e3fec3464cfea3a1c84bc285cd49 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-542,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250730121249epcas5p249c2e3fec3464cfea3a1c84bc285cd49 References: <20250730121209.303202-1-s.neeraj@samsung.com> Using these attributes region label is added/deleted into LSA. These attributes are called from userspace (ndctl) after region creation. Signed-off-by: Neeraj Kumar --- Documentation/ABI/testing/sysfs-bus-cxl | 22 ++++++ drivers/cxl/core/pmem_region.c | 94 ++++++++++++++++++++++++- drivers/cxl/cxl.h | 1 + 3 files changed, 116 insertions(+), 1 deletion(-) diff --git a/Documentation/ABI/testing/sysfs-bus-cxl b/Documentation/ABI/te= sting/sysfs-bus-cxl index 6b4e8c7a963d..5b47a02a99ef 100644 --- a/Documentation/ABI/testing/sysfs-bus-cxl +++ b/Documentation/ABI/testing/sysfs-bus-cxl @@ -615,3 +615,25 @@ Description: The count is persistent across power loss and wraps back to 0 upon overflow. If this file is not present, the device does not have the necessary support for dirty tracking. + + +What: /sys/bus/cxl/devices/regionZ/pmem_regionZ/region_label_update +Date: July, 2025 +KernelVersion: v6.16 +Contact: linux-cxl@vger.kernel.org +Description: + (RW) Write a boolean 'true' string value to this attribute to + update cxl region information into LSA as region label. It + uses nvdimm nd_region_label_update() to update cxl region + information saved during cxl region creation into LSA. This + attribute must be called at last during cxl region creation. + + +What: /sys/bus/cxl/devices/regionZ/pmem_regionZ/region_label_delete +Date: July, 2025 +KernelVersion: v6.16 +Contact: linux-cxl@vger.kernel.org +Description: + (WO) When a boolean 'true' is written to this attribute then + pmem_region driver deletes cxl region label from LSA using + nvdimm nd_region_label_delete() diff --git a/drivers/cxl/core/pmem_region.c b/drivers/cxl/core/pmem_region.c index cd1177d345e6..cc9ef2f9a2b3 100644 --- a/drivers/cxl/core/pmem_region.c +++ b/drivers/cxl/core/pmem_region.c @@ -45,9 +45,101 @@ static void cxl_pmem_region_release(struct device *dev) kfree(cxlr_pmem); } =20 +static ssize_t region_label_update_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct cxl_pmem_region *cxlr_pmem =3D to_cxl_pmem_region(dev); + struct cxl_region *cxlr =3D cxlr_pmem->cxlr; + struct cxl_region_params *p =3D &cxlr->params; + ssize_t rc; + bool update; + + rc =3D kstrtobool(buf, &update); + if (rc) + return rc; + + ACQUIRE(rwsem_write_kill, rwsem)(&cxl_rwsem.region); + rc =3D ACQUIRE_ERR(rwsem_write_kill, &rwsem); + if (rc) + return rc; + + /* Region not yet committed */ + if (update && p->state !=3D CXL_CONFIG_COMMIT) { + dev_dbg(dev, "region not committed, can't update into LSA\n"); + return -ENXIO; + } + + if (cxlr && cxlr->cxlr_pmem && cxlr->cxlr_pmem->nd_region) { + rc =3D nd_region_label_update(cxlr->cxlr_pmem->nd_region); + if (!rc) + p->region_label_state =3D 1; + } + + if (rc) + return rc; + + return len; +} + +static ssize_t region_label_update_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct cxl_pmem_region *cxlr_pmem =3D to_cxl_pmem_region(dev); + struct cxl_region *cxlr =3D cxlr_pmem->cxlr; + struct cxl_region_params *p =3D &cxlr->params; + ssize_t rc; + + ACQUIRE(rwsem_read_intr, rwsem)(&cxl_rwsem.region); + rc =3D ACQUIRE_ERR(rwsem_read_intr, &rwsem); + if (rc) + return rc; + + return sysfs_emit(buf, "%d\n", p->region_label_state); +} +static DEVICE_ATTR_RW(region_label_update); + +static ssize_t region_label_delete_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct cxl_pmem_region *cxlr_pmem =3D to_cxl_pmem_region(dev); + struct cxl_region *cxlr =3D cxlr_pmem->cxlr; + struct cxl_region_params *p =3D &cxlr->params; + ssize_t rc; + + ACQUIRE(rwsem_write_kill, rwsem)(&cxl_rwsem.region); + rc =3D ACQUIRE_ERR(rwsem_write_kill, &rwsem); + if (rc) + return rc; + + if (cxlr && cxlr->cxlr_pmem && cxlr->cxlr_pmem->nd_region) { + rc =3D nd_region_label_delete(cxlr->cxlr_pmem->nd_region); + if (rc) + return rc; + } + + p->region_label_state =3D 0; + + return len; +} +DEVICE_ATTR_WO(region_label_delete); + +static struct attribute *cxl_pmem_region_attrs[] =3D { + &dev_attr_region_label_update.attr, + &dev_attr_region_label_delete.attr, + NULL +}; + +struct attribute_group cxl_pmem_region_group =3D { + .attrs =3D cxl_pmem_region_attrs, +}; + static const struct attribute_group *cxl_pmem_region_attribute_groups[] = =3D { &cxl_base_attribute_group, - NULL, + &cxl_pmem_region_group, + NULL }; =20 const struct device_type cxl_pmem_region_type =3D { diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index b7592cc76192..f3faa419ddc5 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -475,6 +475,7 @@ enum cxl_config_state { */ struct cxl_region_params { enum cxl_config_state state; + int region_label_state; uuid_t uuid; int interleave_ways; int interleave_granularity; --=20 2.34.1