From nobody Sun Oct 5 20:01:13 2025 Received: from mail-pg1-f172.google.com (mail-pg1-f172.google.com [209.85.215.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC051199BC for ; Wed, 30 Jul 2025 06:17:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753856278; cv=none; b=i9mX/XKLUGC49/2hnLPFmE+CTsb60FjN/BWNOf1/tiofs8p6/NwTbjg0K4qH5CawR/NwPY1lYcuEdhfNvEe5WwyXOdBN54+vgFJCJCe4jyuuxaPcPEBs8HE+SXoUQ8Gj3lnz3RmFjelfYa4zkp5H818nsmh8f6qak/ppfBBgx6M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753856278; c=relaxed/simple; bh=XxMNf+s+au9pzXX5Y2tRQ2TxicTyQrqJ3gGr+HCCcZY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KqHbvqD+yXE8dif45CgQclP7X8qeUkJgUo9KEG7wcff/VPGlM/s6KAMJ127vTvy8pPiD32iLRD1+A4hBbCWgtk7+sYA/ewNQz1RpNLJ4Rkbiy8KNFyW8+8f9JEr/OGuqzAXQ7OCR67WjG3oj9sPlkAQDFe/2tbx0ESnpYcPs6cw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=brighamcampbell.com; spf=pass smtp.mailfrom=brighamcampbell.com; dkim=pass (2048-bit key) header.d=brighamcampbell.com header.i=@brighamcampbell.com header.b=XdNq2uva; arc=none smtp.client-ip=209.85.215.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=brighamcampbell.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=brighamcampbell.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=brighamcampbell.com header.i=@brighamcampbell.com header.b="XdNq2uva" Received: by mail-pg1-f172.google.com with SMTP id 41be03b00d2f7-b39011e5f8eso5714499a12.0 for ; Tue, 29 Jul 2025 23:17:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brighamcampbell.com; s=google; t=1753856276; x=1754461076; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=98acdjAVPrJS4Gqdzmu/lk9sXTEBspyDUAMw8EWioqY=; b=XdNq2uvaIx23ZOo5+SV3Kkkj6ggfJoOFVH4m2lLzdvI86Xluy1I9WLmLSzUTqUrsiO Fq4v5BRgtCrXPEk8kPI70KIAYqq6VYYHnUjYp+cEstONkrfY1B7PfOvZ3zns8r7osekf hLk/0fc0FwgKjISoF7P64Qs/RNdVxwYkqJ0BjlNHAk1tl+iK+g6JTL7myoP0a1UcZkbl vYeOBMbAFY4NFss7zbMjOQR8npgo+4K6QqKiQuzIv05eG93Gt1M5PFD73vp0wXYbuZvZ NcsJx9tPf7vdsQLgKtQ6o6tTK+6oVuwYzHQ6bwuLCHPYbsh6Xk/5BQi1rZ+Jfaua9m9I WTuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753856276; x=1754461076; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=98acdjAVPrJS4Gqdzmu/lk9sXTEBspyDUAMw8EWioqY=; b=nLXIq0WpWwJp7fgOed3LY+gkFQsjzPAf7fFL0uEAjp0l7b6Tl9PHsq9Nfnrg9MSTjP IdgZ/rQM2+kgkl3z/HXZX7LTtKjpPyQgGCcRCRh04WCyrkT/r7QM5xuOs1uetFt2jFRH VBF1WpGVfktem9LYVc08lb2CKMXuG/2SuVm85LpBnKDsi0IbQ2KyIyzXNc3wQkCauncu Rdh9F7k2PuZJqPqxlQKtSg5AS3i/LQvv6U6adCpgIDbO8Ol7PsTdzTad2DAfJDf//8Cr 2X54pkgusa9B3D9NjHVMAyFiz5FutY3SOoAulcIiuzb2RTWomgOWMJhOL3+B1wey2Gu3 y5/Q== X-Forwarded-Encrypted: i=1; AJvYcCWNUaNClx7ZwBAY+J3u0M/HKARj0+72UVQX7We9/iK8RYFK7ABYyDsNvnh1b8gxK5UXD+2ynUz2zzLM1gQ=@vger.kernel.org X-Gm-Message-State: AOJu0YxOHX6kiYtlueYayTr0UWPyL0NsTw0dWwiwA/8BOfUB5Ul3uP9r dFzeQF/To2EyTJbFIp7yXx0AreKJmRnVm7EoqedafWex+IkLFbMVcF8n954ctLc9OgDdgOHbmw2 luX/t/sJljA== X-Gm-Gg: ASbGnctQ7S1c9Kpp1/JrFD8gCGFu25qb6QD1uHXkCjcy/zFxNmk1IneLUIGECFy+w39 r9GWmhuThXKTfRZtGqI7+00IjVMMzRju0Ongc2/f2gIy8KdSWW4ehLg+KrXC8+hzh7MYnCiahrH U0BHoL4QyqKfKlsg8pLycSWKtGsg1JI/lgr+q5cYJgkcJYK4oAQh5crfEqSkElAwQOXfX8PR56X 7D1qKcSuplrHRQv71/PU9BL7v1MOme8jfCLD5XsUb+EivpZvHVyrpu/3kRlmYebrM6U6/lloMl6 wwY4UZuws9Zjmg2YK9Pap8vDSXCmSTO5GZCfiGUyZE/U3I0Be3n7WneAocA+HVE+1G5RHFg4nw+ FnO6YpUiqRjvaEKBXVZM19zzSqidTVm7/rfftVvymVyRfG2sEWl/ZNQb38Gfp X-Google-Smtp-Source: AGHT+IF2plv3fMP0uvyMA0WmAMrYR0uHAsvmRyjAdt8jIJYVnquEq1k4jegvH5HMZncHbb6PvKV5aA== X-Received: by 2002:a17:903:2a83:b0:240:7fb:cb0b with SMTP id d9443c01a7336-24096a688b9mr25697995ad.15.1753856275969; Tue, 29 Jul 2025 23:17:55 -0700 (PDT) Received: from mystery-machine.tail542cf.ts.net ([64.71.154.6]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23ffa37f078sm75017815ad.115.2025.07.29.23.17.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Jul 2025 23:17:55 -0700 (PDT) From: Brigham Campbell To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, linus.walleij@linaro.org, neil.armstrong@linaro.org, jessica.zhang@oss.qualcomm.com, sam@ravnborg.org Cc: dianders@chromium.org, skhan@linuxfoundation.org, linux-kernel-mentees@lists.linux.dev, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Brigham Campbell Subject: [PATCH v3 1/3] drm/panel: novatek-nt35560: Fix invalid return value Date: Wed, 30 Jul 2025 00:17:46 -0600 Message-ID: <20250730061748.1227643-2-me@brighamcampbell.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250730061748.1227643-1-me@brighamcampbell.com> References: <20250730061748.1227643-1-me@brighamcampbell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Fix bug in nt35560_set_brightness() which causes the function to erroneously report an error. mipi_dsi_dcs_write() returns either a negative value when an error occurred or a positive number of bytes written when no error occurred. The buggy code reports an error under either condition. Fixes: 8152c2bfd780 ("drm/panel: Add driver for Sony ACX424AKP panel") Reviewed-by: Douglas Anderson Reviewed-by: Neil Armstrong Signed-off-by: Brigham Campbell Reviewed-by: Linus Walleij --- drivers/gpu/drm/panel/panel-novatek-nt35560.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35560.c b/drivers/gpu/dr= m/panel/panel-novatek-nt35560.c index 98f0782c8411..17898a29efe8 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt35560.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt35560.c @@ -161,7 +161,7 @@ static int nt35560_set_brightness(struct backlight_devi= ce *bl) par =3D 0x00; ret =3D mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, &par, 1); - if (ret) { + if (ret < 0) { dev_err(nt->dev, "failed to disable display backlight (%d)\n", ret); return ret; } --=20 2.50.1 From nobody Sun Oct 5 20:01:13 2025 Received: from mail-pl1-f178.google.com (mail-pl1-f178.google.com [209.85.214.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84EE41EFF9F for ; Wed, 30 Jul 2025 06:17:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753856280; cv=none; b=dZfsYZQxrggHHb+BSCBx/ViIBMd3HQLXBR+JLVHYsA5Bsckgl2bIM9A7n+TN1TQYtYzdTsJE/8Dysd3kfj1ZmBDm4QIOFZ35xF8vRA1ydGKWsxxSEViW4DXnutjp7qev8hfFNiFeCr4h3nApUY5iZQfHcItvg6oKSfvRhs2D9PA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753856280; c=relaxed/simple; bh=rn+F75Q915wmAwk9yOieQK+TRpHwahuag+EZMKYFW9Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oTBnE9GEwkJraIBqkeaIkJiZcm/J8u0/BdmVm2bdxD+yLN75bsYtt6qSfs+HzHV7SypIbVGycOI6WabBx92zBpF42P7YdZqJof2+jZG1MB4eTx/wp/K6HuwKZlcFmAEJK5yCBHt8bGqGaOU0PEHN2JPZNB1LLPLZmSWr9fkIcXo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=brighamcampbell.com; spf=pass smtp.mailfrom=brighamcampbell.com; dkim=pass (2048-bit key) header.d=brighamcampbell.com header.i=@brighamcampbell.com header.b=C/0oMhmv; arc=none smtp.client-ip=209.85.214.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=brighamcampbell.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=brighamcampbell.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=brighamcampbell.com header.i=@brighamcampbell.com header.b="C/0oMhmv" Received: by mail-pl1-f178.google.com with SMTP id d9443c01a7336-23636167afeso57275335ad.3 for ; Tue, 29 Jul 2025 23:17:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brighamcampbell.com; s=google; t=1753856278; x=1754461078; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QTa7ttMugFu1yCj4YKK1TgSGh01SfTxQdJKN90Hkmps=; b=C/0oMhmvvAeAJ03ODT0kk3RoNXmtmKyElm/nq+oMGppCsDh94nP6+9lokJMyOqQQqY muN8BYpJmpnI97IP0cH4M86GUeH6UmMtmTG9/pHWGpzfnvfAPAcgDaZICXOTRhGWWsRO eV82Jl1RPy0lgk5BtSj6CPMiEIgKEYj5QDnXqJOOjx63oM7G5ktH/a1v+HNkjidnQyYy NXNi948YhviL8eSi3qCIQ8KCOcW9cW+tcvDeoHpl34hf0Z461/ax7l0wdv8P0NSrSLLm feMHTexXFA6ajSiz6lUxmJJB32Hu/sUNawpIVSiFPK0MQwAwhTa3AisCMzNtX9UyGVA4 dpHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753856278; x=1754461078; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QTa7ttMugFu1yCj4YKK1TgSGh01SfTxQdJKN90Hkmps=; b=VKmjlsnIm9GHCEH4nH9tLLCVLLa0qFmm714AK99S541yrC983hT8KtRkG10DHwxCkY HVC1xB2kXZAD1O3bmfSYpzrtE065RV8l8QAdotOVpdpB04hzQCrDU57Y1QvHVhX/WY+e Mgqhp9sSVQfTQ0NnQ2xoVQFH1kV1IKi4pKfv4VrVX/fugVMyf5o2tCUgWR3zuEWC7Kz5 EEv32CHo5xlvrewbqO4lIybCyxWb+GvyJWeXulS2Y4ZIdl/VePnmIYZYi3CfPcNex5Mn dEvCxGFKLfPhg1wrmYrG3lCKnox+yD3xt8ES9QVFVmvURGVllRS5GIxSdm/er4d6UHTK 6TVg== X-Forwarded-Encrypted: i=1; AJvYcCWr2PxELFNetFrb9aw2894HrscpImoJPUl/8XXjADn8xL8+9nYn2C0di200E47kkwtPh6/PCq0EKt6qtps=@vger.kernel.org X-Gm-Message-State: AOJu0YxKe3QTcpnwKGBQpf5RYUe6Nvn9WplzbWdVplY06SYXqe6/TsM9 AWjyhil4OPekBLyGDNnzb6dtCSwhFPypIEujEq+jGzf+qjzMPj8o5R5ctC4nR/gHu/Q= X-Gm-Gg: ASbGncuPOzjvSujXblHVahOQjMo+Q20vqE1tSBi6lVlbmZRq9g2u+hasK+sKlbaIxx3 /+ZpUEJOZyptGcrwsb867d8uJXxxJcRkICaOY5lPGR56IRgLqFqual86g03FrtRmYIERAedZ65h RymTNsG5A7TYe4uGb6QWCZS1m5bhrj55CgiRMdpFyP0ULptt5vE8gJdLu02DRg0lsPSBZ3xPIk6 QIIzmb5W/+uQa0FGLkaPwpczy/vCY3LRVf7LXeUeXrt+3851rMPEgDanwWSW2mHgQnxqQy9mIhg cyL1/e2Vh3sWCLaFgg+VM074NB9jS8JJjg+CLATQyQYpu6cq9B0eb71ba26B3gos2TQZR6vHYI0 ykDowdiVmYITO0WNd5Za0RyzzPJtbfR0uFMJDsAmwaP+k6+vGMu84CE60djjd X-Google-Smtp-Source: AGHT+IG0UujJqciGiZSHs2MLJH0uOtfTc3Y0Ak8pUJ72jExypcRAeZTfDeAiGFaPBnABeOJag3a8BQ== X-Received: by 2002:a17:903:2412:b0:240:468c:83f1 with SMTP id d9443c01a7336-24096bec816mr37844195ad.44.1753856277729; Tue, 29 Jul 2025 23:17:57 -0700 (PDT) Received: from mystery-machine.tail542cf.ts.net ([64.71.154.6]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23ffa37f078sm75017815ad.115.2025.07.29.23.17.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Jul 2025 23:17:57 -0700 (PDT) From: Brigham Campbell To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, linus.walleij@linaro.org, neil.armstrong@linaro.org, jessica.zhang@oss.qualcomm.com, sam@ravnborg.org Cc: dianders@chromium.org, skhan@linuxfoundation.org, linux-kernel-mentees@lists.linux.dev, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Brigham Campbell Subject: [PATCH v3 2/3] drm: Add MIPI read_multi func and two write macros Date: Wed, 30 Jul 2025 00:17:47 -0600 Message-ID: <20250730061748.1227643-3-me@brighamcampbell.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250730061748.1227643-1-me@brighamcampbell.com> References: <20250730061748.1227643-1-me@brighamcampbell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Create mipi_dsi_dcs_read_multi(), which accepts a mipi_dsi_multi_context struct for improved error handling and cleaner panel driver code. Create mipi_dsi_dcs_write_var_seq_multi() and mipi_dsi_generic_write_var_seq_multi() macros which allow MIPI panel drivers to write non-static data to display controllers. Reviewed-by: Douglas Anderson Signed-off-by: Brigham Campbell --- Doug, you had suggested a slightly different shortlog for this patch. I adjusted your suggestion to fit within the canonical recommended shortlog length of 50 characters. I understand that the 50 character limit isn't a rule as much as it is a guideline, but the current shortlog seems to me like a good compromise. drivers/gpu/drm/drm_mipi_dsi.c | 37 ++++++++++++++++++++++++++++++++++ include/drm/drm_mipi_dsi.h | 35 ++++++++++++++++++++++++++++++++ 2 files changed, 72 insertions(+) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index a00d76443128..0f2c3be98212 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -1075,6 +1075,43 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *ds= i, u8 cmd, void *data, } EXPORT_SYMBOL(mipi_dsi_dcs_read); =20 +/** + * mipi_dsi_dcs_read_multi() - mipi_dsi_dcs_read() w/ accum_err + * @ctx: Context for multiple DSI transactions + * @cmd: DCS command + * @data: buffer in which to receive data + * @len: size of receive buffer + * + * Like mipi_dsi_dcs_read() but deals with errors in a way that makes it + * convenient to make several calls in a row. + */ +void mipi_dsi_dcs_read_multi(struct mipi_dsi_multi_context *ctx, u8 cmd, + void *data, size_t len) +{ + struct mipi_dsi_device *dsi =3D ctx->dsi; + struct device *dev =3D &dsi->dev; + struct mipi_dsi_msg msg =3D { + .channel =3D dsi->channel, + .type =3D MIPI_DSI_DCS_READ, + .tx_buf =3D &cmd, + .tx_len =3D 1, + .rx_buf =3D data, + .rx_len =3D len + }; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret =3D mipi_dsi_device_transfer(dsi, &msg); + if (ret < 0) { + ctx->accum_err =3D ret; + dev_err(dev, "dcs read with command %#x failed: %d\n", cmd, + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_read_multi); + /** * mipi_dsi_dcs_nop() - send DCS nop packet * @dsi: DSI peripheral device diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 369b0d8830c3..296ffdc9cd02 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -333,6 +333,8 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi,= u8 cmd, const void *data, size_t len); ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data, size_t len); +void mipi_dsi_dcs_read_multi(struct mipi_dsi_multi_context *ctx, u8 cmd, + void *data, size_t len); int mipi_dsi_dcs_nop(struct mipi_dsi_device *dsi); int mipi_dsi_dcs_soft_reset(struct mipi_dsi_device *dsi); int mipi_dsi_dcs_get_power_mode(struct mipi_dsi_device *dsi, u8 *mode); @@ -415,6 +417,22 @@ void mipi_dsi_dcs_set_tear_off_multi(struct mipi_dsi_m= ulti_context *ctx); mipi_dsi_generic_write_multi(ctx, d, ARRAY_SIZE(d)); \ } while (0) =20 +/** + * mipi_dsi_generic_write_var_seq_multi - transmit non-constant data using= a + * generic write packet + * + * This macro will print errors for you and error handling is optimized for + * callers that call this multiple times in a row. + * + * @ctx: Context for multiple DSI transactions + * @seq: buffer containing the payload + */ +#define mipi_dsi_generic_write_var_seq_multi(ctx, seq...) \ + do { \ + const u8 d[] =3D { seq }; \ + mipi_dsi_generic_write_multi(ctx, d, ARRAY_SIZE(d)); \ + } while (0) + /** * mipi_dsi_dcs_write_seq_multi - transmit a DCS command with payload * @@ -431,6 +449,23 @@ void mipi_dsi_dcs_set_tear_off_multi(struct mipi_dsi_m= ulti_context *ctx); mipi_dsi_dcs_write_buffer_multi(ctx, d, ARRAY_SIZE(d)); \ } while (0) =20 +/** + * mipi_dsi_dcs_write_var_seq_multi - transmit a DCS command with non-stat= ic + * payload + * + * This macro will print errors for you and error handling is optimized for + * callers that call this multiple times in a row. + * + * @ctx: Context for multiple DSI transactions + * @cmd: Command + * @seq: buffer containing data to be transmitted + */ +#define mipi_dsi_dcs_write_var_seq_multi(ctx, cmd, seq...) \ + do { \ + const u8 d[] =3D { cmd, seq }; \ + mipi_dsi_dcs_write_buffer_multi(ctx, d, ARRAY_SIZE(d)); \ + } while (0) + /** * struct mipi_dsi_driver - DSI driver * @driver: device driver model driver --=20 2.50.1 From nobody Sun Oct 5 20:01:13 2025 Received: from mail-pl1-f177.google.com (mail-pl1-f177.google.com [209.85.214.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53E711F4CA0 for ; Wed, 30 Jul 2025 06:18:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753856283; cv=none; b=ZEEiQ48hwoBmRcKFJWh2Vle6dF5yUGH5IQi/4m/zLGlOLARFMlWFzWdFX3FhjnxVHkLe7P0Pfmef0L1BtDo2LbJ4uFGHGpzjVq5fAv4jXX/1b6NLMCPThJTsYm1yQbPvpw899+wlqLfAPzfNAw9iLM1nqUdk8LVMHZYQTqDPZUw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753856283; c=relaxed/simple; bh=min3RkzhSY2+BuE9oVHC3RQH8qtFhVDcXi4weEpISO4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Erft65HJgW805NK7bFwGn61rmUjfbXnKRZGstQsfUoWScBaEoNXoFd6stjbZH0vSdMCeTsAVc3Ut3ybquAUUTnulSL3zZWJ6ShLCye2fFb+9aK6vqsXEGZntmCcFb4ov3v+Qb5IKAl5O9G8vEGorn6o5vWxKwMGGnTZJPmOATns= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=brighamcampbell.com; spf=pass smtp.mailfrom=brighamcampbell.com; dkim=pass (2048-bit key) header.d=brighamcampbell.com header.i=@brighamcampbell.com header.b=lF1SVQgL; arc=none smtp.client-ip=209.85.214.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=brighamcampbell.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=brighamcampbell.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=brighamcampbell.com header.i=@brighamcampbell.com header.b="lF1SVQgL" Received: by mail-pl1-f177.google.com with SMTP id d9443c01a7336-23fe2be6061so4903405ad.0 for ; Tue, 29 Jul 2025 23:18:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brighamcampbell.com; s=google; t=1753856279; x=1754461079; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PR4erbh6ZgobZPCbAljGsIGhNSgdyY2tm2UVINDkl1A=; b=lF1SVQgLBQNpUG+j58lw7bgu0e2K8T15yo3fbYLULJeReXyo2QeDDH1sh89pqJeQ4d rtyL090nxwPSv8PylxMM3CyKG6j9WPiKDDp6zrviL6pX7E2aUzPV6D3OcjyqraXZroxG 1YjlE7qV3T3SsG3x+DjKcW2sk/KjJ5AzLXbpWCNNnh0xARAqEt74VBswFJobZNOJMtcb R5+GkdReXQ/xG2JsXdKP4c7z07gqApVGnzgOz0c4QwpIZNzA4wvZaZFvmiuAuNWK2NQQ g5S93fFLLegKTZxhCblqwjr+h3FG8pApfbyT8JP7nq76VFr4CCnTIS21Cg6ZrPA59vgO MOWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753856279; x=1754461079; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PR4erbh6ZgobZPCbAljGsIGhNSgdyY2tm2UVINDkl1A=; b=tkd9g3gygaRdcC99Im1xk0yoEVjJJQjQGoaNAJTJhkW+dqEk3mtXR6/gbqH881Ujd2 xKFyb7gHdcvCYIJMB1YdM+PxZ6BnTLIbCqdOgEI+ZhMRkJ8pSo+/Y03ANSfOiU7rk+sB UCWLxSUL4RlQ52iih8uLaI0LqCfjGPyCFAVVXI6NxCAJl3sv9MQmm0Zjtt+wkpdq6hrR 8E3Xsw83zO+C4VAlqWpxwmswGF8swQIXqQmI+w60JhXj0GjzrIENoZaG6LQwGYQt77cb Q6aiiW/6qproJ7gXuClDaQYxR4RvnJQ1Sbyt7x4p9nQEDEfG165zpWdYbWN7KS0VKejP XtCw== X-Forwarded-Encrypted: i=1; AJvYcCWikmaPxfmldoFXagypCJY+4pCTKhhPGDlp8FLcKUh8mDFblOEWt7/Of0fArNi5QEPSxSzAhLtTK8Emvms=@vger.kernel.org X-Gm-Message-State: AOJu0YwNgbfY/gV9rv/ok1HRPtB4LSsMwWfwipli4kM/tF7nJ050cSgZ rQsempNjJJDCXYy9gkNCoJnLmcKb68+xSBu8x+KfPugcHS8vPi1wkyJtrYfXD75IBlw= X-Gm-Gg: ASbGncuD4gUjC6owdzgn7C5CBCeUn+10qX0EqC8aXcLcoRwjLrg9H8a/5vJ3GngDP2v pDnEd6OSh8LUE6gDRcRfu2yphvdGlzCiciCapa2XngQxXs/03aC+WH+peFjVeJcYYB1JrByYerc kiGOJp1VY1Z6OB8+M2RKCyVeRsP9GYUu2JD0K/J/Nj6db1HS1lg3HcsMb0XVQuJzKTmfFZLXIY+ 6qDn21EjqWdPDvxa3vR7TTIpItVAQq0MCxtgSxgE+vMewm2xJQNSlLsFLa9uTtoyjnhTkGPIYgR gDEdNdmOztgFFt9Jt5qZyd0hzhT9pLTKMdObN4dh0Nh5o5AaeIwWo/jVXudpklv3jwxvPAd7NLY 1lnDh0VtJ6npJKZRt2ZfXZqhYA/HEn0at+aclYf2GIGNBD3ToRw== X-Google-Smtp-Source: AGHT+IGVpWVdI1JvsII9rcUCEpE1cDJVrBru18qi1g44qJSYL9UGrGYbIRyKJKQ8SZpLUGuKbX+kEA== X-Received: by 2002:a17:903:230d:b0:231:c3c1:babb with SMTP id d9443c01a7336-240968a0178mr31572865ad.18.1753856279535; Tue, 29 Jul 2025 23:17:59 -0700 (PDT) Received: from mystery-machine.tail542cf.ts.net ([64.71.154.6]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23ffa37f078sm75017815ad.115.2025.07.29.23.17.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Jul 2025 23:17:59 -0700 (PDT) From: Brigham Campbell To: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, linus.walleij@linaro.org, neil.armstrong@linaro.org, jessica.zhang@oss.qualcomm.com, sam@ravnborg.org Cc: dianders@chromium.org, skhan@linuxfoundation.org, linux-kernel-mentees@lists.linux.dev, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Brigham Campbell Subject: [PATCH v3 3/3] drm/panel: novatek-nt35560: Clean up driver Date: Wed, 30 Jul 2025 00:17:48 -0600 Message-ID: <20250730061748.1227643-4-me@brighamcampbell.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250730061748.1227643-1-me@brighamcampbell.com> References: <20250730061748.1227643-1-me@brighamcampbell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Update driver to use the "multi" variants of MIPI functions which facilitate improved error handling and cleaner driver code. Remove information from a comment which was made obsolete by commit 994ea402c767 ("drm/panel: Rename Sony ACX424 to Novatek NT35560"), which determined that this driver supports the Novatek NT35560 panel controller. Reviewed-by: Douglas Anderson Signed-off-by: Brigham Campbell Reviewed-by: Linus Walleij --- drivers/gpu/drm/panel/panel-novatek-nt35560.c | 198 ++++++------------ 1 file changed, 60 insertions(+), 138 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt35560.c b/drivers/gpu/dr= m/panel/panel-novatek-nt35560.c index 17898a29efe8..561e6643dcbb 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt35560.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt35560.c @@ -148,24 +148,20 @@ static inline struct nt35560 *panel_to_nt35560(struct= drm_panel *panel) static int nt35560_set_brightness(struct backlight_device *bl) { struct nt35560 *nt =3D bl_get_data(bl); - struct mipi_dsi_device *dsi =3D to_mipi_dsi_device(nt->dev); - int period_ns =3D 1023; + struct mipi_dsi_multi_context dsi_ctx =3D { + .dsi =3D to_mipi_dsi_device(nt->dev) + }; int duty_ns =3D bl->props.brightness; + int period_ns =3D 1023; u8 pwm_ratio; u8 pwm_div; - u8 par; - int ret; =20 if (backlight_is_blank(bl)) { /* Disable backlight */ - par =3D 0x00; - ret =3D mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, - &par, 1); - if (ret < 0) { - dev_err(nt->dev, "failed to disable display backlight (%d)\n", ret); - return ret; - } - return 0; + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, + MIPI_DCS_WRITE_CONTROL_DISPLAY, + 0x00); + return dsi_ctx.accum_err; } =20 /* Calculate the PWM duty cycle in n/256's */ @@ -176,12 +172,6 @@ static int nt35560_set_brightness(struct backlight_dev= ice *bl) =20 /* Set up PWM dutycycle ONE byte (differs from the standard) */ dev_dbg(nt->dev, "calculated duty cycle %02x\n", pwm_ratio); - ret =3D mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_BRIGHTNESS, - &pwm_ratio, 1); - if (ret < 0) { - dev_err(nt->dev, "failed to set display PWM ratio (%d)\n", ret); - return ret; - } =20 /* * Sequence to write PWMDIV: @@ -192,46 +182,23 @@ static int nt35560_set_brightness(struct backlight_de= vice *bl) * 0x22 PWMDIV * 0x7F 0xAA CMD2 page 1 lock */ - par =3D 0xaa; - ret =3D mipi_dsi_dcs_write(dsi, 0xf3, &par, 1); - if (ret < 0) { - dev_err(nt->dev, "failed to unlock CMD 2 (%d)\n", ret); - return ret; - } - par =3D 0x01; - ret =3D mipi_dsi_dcs_write(dsi, 0x00, &par, 1); - if (ret < 0) { - dev_err(nt->dev, "failed to enter page 1 (%d)\n", ret); - return ret; - } - par =3D 0x01; - ret =3D mipi_dsi_dcs_write(dsi, 0x7d, &par, 1); - if (ret < 0) { - dev_err(nt->dev, "failed to disable MTP reload (%d)\n", ret); - return ret; - } - ret =3D mipi_dsi_dcs_write(dsi, 0x22, &pwm_div, 1); - if (ret < 0) { - dev_err(nt->dev, "failed to set PWM divisor (%d)\n", ret); - return ret; - } - par =3D 0xaa; - ret =3D mipi_dsi_dcs_write(dsi, 0x7f, &par, 1); - if (ret < 0) { - dev_err(nt->dev, "failed to lock CMD 2 (%d)\n", ret); - return ret; - } + mipi_dsi_dcs_write_var_seq_multi(&dsi_ctx, + MIPI_DCS_SET_DISPLAY_BRIGHTNESS, + pwm_ratio); + + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0xaa); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x01); + + mipi_dsi_dcs_write_var_seq_multi(&dsi_ctx, 0x22, pwm_div); + + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0xaa); =20 /* Enable backlight */ - par =3D 0x24; - ret =3D mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, - &par, 1); - if (ret < 0) { - dev_err(nt->dev, "failed to enable display backlight (%d)\n", ret); - return ret; - } + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, + 0x24); =20 - return 0; + return dsi_ctx.accum_err; } =20 static const struct backlight_ops nt35560_bl_ops =3D { @@ -244,32 +211,23 @@ static const struct backlight_properties nt35560_bl_p= rops =3D { .max_brightness =3D 1023, }; =20 -static int nt35560_read_id(struct nt35560 *nt) +static void nt35560_read_id(struct mipi_dsi_multi_context *dsi_ctx) { - struct mipi_dsi_device *dsi =3D to_mipi_dsi_device(nt->dev); + struct device dev =3D dsi_ctx->dsi->dev; u8 vendor, version, panel; u16 val; - int ret; =20 - ret =3D mipi_dsi_dcs_read(dsi, NT35560_DCS_READ_ID1, &vendor, 1); - if (ret < 0) { - dev_err(nt->dev, "could not vendor ID byte\n"); - return ret; - } - ret =3D mipi_dsi_dcs_read(dsi, NT35560_DCS_READ_ID2, &version, 1); - if (ret < 0) { - dev_err(nt->dev, "could not read device version byte\n"); - return ret; - } - ret =3D mipi_dsi_dcs_read(dsi, NT35560_DCS_READ_ID3, &panel, 1); - if (ret < 0) { - dev_err(nt->dev, "could not read panel ID byte\n"); - return ret; - } + mipi_dsi_dcs_read_multi(dsi_ctx, NT35560_DCS_READ_ID1, &vendor, 1); + mipi_dsi_dcs_read_multi(dsi_ctx, NT35560_DCS_READ_ID2, &version, 1); + mipi_dsi_dcs_read_multi(dsi_ctx, NT35560_DCS_READ_ID3, &panel, 1); + + if (dsi_ctx->accum_err < 0) + return; =20 if (vendor =3D=3D 0x00) { - dev_err(nt->dev, "device vendor ID is zero\n"); - return -ENODEV; + dev_err(&dev, "device vendor ID is zero\n"); + dsi_ctx->accum_err =3D -ENODEV; + return; } =20 val =3D (vendor << 8) | panel; @@ -278,16 +236,16 @@ static int nt35560_read_id(struct nt35560 *nt) case DISPLAY_SONY_ACX424AKP_ID2: case DISPLAY_SONY_ACX424AKP_ID3: case DISPLAY_SONY_ACX424AKP_ID4: - dev_info(nt->dev, "MTP vendor: %02x, version: %02x, panel: %02x\n", + dev_info(&dev, + "MTP vendor: %02x, version: %02x, panel: %02x\n", vendor, version, panel); break; default: - dev_info(nt->dev, "unknown vendor: %02x, version: %02x, panel: %02x\n", + dev_info(&dev, + "unknown vendor: %02x, version: %02x, panel: %02x\n", vendor, version, panel); break; } - - return 0; } =20 static int nt35560_power_on(struct nt35560 *nt) @@ -322,92 +280,56 @@ static void nt35560_power_off(struct nt35560 *nt) static int nt35560_prepare(struct drm_panel *panel) { struct nt35560 *nt =3D panel_to_nt35560(panel); - struct mipi_dsi_device *dsi =3D to_mipi_dsi_device(nt->dev); - const u8 mddi =3D 3; + struct mipi_dsi_multi_context dsi_ctx =3D { + .dsi =3D to_mipi_dsi_device(nt->dev) + }; int ret; =20 ret =3D nt35560_power_on(nt); if (ret) return ret; =20 - ret =3D nt35560_read_id(nt); - if (ret) { - dev_err(nt->dev, "failed to read panel ID (%d)\n", ret); - goto err_power_off; - } + nt35560_read_id(&dsi_ctx); =20 - /* Enabe tearing mode: send TE (tearing effect) at VBLANK */ - ret =3D mipi_dsi_dcs_set_tear_on(dsi, + /* Enable tearing mode: send TE (tearing effect) at VBLANK */ + mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); - if (ret) { - dev_err(nt->dev, "failed to enable vblank TE (%d)\n", ret); - goto err_power_off; - } =20 /* * Set MDDI * * This presumably deactivates the Qualcomm MDDI interface and * selects DSI, similar code is found in other drivers such as the - * Sharp LS043T1LE01 which makes us suspect that this panel may be - * using a Novatek NT35565 or similar display driver chip that shares - * this command. Due to the lack of documentation we cannot know for - * sure. + * Sharp LS043T1LE01. */ - ret =3D mipi_dsi_dcs_write(dsi, NT35560_DCS_SET_MDDI, - &mddi, sizeof(mddi)); - if (ret < 0) { - dev_err(nt->dev, "failed to set MDDI (%d)\n", ret); - goto err_power_off; - } + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, NT35560_DCS_SET_MDDI, 3); =20 - /* Exit sleep mode */ - ret =3D mipi_dsi_dcs_exit_sleep_mode(dsi); - if (ret) { - dev_err(nt->dev, "failed to exit sleep mode (%d)\n", ret); - goto err_power_off; - } - msleep(140); + mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 140); =20 - ret =3D mipi_dsi_dcs_set_display_on(dsi); - if (ret) { - dev_err(nt->dev, "failed to turn display on (%d)\n", ret); - goto err_power_off; - } + mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); if (nt->video_mode) { - /* In video mode turn peripheral on */ - ret =3D mipi_dsi_turn_on_peripheral(dsi); - if (ret) { - dev_err(nt->dev, "failed to turn on peripheral\n"); - goto err_power_off; - } + mipi_dsi_turn_on_peripheral_multi(&dsi_ctx); } =20 - return 0; - -err_power_off: - nt35560_power_off(nt); - return ret; + if (dsi_ctx.accum_err < 0) + nt35560_power_off(nt); + return dsi_ctx.accum_err; } =20 static int nt35560_unprepare(struct drm_panel *panel) { struct nt35560 *nt =3D panel_to_nt35560(panel); - struct mipi_dsi_device *dsi =3D to_mipi_dsi_device(nt->dev); - int ret; + struct mipi_dsi_multi_context dsi_ctx =3D { + .dsi =3D to_mipi_dsi_device(nt->dev) + }; =20 - ret =3D mipi_dsi_dcs_set_display_off(dsi); - if (ret) { - dev_err(nt->dev, "failed to turn display off (%d)\n", ret); - return ret; - } + mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); + mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); + + if (dsi_ctx.accum_err < 0) + return dsi_ctx.accum_err; =20 - /* Enter sleep mode */ - ret =3D mipi_dsi_dcs_enter_sleep_mode(dsi); - if (ret) { - dev_err(nt->dev, "failed to enter sleep mode (%d)\n", ret); - return ret; - } msleep(85); =20 nt35560_power_off(nt); --=20 2.50.1