From nobody Sun Oct 5 23:48:47 2025 Received: from szxga06-in.huawei.com (szxga06-in.huawei.com [45.249.212.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F05CF21772D for ; Tue, 29 Jul 2025 01:57:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.32 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753754222; cv=none; b=NYXXRIsMuNamxOwtc/rqhZGPNaZ8alscgp83mh6BLoz8sJRKDq5QC1OHd6wlqV6pHq5tWs8OlK3ol3rdKcvp8jKJKw6uRHvHwgNj0PkuneXIGMsvC0IYmbyf0SzGCKSzRdeg/d+wL0BRtRYCqFepmJ2SUktDXVcNr1tFvu5b3qU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753754222; c=relaxed/simple; bh=26sHxMpb5j8Fnf8sU+Q484NX6ry8jZKITH/LfNeNU3I=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=AhXyNyaR4gIgCC21CChh+WoVTB32UDoDH1p4t/87kFSjfwPQoJbTqzycGxb3C6q+kfaD0IkecQ5It4dIZWU4RwMAXlayok6GiiO75d70yaZWn0U3FmLQdaypLbHi/wFozJcetMb0rthucsnhDwt5RjHISsEa9k3ANTpVgZZGKjo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.32 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.88.163]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4brdlj4scVz27j59; Tue, 29 Jul 2025 09:57:53 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 644FE180044; Tue, 29 Jul 2025 09:56:52 +0800 (CST) Received: from huawei.com (10.90.53.73) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Tue, 29 Jul 2025 09:56:51 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , CC: Subject: [PATCH -next v7 4/7] arm64: entry: Use preempt_count() and need_resched() helper Date: Tue, 29 Jul 2025 09:54:53 +0800 Message-ID: <20250729015456.3411143-5-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250729015456.3411143-1-ruanjinjie@huawei.com> References: <20250729015456.3411143-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To dggpemf500011.china.huawei.com (7.185.36.131) Content-Type: text/plain; charset="utf-8" The generic entry code uses preempt_count() and need_resched() helpers to check if it should do preempt_schedule_irq(). Currently, arm64 use its own check logic, that is "READ_ONCE(current_thread_info()->preempt_count =3D=3D= 0", which is equivalent to "preempt_count() =3D=3D 0 && need_resched()". In preparation for moving arm64 over to the generic entry code, use these helpers to replace arm64's own code and move it ahead. No functional changes. Signed-off-by: Jinjie Ruan Reviewed-by: Ada Couprie Diaz --- arch/arm64/kernel/entry-common.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-com= mon.c index 21a7d8bea814..7c2299c1ba79 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -298,14 +298,6 @@ static inline bool arm64_preempt_schedule_irq(void) if (!need_irq_preemption()) return false; =20 - /* - * Note: thread_info::preempt_count includes both thread_info::count - * and thread_info::need_resched, and is not equivalent to - * preempt_count(). - */ - if (READ_ONCE(current_thread_info()->preempt_count) !=3D 0) - return false; - /* * DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC * priority masking is used the GIC irqchip driver will clear DAIF.IF @@ -689,8 +681,10 @@ static __always_inline void __el1_irq(struct pt_regs *= regs, do_interrupt_handler(regs, handler); irq_exit_rcu(); =20 - if (arm64_preempt_schedule_irq()) - preempt_schedule_irq(); + if (!preempt_count() && need_resched()) { + if (arm64_preempt_schedule_irq()) + preempt_schedule_irq(); + } =20 exit_to_kernel_mode(regs, state); } --=20 2.34.1