From nobody Tue Dec 16 02:16:57 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2F941F1317 for ; Tue, 29 Jul 2025 01:32:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753752757; cv=none; b=tZD1BJGFfxWbHHcZeQwBCx/hRfiZjaDA1NvjquwGo7Wt2vfjBVtGZluffEcYB+ZifvsdPKMys3bL80Y84GsWSuWpJ5wb0xPR++1TSfphyctlMVq6uhZQsIoJxCyG5PX6tpcTsDElQKbSpeC9oNK4G6hJL9ql7OVLhgyTQwLjiJA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753752757; c=relaxed/simple; bh=V/BYua6XV5/Slbr7KyRoyAjVXwrPIJnzOCaS+fPHr/4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=B6ivMYqzruOqJDxsUoC/qBxQ3PMS3rhf5+OnFUkI8RmqqGROGszjIHRbfWTPqt2A6PVAOlflyByPdSmm5qp/s9LMj2cF/QI2U/AGFJc/tSoQLd2qzdl8gwD2hnQG7XvEkrl7prpqf+FSsubU+LbUEe6WD/EKWKyGs1UlWucO3Dw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=eo9KS3/z; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="eo9KS3/z" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56T02JS8030056 for ; Tue, 29 Jul 2025 01:32:34 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= aiEHcRFSNvC19gKAUGSHHtMUwHZqb4Vo2WDBxZKJZbs=; b=eo9KS3/zDF6fnfMz MVCyWDUv60kzcvYBaiQ30Ac4MhSQn730f+PStpnei90FnaPFvWXoAosx/jyeffy+ GTdSKa2ITeB0tP/Yy11+K+sBB+WN7qL5OGZlFQo2IbX91SLZ2CQX2A9x1rOxHNT8 13mQfArWvb4mAlyLQapVvudVMTOSFGGnr6jcgMF0QqklBIrih+Xw8IyZY9Qt9u9u ASifOrpHI4tvUGtRmQLo9pb9j69RwTSAdHJG6jHTUDiU5nlB2QUyP+bK290LqJG7 QV1dKmPD1DHBtzgA3UWw464p/eg7ytuhVsyLdEn9d2USptyE+tcVCPkgXxKNYsD9 SqssrQ== Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 484pbkxa5h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 29 Jul 2025 01:32:34 +0000 (GMT) Received: by mail-pl1-f198.google.com with SMTP id d9443c01a7336-23fe98c50daso17462405ad.3 for ; Mon, 28 Jul 2025 18:32:34 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753752753; x=1754357553; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aiEHcRFSNvC19gKAUGSHHtMUwHZqb4Vo2WDBxZKJZbs=; b=lgI4FtA5fljkzBi96JT3g0eHIszhCKsltHpkK1v3XK53+5MkRyFlnIYxpemhuP9etR bbvRjSEYJghnmyhwHfymlUNTz4bUzKlKkIxBOQGYLNmsnAn+U/LDOzm0pIWQgCQ8401j 7nS8/hy8v1vzN8Arxkf2B3EFdAddMRG+qosHEP8QSEYIb+ihfpZRzbFcwpulTDmwzZZT Piccs7VKLZuTUXagRO4FRGYCOCbr6pXS4FFoiQUnH8ICEII+5JPjURKlLH2Yl5IUqgJD RgJwEzfHy/yR0HUFgrSDNzR7xttC3ZpwRSULxhNksc/h8Wv/HQa5RH2ri2GwLLRukqHA VuhQ== X-Forwarded-Encrypted: i=1; AJvYcCVr/J+kCQHSTTGwNuz0SpY6+cNsMzzMjXZ7/6DQFYHAN0CpmF/jamjUzocBTjCTeZBj6ppJ3COEbZnW+y4=@vger.kernel.org X-Gm-Message-State: AOJu0YwbxpkZKbO8RHl7Nmei/cnlGwgqAZ0Kdq+RCYs8783JPob4CGMd y9Cdy6ZZ5mZfedJhzh+S+uvejXXjB3JlQKe51jF0nBtHAp6rNR6s4T1sle5+94LBNNku7qKio0p AtaJbyB0mYlJ40ZrnMcDZYp9cAEU/noyQ3XDrtLyHCswxLQ2ofvvVrAk6Ehq3kI48OfA= X-Gm-Gg: ASbGncunvrVZzKesD9WoMcZ1IvNu6F8n4nrVm0HHV7uRQ4Hylotwc0lvvfyVkRAggzQ aM7pXaZR5zfGh6mnel4+YKYbXV3w04+ZNsqtw8HlTImu8ZTCt/RmHpUl2uFO0UyRkFSDflp7aqo mxatiXMifJK/cF+O1oq5D/+TxQi0CIyJtR+sYH6onQ/++EFMoXHKXHy/Hjz4T7M2hl3UFzlFBon Mcx/XbFMjGfzfNMmMejMqDYYSZAdTzHHbDqpdbniCZaS0OqAbKaGv7z9eLQBN72A/0UJvZljwX7 zfms6ow5hiHaKNL5OwUlYGWydXrA6RMVcqv2B0Px0tULdfzoqX0NaBhMpDKMYoRtui/ljRgAw7e PgawK320Qo/cqEpuhhSUM1/nYMsRW8GN1cw== X-Received: by 2002:a17:903:b07:b0:240:8f4:b35c with SMTP id d9443c01a7336-24008f4ba02mr101013005ad.10.1753752753188; Mon, 28 Jul 2025 18:32:33 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFA0DJQLyo6uFYmcVpFDq4c7tgBIsAVsNRpcx8bgpwkzKnMfZjMLM54SIhP+teyT4i8kz5row== X-Received: by 2002:a17:903:b07:b0:240:8f4:b35c with SMTP id d9443c01a7336-24008f4ba02mr101012565ad.10.1753752752715; Mon, 28 Jul 2025 18:32:32 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2405bca90ebsm11210625ad.6.2025.07.28.18.32.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Jul 2025 18:32:32 -0700 (PDT) From: Yijie Yang Date: Tue, 29 Jul 2025 09:31:57 +0800 Subject: [PATCH v3 1/4] dt-bindings: arm: qcom: Document HAMOA-IOT-EVK board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250729-hamoa_initial-v3-1-806e092789dc@oss.qualcomm.com> References: <20250729-hamoa_initial-v3-0-806e092789dc@oss.qualcomm.com> In-Reply-To: <20250729-hamoa_initial-v3-0-806e092789dc@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yijie Yang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753752746; l=1169; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=V/BYua6XV5/Slbr7KyRoyAjVXwrPIJnzOCaS+fPHr/4=; b=hbWKGwBk6osvTAY7lNFqYRDcEvcUgSdipvrnJKHUeHpYaSt94QDYhew7WazfpMe0fq8lDipBU ZqUfMtrhQrdCAua7qS4rQbuzCRltYqCc/4OnSQQL3uYOzECl+CXTOsJ X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Authority-Analysis: v=2.4 cv=LsaSymdc c=1 sm=1 tr=0 ts=688824b2 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=Bh1HEMNN3wmc11-eFpoA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI5MDAwOCBTYWx0ZWRfX/nYzfmOEB5gQ xe3Uyd9bA2b6mE2CXhiQr3aiSSOr0BXGWDTHuGBdA4j4xECGHQvcAOt1N2D2n8aHtRCDeTw15wp mzl8GZRRUJiKtdNmht05AqoyWB6I8pFKIm5MiXA11CrWAJEnOBvIsWJPsPtocPNqP30DHUcIfUx VIvHSt/u9Xf9/aWPcVrDbCvw5YIxipSHRMrVUqdIsO2RYgxeU4dMNHZYABYW+najZZVvADOAP2V mvkfUz6bHQM4PYa2dySdIr64fqc8h7DTaJ8XZoHQSOeEFf6tmZyD7A3I+BmIkbOHfi6iHwlzsLK 8nNjZYwCxE4h9zKBfqjPeT/++KtSl8b/T10oPm1Ge5miJA2UjYD53qCkgfegEpfyeqcH1rhilu/ 6dE3rVcLba3tKeK8BEcp03iWxKdaMyezqjDxidLgURppB4037Yoe+ax5+FxBvuRhOTIbKels X-Proofpoint-ORIG-GUID: Ab-mtsLXwtbGOHniwD_3_GM_X-M5_R2U X-Proofpoint-GUID: Ab-mtsLXwtbGOHniwD_3_GM_X-M5_R2U X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_05,2025-07-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=979 spamscore=0 phishscore=0 suspectscore=0 impostorscore=0 adultscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 mlxscore=0 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507290008 Document the device tree binding for the HAMOA-IOT-EVK board, which uses the Qualcomm X1E80100 SoC. The EVK consists of a carrier board and a modular System-on-Module (SoM). The SoM integrates the SoC, PMICs, and essential GPIOs, while the EVK carrier board provides additional peripherals such as UART and USB interfaces. Signed-off-by: Yijie Yang Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index 47a7b1cb3cac1150bcde8c2e2e23f2db256ab082..65003e16fe72dd4eec9423030fe= d6078b4a79959 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -1165,6 +1165,12 @@ properties: - qcom,x1e80100-qcp - const: qcom,x1e80100 =20 + - items: + - enum: + - qcom,hamoa-iot-evk + - const: qcom,hamoa-iot-som + - const: qcom,x1e80100 + - items: - enum: - asus,zenbook-a14-ux3407qa --=20 2.34.1 From nobody Tue Dec 16 02:16:57 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0BEE1F4282 for ; Tue, 29 Jul 2025 01:32:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753752761; cv=none; b=CpqYr1y//2sJJ1uSI5oqGj0TNv3vY9mAUtwTntckYDE/zqJ7L8G5DOBJ5NxyPYfHML8hT4HF70uF+XL/pZd/Gc0Sqmn5lAaimUFZ4CJ0VHjPWsdnA9/BL1dIvHiexZSN+xY8L1dbsf11UZ+NbUJo5NGDvk91OrBNbcYx1POwSk4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753752761; c=relaxed/simple; bh=dpxW8aShh2RYLX9CjF0k/XEH2duG8LnixEBwdfov9eo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZRw3esWdZf2QJKYQUteVvDPe2v4wchvtRI8CJhO0868McWfxUTtsY9yIQLs+OoyI2wZYejv9SCEUlZlZydGLSNbffneMoLvFg8R0k7WoUHRCxtfWvJ3os6K1fkivO2xOnhJy/12g2AbB7S1lr1UueNWepjFgx8g4vjWelyF+vG4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=DHsDonNy; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="DHsDonNy" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56SLNO2H014622 for ; Tue, 29 Jul 2025 01:32:38 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= +WbtO0JaeN1fhr4oYLduWJfFLHLQ9helHJAYmSQJKos=; b=DHsDonNyDMW1/nJL H0QD1zPT/Wr2sOoN+J2WSnmeN1MDNfkiyU50Vjf9GrplMkmMrHHtfOiI1IFPxwFV mubLeiF4KD9lm36BRGUvkFjxxgbi5EMlax+19bG9O39QgJIaFfpJXchMK7A1+rAJ itSxJHFndtpTB9Ln4bCGTiZwOzJek4wzbTcNEHZjlzGn6SKECPohgXMt74av4CCD 7IpIXNgfOkoGLwS2Aoi+srRaBSp0CQoImISiEns1qSK7e6Euq7cPlg7+xeIajMY/ /vsw9gejnqeRmc6MoBwj07FQTf1zRgu64qfDV63X8D/nP/oInbveb/el2CD9cTn3 tP+BMg== Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 484q3xpawj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 29 Jul 2025 01:32:38 +0000 (GMT) Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-31eac278794so2334885a91.3 for ; Mon, 28 Jul 2025 18:32:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753752757; x=1754357557; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+WbtO0JaeN1fhr4oYLduWJfFLHLQ9helHJAYmSQJKos=; b=pof8RwGPNjVD9l04oQg7EB/Nkn6+ehAFbo70UBlo7t3ru2p3sKexrpxagsW6Te6K4u yXcGRZ8jgzVPh/fJYXBmv8woNFrt0W42yr4oh9utSlHgUxyxc6XoQZsN60VskVuO4Ftc LNRKGsxPJNWJCbp7lEyiTtP5PLXyandfee2IuHktiKJMZx5SUdKaQTJsToOCtUDeZH1e EOpWLVA9kdJeomYXLFcWc+a6fb0ld5yV+xz2gUyAbtVGAxfQnMQJWkCfx+bpRFKGTxeS /AtAPAaD3mU+jEN7Ixxus8my2B6TSv33v+Pa8Cp80iuDfFSH/k6p5BKnE/EQ+wu3QvcT JjSA== X-Forwarded-Encrypted: i=1; AJvYcCVnSIyQR5WlV1f72K0QpTpQ5uREse4fptBO4C//OZlIoCAYE+dXxQsHki2/2M4dOS5SkwvQytSW0+Xi3js=@vger.kernel.org X-Gm-Message-State: AOJu0YwQeqixSq+TcI8itmCpmDGWK8okA0WQUl9yjXsNuyFlJUek9MGt Wr0kFrmbybltpX3xMZvhbMnkcTZO5Jh/37f/IzlArNsYDx/a9KiGTwEG6hBpd7VlB60o9Aiix2C 12bIBZyeXLhix1Sa90ZoEDvftO0X9IL/PtZgsiIT7dZbf+J0knwWf0Bm21YxAdfKaq0Q= X-Gm-Gg: ASbGncslSTo2fEcfgHfOYXdoVAivkXzrdfHrsTTqFAq3qQkUSZ5iNI4dVXxLSFzC75c 56Z+LTcM3hGj7IDJmQJ3BguQR+3/XTfi55+cc94zWKUqTms6ibGpD6EYXmi2ZnZ9qZFAJZo5oRZ 2eW/B2Qml9WAkxR9XmxiXSPMWvjw0U050eLVght+GYz2XxL3dtqfkL4s23fGFNOwNmt3pkfkIN3 lI0hnvNL+SCQLqmwLJh1l2tvf2jjCUOuTH2/zDOJIJ9VFNTkJoW9wDD4FIflVe4FRgtfgEKWgda kNJG4h0Jddbz24Uye3mYXZbix7Uv7jop95fEzjrpXQKHEtS5Q1E5/xetQjI4AizbntfY++QvMgl /yAGvBNvhZ/XJxqkUYwUIrw5Z+21KtqUSng== X-Received: by 2002:a17:903:1c5:b0:234:986c:66bf with SMTP id d9443c01a7336-23fb2fef327mr178451015ad.11.1753752757371; Mon, 28 Jul 2025 18:32:37 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGa3hRcc8uYaZE3mUBUkpRF0ee2DHpWPplGSLAHNpWv/FMvjfBEx8xAapx8JkFCzhryUd99CA== X-Received: by 2002:a17:903:1c5:b0:234:986c:66bf with SMTP id d9443c01a7336-23fb2fef327mr178450575ad.11.1753752756809; Mon, 28 Jul 2025 18:32:36 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2405bca90ebsm11210625ad.6.2025.07.28.18.32.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Jul 2025 18:32:36 -0700 (PDT) From: Yijie Yang Date: Tue, 29 Jul 2025 09:31:58 +0800 Subject: [PATCH v3 2/4] firmware: qcom: scm: Allow QSEECOM on HAMOA-IOT-EVK Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250729-hamoa_initial-v3-2-806e092789dc@oss.qualcomm.com> References: <20250729-hamoa_initial-v3-0-806e092789dc@oss.qualcomm.com> In-Reply-To: <20250729-hamoa_initial-v3-0-806e092789dc@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yijie Yang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753752746; l=902; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=dpxW8aShh2RYLX9CjF0k/XEH2duG8LnixEBwdfov9eo=; b=8Q7Q8nlyZKIFvBTCy9gXYcFEMWitIr6B5ietc72n5mFzetjwBg2rFJQ5W3k/hSmyXKfS6x0PR Tesb7L2qmL2DsNEwx3u0OjoadRF4KZTJwef+H1OCiDK9yJQXTWYTDjg X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Authority-Analysis: v=2.4 cv=JovxrN4C c=1 sm=1 tr=0 ts=688824b6 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=h7II6S6JRGbW-U2bcKQA:9 a=QEXdDO2ut3YA:10 a=zZCYzV9kfG8A:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-ORIG-GUID: 08LHv_huJfcMXSBRPxwMW0AAHFcnRREB X-Proofpoint-GUID: 08LHv_huJfcMXSBRPxwMW0AAHFcnRREB X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI5MDAwOCBTYWx0ZWRfXy2W81n9rchQt hZ0LpeDVLN0wriFp3qwA9Qe5sHdMRCdHRys3NsDzsJqO0oRduin0NJAXQdSI/qNL7gIK7AB/njB A5spOkqvgS1miUVbsDpxVtIqFYgjxDyzpcnVFLW3DD1lyEDHbUBGhqGDtCJc2NVvKjeIyFOj1pa UooIttMYry70B0J4cwiPpnphundSRmx0vt6W6vIL2CAeDrVYVFYsgz8H3QYNsadSKivCPwxrt8u lpcSYHhi9xMEMotdmigE6Ywmwk+B9eM3Gl3MPVpWqIqenTQSgEu4JY8muR8g6230PqeoUEZxFet TQofI2PZLqIk6vuwoH6ezrYn6I74w/MjSAdUCd4kaUvnx6HS9S6m9ATO8Sxv3UBWCoHuDSn3Ke2 H84/7ol5xvAPLrHFknTmn3xg9cg9Hl3aUqgMFeln6dMro73dQG+Ic6T9mXkLVHEtAyQdCSra X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_05,2025-07-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 priorityscore=1501 bulkscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 spamscore=0 mlxlogscore=999 mlxscore=0 adultscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507290008 Add the Hamoa-IoT-EVK board to the list to enable access to EFI variables. Signed-off-by: Yijie Yang --- drivers/firmware/qcom/qcom_scm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_= scm.c index 26cd0458aacd67dcd36f065675e969cea97eb465..27c9d4a0912646415efac2df089= ddedaf971fcb1 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -2006,6 +2006,7 @@ static const struct of_device_id qcom_scm_qseecom_all= owlist[] __maybe_unused =3D { { .compatible =3D "microsoft,blackrock" }, { .compatible =3D "microsoft,romulus13", }, { .compatible =3D "microsoft,romulus15", }, + { .compatible =3D "qcom,hamoa-iot-evk" }, { .compatible =3D "qcom,sc8180x-primus" }, { .compatible =3D "qcom,x1e001de-devkit" }, { .compatible =3D "qcom,x1e80100-crd" }, --=20 2.34.1 From nobody Tue Dec 16 02:16:57 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 730E5202C5C for ; Tue, 29 Jul 2025 01:32:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753752765; cv=none; b=oTp9RM84voior72ekh+3WCUuWCAR2DasEh4WGbk4zFNpQaPR1IM6Q8RsbeiWUdqFAILORDK3w6/biLsf012dggwZCJCo5d6QsKw6yINVAellEgiXmhR66PDtFv33p/w9agoD6E2Go9rSHpcw6UvqGkfQKkRtqRzuSjkh90Mw5uc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753752765; c=relaxed/simple; bh=PlIFlmeqr04MX2ZKTSGA6N2XMhq2zO3U0FSeq/Xv+i4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VypbNIpbE3BWvEXg5I30QgDqw8oAnnBGEirQNI2dgcC+OY66olDSVRaoH2JRcm6kLZscfZxHmgO2QHm6N3IGJxtPnxwiXQZ0XaplSlzlgU8ojyHez36HRNnzclrOpoDHhtab0+E28d3zwee/JDDSMGYbTiQK5EeEz5QoJTPdSx4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=k70nOCjg; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="k70nOCjg" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56T028sj006230 for ; Tue, 29 Jul 2025 01:32:42 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= R+eHP5y6kehHK2TGCiZ9qhXZRQNeThHSX6x9CmLRUOE=; b=k70nOCjg8jRlFs8t lxqfmp0i1Z48DkhTXfY+Lk/xlhNGArnbfqJUHWSoXsMgougffYjv0OWB4GqP8+SQ plhWjKX6otrFufj5p7cSxs4CGnWJ2cev6p5neoFWROSeHHluXrfqAPiWIL+XkV17 yYEv9FRcjbgPXV84YZJkdp025ixOEM+EtNZX2wqCFfzqmQBC8ftDtkYYaXMtITOL KCsxqukaam1clECmGQwwxVnPgQ22Z9LI96XS2CjrDcy2YJuxlyO3yIDvrWLW4yWD 9YCVa0cWFZCpqoWomaicqpLqacYrChEsua7/q3Ji1Ib8nb25BIMgYhBDpCyHn6zA T/+fog== Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 484mcr6jgp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 29 Jul 2025 01:32:42 +0000 (GMT) Received: by mail-pl1-f198.google.com with SMTP id d9443c01a7336-23ff7d61fb7so3608895ad.1 for ; Mon, 28 Jul 2025 18:32:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753752761; x=1754357561; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=R+eHP5y6kehHK2TGCiZ9qhXZRQNeThHSX6x9CmLRUOE=; b=NcfFVj+72IhgkDQAGiDy8WTb5REnKNblwp+wzQtndq30eAH+YoKkcWRiUp4RDWsEhL V0WGqtIucxtZAELpP/J0DORk5K/lBBBSxcM5ENv91QefyKNg/yQGiml0B/s/h0nM5s+b Vncq03fGi8qNnOUIIi4Pcml4pKmC5attIpwOL0R+GqScR/ksa4ZwaxmlJ2flktzCA7ZB VB5RRomGurvoMGgUYyxBTrBb4I8MkEOLJmjCo3aYkYwfn9oOlqi3NInh+OmPf1pF2dos UhNu1KHhCgonPB9wXUfXFpIX+cLVj6mGBxASUncfGQTTwM8WeUdvq7DdHP1dayh8dA2O 4xOQ== X-Forwarded-Encrypted: i=1; AJvYcCW251jCe1MvYaxS+bKgoS+KuCptvUWam/KtH3yGtyxUyfxaglMoRy5g7AYsIKNzlGdzH+R81Cwha1KgKGA=@vger.kernel.org X-Gm-Message-State: AOJu0YzgF7Q/ReSo50zOdricuQcOe7DxMwHNtMetTWbQ792ZtzU6tptd 42YZZN6zVw2GSpPogV1SeTFSXO5D/43MrsuwWMBPt8sGtcyOaOEwRxRkRH7oNQpjkx0k8wieFi5 hRMzSIRH88qG9FlgTwNF3FZyEtqjz+DIXwjEQmPt6NlVBdUZ5qv39K6f+758SM2ToiuA= X-Gm-Gg: ASbGncuKsznPBXrcxo2wutTRXQtxsthlGYY/mrfH0d6AQRflrojVuEVIMgvL3v71/Dm GmbZGwIH9RSFUgV+XhksCuHc1rK8t1LRTB8UA6pHPdOiXv1JlkpvW1zHbHCb7iE1PMqlcC9Dxd7 qu5BVlkk41DehzP70Ya0Xl/CwgajmqOD+kpVhB3Cb4fCmLy3+36mioaVUzcDqW76hIPw6+k/k00 nZETENl+D/oRl1XOwn5/Eulunzl52j1qiq6E3XGIWzE7D+2I83xIP8DjNIwC2HNlKhIRi7LNj0T bkriAquOoVBFuHVPuPZhly46fO0XTCr7R8h8DLqsv+o2FbIjS6WlIxRQKlr2pn34ajU/EItTuuI He1RkLTV2BmNLl2peWj9LGZWBcShKVLOuzA== X-Received: by 2002:a17:902:ec84:b0:240:6098:a4f3 with SMTP id d9443c01a7336-24063d4967fmr24693575ad.14.1753752760515; Mon, 28 Jul 2025 18:32:40 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF1pAZ2NivydyovB9ipfIVKgpGhwWTm3bqKdbMERag+fRlp5qrw6gsl+rV2laLz3OZGmSzWcg== X-Received: by 2002:a17:902:ec84:b0:240:6098:a4f3 with SMTP id d9443c01a7336-24063d4967fmr24693075ad.14.1753752760025; Mon, 28 Jul 2025 18:32:40 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2405bca90ebsm11210625ad.6.2025.07.28.18.32.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Jul 2025 18:32:39 -0700 (PDT) From: Yijie Yang Date: Tue, 29 Jul 2025 09:31:59 +0800 Subject: [PATCH v3 3/4] arm64: dts: qcom: Add HAMOA-IOT-SOM platform Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250729-hamoa_initial-v3-3-806e092789dc@oss.qualcomm.com> References: <20250729-hamoa_initial-v3-0-806e092789dc@oss.qualcomm.com> In-Reply-To: <20250729-hamoa_initial-v3-0-806e092789dc@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yijie Yang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753752746; l=15898; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=PlIFlmeqr04MX2ZKTSGA6N2XMhq2zO3U0FSeq/Xv+i4=; b=y1mySyl1gyniNJZxOw6W8RnNdoqtmSdrexK/kMRI3Ox1H/7N9TbBkj4bMEESOFMcQg8wkGZN4 jxrWI7XB+2WCUnHK/KWFXfKyr9QuqD85O3XmcVH7LQ1iLboPDm7jYiQ X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI5MDAwOCBTYWx0ZWRfXx0WDZRUkGXzo 0Q+cmdHv4K9XEiBVoVB9+6f2Ro25ueLPfFl2Htu76bG2pkavudJr0JkMD6N+mln3EddrZbzQJ0J CMs+zm6QL0FI6PNT+gQ4s1xzWhU8joSicQjmn6hh7FlkUJ7VKLCxXQT+KCRlHja9BspcTwNKH5+ xDkESevmuczUIGfeeim1aaRvezZiC/G19odeVC6oYnt3SLkhGT4AbFAb1fio11+vXSu9GtTCZt7 +0k7SSZMN74WjHl0Ft703LaV0GFXRgFlTUJmi23vfyp88cbuxW8/dADY88NTwvZu0poerRdtikR ksmjG8TCMcsPMPWwaUbsuezVBQEV0+8hhTMqf0yOjcyiJA280GXSgICu5eW7wm5eDelMRz6xlkt OFrJNcZ+qTrrYJDHl3Htow8mBeaf1J1v0sHqlbfbZCrWyKNRtjEf8eEgI4sPne2Ff6P6sSHS X-Authority-Analysis: v=2.4 cv=Hth2G1TS c=1 sm=1 tr=0 ts=688824ba cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=kJpOf-JYLzBZDkfq8aYA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-GUID: NsrJm9yci4lBWp9fRr1fpvUcYEHijJJy X-Proofpoint-ORIG-GUID: NsrJm9yci4lBWp9fRr1fpvUcYEHijJJy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_05,2025-07-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 mlxscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 clxscore=1015 spamscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507290008 The HAMOA-IOT-SOM is a compact computing module that integrates a System on Chip (SoC) =E2=80=94 specifically the x1e80100 =E2=80=94 along with esse= ntial components optimized for IoT applications. It is designed to be mounted on carrier boards, enabling the development of complete embedded systems. This change enables and overlays the following components: - Regulators on the SOM - Reserved memory regions - PCIe6a and its PHY - PCIe4 and its PHY - USB0 through USB6 and their PHYs - ADSP, CDSP - WLAN, Bluetooth (M.2 interface) Written with contributions from Yingying Tang (added PCIe4 and its PHY to enable WLAN). Signed-off-by: Yijie Yang Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 609 ++++++++++++++++++++++++= ++++ 1 file changed, 609 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/= dts/qcom/hamoa-iot-som.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..5facc5544c3df05b89b25fbcb5c= d331e93040f15 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi @@ -0,0 +1,609 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include "x1e80100.dtsi" +#include "x1e80100-pmics.dtsi" +#include +#include + +/ { + compatible =3D "hamoa-iot-som", "qcom,x1e80100"; + + reserved-memory { + linux,cma { + compatible =3D "shared-dma-pool"; + size =3D <0x0 0x8000000>; + reusable; + linux,cma-default; + }; + }; +}; + +&apps_rsc { + /* PMC8380C_B */ + regulators-0 { + compatible =3D "qcom,pm8550-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-bob1-supply =3D <&vph_pwr>; + vdd-bob2-supply =3D <&vph_pwr>; + vdd-l1-l4-l10-supply =3D <&vreg_s4c_1p8>; + vdd-l2-l13-l14-supply =3D <&vreg_bob1>; + vdd-l5-l16-supply =3D <&vreg_bob1>; + vdd-l6-l7-supply =3D <&vreg_bob2>; + vdd-l8-l9-supply =3D <&vreg_bob1>; + vdd-l12-supply =3D <&vreg_s5j_1p2>; + vdd-l15-supply =3D <&vreg_s4c_1p8>; + vdd-l17-supply =3D <&vreg_bob2>; + + vreg_bob1: bob1 { + regulator-name =3D "vreg_bob1"; + regulator-min-microvolt =3D <3008000>; + regulator-max-microvolt =3D <3960000>; + regulator-initial-mode =3D ; + }; + + vreg_bob2: bob2 { + regulator-name =3D "vreg_bob2"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + }; + + vreg_l1b_1p8: ldo1 { + regulator-name =3D "vreg_l1b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2b_3p0: ldo2 { + regulator-name =3D "vreg_l2b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l4b_1p8: ldo4 { + regulator-name =3D "vreg_l4b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l5b_3p0: ldo5 { + regulator-name =3D "vreg_l5b_3p0"; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-initial-mode =3D ; + }; + + vreg_l6b_1p8: ldo6 { + regulator-name =3D "vreg_l6b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l7b_2p8: ldo7 { + regulator-name =3D "vreg_l7b_2p8"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + regulator-initial-mode =3D ; + }; + + vreg_l8b_3p0: ldo8 { + regulator-name =3D "vreg_l8b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l9b_2p9: ldo9 { + regulator-name =3D "vreg_l9b_2p9"; + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l10b_1p8: ldo10 { + regulator-name =3D "vreg_l10b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l12b_1p2: ldo12 { + regulator-name =3D "vreg_l12b_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l13b_3p0: ldo13 { + regulator-name =3D "vreg_l13b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3100000>; + regulator-initial-mode =3D ; + }; + + vreg_l14b_3p0: ldo14 { + regulator-name =3D "vreg_l14b_3p0"; + regulator-min-microvolt =3D <3072000>; + regulator-max-microvolt =3D <3072000>; + regulator-initial-mode =3D ; + }; + + vreg_l15b_1p8: ldo15 { + regulator-name =3D "vreg_l15b_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-always-on; + }; + + vreg_l16b_2p9: ldo16 { + regulator-name =3D "vreg_l16b_2p9"; + regulator-min-microvolt =3D <2912000>; + regulator-max-microvolt =3D <2912000>; + regulator-initial-mode =3D ; + }; + + vreg_l17b_2p5: ldo17 { + regulator-name =3D "vreg_l17b_2p5"; + regulator-min-microvolt =3D <2504000>; + regulator-max-microvolt =3D <2504000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_C */ + regulators-1 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s4-supply =3D <&vph_pwr>; + + vreg_s4c_1p8: smps4 { + regulator-name =3D "vreg_s4c_1p8"; + regulator-min-microvolt =3D <1856000>; + regulator-max-microvolt =3D <2000000>; + regulator-initial-mode =3D ; + }; + + vreg_l1c_1p2: ldo1 { + regulator-name =3D "vreg_l1c_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l2c_0p8: ldo2 { + regulator-name =3D "vreg_l2c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3c_0p8: ldo3 { + regulator-name =3D "vreg_l3c_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_D */ + regulators-2 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "d"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s4c_1p8>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_l1d_0p8: ldo1 { + regulator-name =3D "vreg_l1d_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2d_0p9: ldo2 { + regulator-name =3D "vreg_l2d_0p9"; + regulator-min-microvolt =3D <912000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3d_1p8: ldo3 { + regulator-name =3D "vreg_l3d_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_E */ + regulators-3 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "e"; + + vdd-l2-supply =3D <&vreg_s1f_0p7>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + + vreg_l2e_0p8: ldo2 { + regulator-name =3D "vreg_l2e_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l3e_1p2: ldo3 { + regulator-name =3D "vreg_l3e_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380_F */ + regulators-4 { + compatible =3D "qcom,pmc8380-rpmh-regulators"; + qcom,pmic-id =3D "f"; + + vdd-l1-supply =3D <&vreg_s5j_1p2>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s5j_1p2>; + vdd-s1-supply =3D <&vph_pwr>; + + vreg_s1f_0p7: smps1 { + regulator-name =3D "vreg_s1f_0p7"; + regulator-min-microvolt =3D <700000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1f_1p0: ldo1 { + regulator-name =3D "vreg_l1f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + + vreg_l2f_1p0: ldo2 { + regulator-name =3D "vreg_l2f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + + vreg_l3f_1p0: ldo3 { + regulator-name =3D "vreg_l3f_1p0"; + regulator-min-microvolt =3D <1024000>; + regulator-max-microvolt =3D <1024000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_I */ + regulators-6 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "i"; + + vdd-l1-supply =3D <&vreg_s4c_1p8>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + + vreg_s1i_0p9: smps1 { + regulator-name =3D "vreg_s1i_0p9"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_s2i_1p0: smps2 { + regulator-name =3D "vreg_s2i_1p0"; + regulator-min-microvolt =3D <1000000>; + regulator-max-microvolt =3D <1100000>; + regulator-initial-mode =3D ; + }; + + vreg_l1i_1p8: ldo1 { + regulator-name =3D "vreg_l1i_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l2i_1p2: ldo2 { + regulator-name =3D "vreg_l2i_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + }; + + vreg_l3i_0p8: ldo3 { + regulator-name =3D "vreg_l3i_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; + + /* PMC8380VE_J */ + regulators-7 { + compatible =3D "qcom,pm8550ve-rpmh-regulators"; + qcom,pmic-id =3D "j"; + + vdd-l1-supply =3D <&vreg_s1f_0p7>; + vdd-l2-supply =3D <&vreg_s5j_1p2>; + vdd-l3-supply =3D <&vreg_s1f_0p7>; + vdd-s5-supply =3D <&vph_pwr>; + + vreg_s5j_1p2: smps5 { + regulator-name =3D "vreg_s5j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l1j_0p8: ldo1 { + regulator-name =3D "vreg_l1j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + + vreg_l2j_1p2: ldo2 { + regulator-name =3D "vreg_l2j_1p2"; + regulator-min-microvolt =3D <1256000>; + regulator-max-microvolt =3D <1256000>; + regulator-initial-mode =3D ; + }; + + vreg_l3j_0p8: ldo3 { + regulator-name =3D "vreg_l3j_0p8"; + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <920000>; + regulator-initial-mode =3D ; + }; + }; +}; + +&pcie4 { + perst-gpios =3D <&tlmm 146 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 148 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&pcie4_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie4_phy { + vdda-phy-supply =3D <&vreg_l3i_0p8>; + vdda-pll-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&pcie6a { + perst-gpios =3D <&tlmm 152 GPIO_ACTIVE_LOW>; + wake-gpios =3D <&tlmm 154 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&pcie6a_default>; + pinctrl-names =3D "default"; + + status =3D "okay"; +}; + +&pcie6a_phy { + vdda-phy-supply =3D <&vreg_l1d_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&qupv3_0 { + status =3D "okay"; +}; + +&qupv3_1 { + status =3D "okay"; +}; + +&qupv3_2 { + status =3D "okay"; +}; + +&remoteproc_adsp { + firmware-name =3D "qcom/x1e80100/adsp.mbn", + "qcom/x1e80100/adsp_dtb.mbn"; + + status =3D "okay"; +}; + +&remoteproc_cdsp { + firmware-name =3D "qcom/x1e80100/cdsp.mbn", + "qcom/x1e80100/cdsp_dtb.mbn"; + + status =3D "okay"; +}; + +&tlmm { + gpio-reserved-ranges =3D <34 2>, /* TPM LP & INT */ + <44 4>; /* SPI (TPM) */ + + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins =3D "gpio147"; + function =3D "pcie4_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio146"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio148"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + }; + + pcie6a_default: pcie6a-default-state { + clkreq-n-pins { + pins =3D "gpio153"; + function =3D "pcie6a_clk"; + drive-strength =3D <2>; + bias-pull-up; + }; + + perst-n-pins { + pins =3D "gpio152"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wake-n-pins { + pins =3D "gpio154"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + + }; + }; +}; + +&usb_1_ss0 { + status =3D "okay"; +}; + +&usb_1_ss0_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss0_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss0_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l1j_0p8>; + + status =3D "okay"; +}; + +&usb_1_ss1 { + status =3D "okay"; +}; + +&usb_1_ss1_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss1_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss1_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_1_ss2 { + status =3D "okay"; +}; + +&usb_1_ss2_dwc3 { + dr_mode =3D "otg"; + usb-role-switch; +}; + +&usb_1_ss2_hsphy { + vdd-supply =3D <&vreg_l3j_0p8>; + vdda12-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&usb_1_ss2_qmpphy { + vdda-phy-supply =3D <&vreg_l2j_1p2>; + vdda-pll-supply =3D <&vreg_l2d_0p9>; + + status =3D "okay"; +}; + +&usb_2 { + status =3D "okay"; +}; + +&usb_2_dwc3 { + dr_mode =3D "host"; +}; + +&usb_2_hsphy { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&usb_mp { + status =3D "okay"; +}; + +&usb_mp_hsphy0 { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&usb_mp_hsphy1 { + vdd-supply =3D <&vreg_l2e_0p8>; + vdda12-supply =3D <&vreg_l3e_1p2>; + + status =3D "okay"; +}; + +&usb_mp_qmpphy0 { + vdda-phy-supply =3D <&vreg_l3e_1p2>; + vdda-pll-supply =3D <&vreg_l3c_0p8>; + + status =3D "okay"; +}; + +&usb_mp_qmpphy1 { + vdda-phy-supply =3D <&vreg_l3e_1p2>; + vdda-pll-supply =3D <&vreg_l3c_0p8>; + + status =3D "okay"; +}; --=20 2.34.1 From nobody Tue Dec 16 02:16:57 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AAA220551C for ; Tue, 29 Jul 2025 01:32:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753752768; cv=none; b=pqhMKZcDmEOdu4XR6i1eaDBo0dqwIxK1vr39yf6w4c26MNHA5h44xcYe5dpL0Sp4kpoBGjNh58HAbOPziX+1GFQwdRnFoUwqpVJHBvJuJ8N0O5g7rgQDbXe8Zf0jg/QbnSgYibd/HH79U+swQJ6OiVsgqKYT9LwxgNYZIoda6LQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753752768; c=relaxed/simple; bh=tfrDRfun5BNOq85oRda2s+FRKrGxo3dEUPg0zzkxO0w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XFRRg9/A+zqRMNLGqINv7kYLxwlwuGVBHpg9UtEs3rVHVq0+JiX9gxn54qRLxnK52XUanLajSGvpMtv9iBKh3/UoxGVF7a6WqdO1nRoQ0VoqyYRKK/zydDVsN7hW6fU9PXH5oA543PphLa02jFyJV/tWI5Ob/Q7BMTjlP7Dgq9w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=MYglg+bF; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="MYglg+bF" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56SLgjbi006589 for ; Tue, 29 Jul 2025 01:32:45 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= cVfGxjsCObIqTSgiTcCEz4Dj60fHhW2QO/dosfY2IwM=; b=MYglg+bF+5QhjLGh qu1s2mxjecNqEXhkFTur1yJ+V/8syBrjtDKdQ+pULZSlJXOi1GRCrmfr+qr37uzs 2Z8yO7HnZhcztjrbmI3CwoC2YcJUOiDtfunMJEQNW3ZwpNki9aA77mGBklBDmK8P SZvldpvfqhQ7WGKJOIQhRtApILz+HtbNubnBvdU/odF311jcfSCbm9dEZuOkgeUD eRKUuOHr/MZDlaw7lAytBoCHTGHxxanqKKkc02Uxk1UbgUhkOkjtHSYYPPrnCyci KxS9nNS8WgfHpQ/hVBiExicYzQJnYBTJ+uK1blfei4Q3CmVTwNMf1cnZLk4ofx36 Aj4Lfg== Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 484nytxjt9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Tue, 29 Jul 2025 01:32:45 +0000 (GMT) Received: by mail-pl1-f198.google.com with SMTP id d9443c01a7336-235eefe6a8fso40072195ad.1 for ; Mon, 28 Jul 2025 18:32:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753752764; x=1754357564; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cVfGxjsCObIqTSgiTcCEz4Dj60fHhW2QO/dosfY2IwM=; b=Vc9MAi0Wpw92EZe9Z33Mvr1GSz5fL4NvMm0ShLSGBopwM4vZZ1zWHU3XMFzT57Wd5e RhSa3W4vLJvBv/vzlY0gawAXdIEQZkUfkaPCgm7sXPQtpeY/tRDP218Z+PVsZn0K4My9 0cpKpbDXBD2mR+L3SfvMocf5hWzbVddgnyPK5Mcg29XKQTINJKQI4ur06lGik2hbzcQ+ whrxXQ6gBtTCsBnE1jZHRdkHI48v199H8ga1EtcgPQbZfbL8muHHO0QWEL/OLEZiFDxs v3MRekzxMASDjczjwFS7FMEuaVnAwqj6P4saO3M7R8IkzObr708nWClf/W02N3btXuTS P6vw== X-Forwarded-Encrypted: i=1; AJvYcCUVjOxPFdLT6kqH+DK7b2mTJGf1YSsAtPTGp8U82TWniertV5avVKtil0cLP77cu+hWSZqnwglFEGxnYPc=@vger.kernel.org X-Gm-Message-State: AOJu0Yx4X1ntjlNoV7zinr67qb4q/mvHoaAFWqzuTNIZAJIGy/FMi08k N56kmZ/QXfdfvoLFTKWt+dXTkIyo61hzWIje/WlqewMQX/NySirllxabyyQGX1vVOh6oWrbRWXr 40UNM9djGKrnmxflM8NR2fXjilXSi9FfF/dVM6k+DEf7guHXzpK3PtcqJDds59WI90nY= X-Gm-Gg: ASbGncs43Q18Ahc+QTxBpHILbSr5Ui0jbI2ltKubJm1b33ljOvB+Sn1AU8/MHgQX524 fM3wOa1X7P/ioiH5dsIYf60rSSLE5/pjH1FIz4tdmbnrGuyOA32ImAc6HGRZXVkvhnSrYOxikLP YYPLfIS26LwcjOIz6zPbaQxNpmGC3XQYrmL5dnUq5t/CcoKyXvQ4dklU7aJ2PHUdcSAqtsH7iV5 GAPHa6F3tAJqoei3sFH8Wm6W4wSdhCQknzwLWX4o5MNYzyJ2sy/J68JO/DHckveibT1JtE9ULUO 4OWGFH4uYSREAl6LkLV5E+kp13WSyqQ7RodiQwK8dTRD7j21ggHPuV/S9vHoWjzbmeJVAsd1vfj +Qz/GBbd8iawwmbX3MNb+FCh8Lhc3LW5IWA== X-Received: by 2002:a17:902:ec84:b0:23f:9a29:b15 with SMTP id d9443c01a7336-23fb300cdb7mr258460855ad.12.1753752764025; Mon, 28 Jul 2025 18:32:44 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFUtJFIPUggKnzW8Oeabcvu9S4WBfksRhDNwZdUF4ED8Fero4+gQpd7kE0XgjhOxSIp3C73og== X-Received: by 2002:a17:902:ec84:b0:23f:9a29:b15 with SMTP id d9443c01a7336-23fb300cdb7mr258460345ad.12.1753752763497; Mon, 28 Jul 2025 18:32:43 -0700 (PDT) Received: from yijiyang-gv.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2405bca90ebsm11210625ad.6.2025.07.28.18.32.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Jul 2025 18:32:43 -0700 (PDT) From: Yijie Yang Date: Tue, 29 Jul 2025 09:32:00 +0800 Subject: [PATCH v3 4/4] arm64: dts: qcom: Add base HAMOA-IOT-EVK board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250729-hamoa_initial-v3-4-806e092789dc@oss.qualcomm.com> References: <20250729-hamoa_initial-v3-0-806e092789dc@oss.qualcomm.com> In-Reply-To: <20250729-hamoa_initial-v3-0-806e092789dc@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yijie Yang , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753752746; l=22240; i=yijie.yang@oss.qualcomm.com; s=20240408; h=from:subject:message-id; bh=tfrDRfun5BNOq85oRda2s+FRKrGxo3dEUPg0zzkxO0w=; b=qu9yV43gOuyrxZVq5lOinEUOroZO+tWS3rKkyefCb4wsrJ10omujdA8vJ5wPbD0Hz4BJvcwdZ McqSrNYIzouBsT2tiWLJwi7V5F59UnSrIYRALJIK7Q4ba0oLb5H39B4 X-Developer-Key: i=yijie.yang@oss.qualcomm.com; a=ed25519; pk=XvMv0rxjrXLYFdBXoFjTdOdAwDT5SPbQ5uAKGESDihk= X-Proofpoint-GUID: FUJo2mrWJeAIo40CiKuMJidKUOvX12Wg X-Proofpoint-ORIG-GUID: FUJo2mrWJeAIo40CiKuMJidKUOvX12Wg X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI5MDAwOCBTYWx0ZWRfX3MO4Sn835kXL Z4fWkIsLD2To2/x5r+OPrvvM7JeO6e60KW2iDL8qD1fO2fc7jQ5MteE31bt4AUBpOJhz9jb0Gkz 9J/aexO/mRhJ7IQmm2KKFyZabjcCeuCM2qtAF+j37PbV180DJIBrNAn+XxHvmR4X4G7HJSDFfDw J7SoIR4T/aR5jOV5zqKloC/oNFsolbSV/sI81QhNZsriB9Tt/eXGsU0gFz6VMCwGcUMesYvpqV2 uOrsLq+nzYlLudBNsmdAP6JLf+y8PHwPMG7NAkLmBU+5vmA40oxhJw8ByzXq0NjmjE9Rxl3jSpY 0fiXcQaI+GKRT5pld7jRC9jX+Oo90y9AK17wr1v++YmgKwallSHA2wkXtQpSZmJErPNREpBpp2C M3L9cUn6MzfP/gYx72dA+DvHApSJ1X0LyNuwv4Kr983rBDgvXp/DPSUSD+3jGDbf7cI6jSo3 X-Authority-Analysis: v=2.4 cv=CLoqXQrD c=1 sm=1 tr=0 ts=688824bd cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=EUspDBNiAAAA:8 a=qQEJj2pEbmm85beMlWcA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_05,2025-07-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 suspectscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 clxscore=1015 impostorscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507290008 The HAMOA-IOT-EVK is an evaluation platform for IoT products, composed of the Hamoa IoT SoM and a carrier board. Together, they form a complete embedded system capable of booting to UART. This change enables and overlays the following peripherals on the carrier board: - UART - On-board regulators - USB Type-C mux - Pinctrl - Embedded USB (EUSB) repeaters - NVMe - pmic-glink - USB DisplayPorts Written with contributions from Shuai Zhang (added Bluetooth) and Yongxing Mou (added USB DisplayPorts). Signed-off-by: Yijie Yang --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts | 992 +++++++++++++++++++++++++= ++++ 2 files changed, 993 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 4bfa926b6a0850c3c459bcba28129c559d50a7cf..c5994b75d3e56e74ffb64b2389e= e1bcc086f3065 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D apq8039-t2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8094-sony-xperia-kitakami-karin_windy.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8096-db820c.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D apq8096-ifc6640.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D hamoa-iot-evk.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-rdp432-c2.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5018-tplink-archer-ax55-v1.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D ipq5332-rdp441.dtb diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts b/arch/arm64/boot/d= ts/qcom/hamoa-iot-evk.dts new file mode 100644 index 0000000000000000000000000000000000000000..02daec04f933c0b3ab9bd329f56= ac1ba0401ddef --- /dev/null +++ b/arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts @@ -0,0 +1,992 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "hamoa-iot-som.dtsi" + +/ { + model =3D "Qualcomm Technologies, Inc. Hamoa IoT EVK"; + compatible =3D "qcom,hamoa-iot-evk", "qcom,hamoa-iot-som", "qcom,x1e80100= "; + chassis-type =3D "embedded"; + + aliases { + serial0 =3D &uart21; + serial1 =3D &uart14; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + pmic-glink { + compatible =3D "qcom,x1e80100-pmic-glink", + "qcom,sm8550-pmic-glink", + "qcom,pmic-glink"; + #address-cells =3D <1>; + #size-cells =3D <0>; + orientation-gpios =3D <&tlmm 121 GPIO_ACTIVE_HIGH>, + <&tlmm 123 GPIO_ACTIVE_HIGH>, + <&tlmm 125 GPIO_ACTIVE_HIGH>; + + connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss0_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss0_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss0_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss0_sbu: endpoint { + remote-endpoint =3D <&usb_1_ss0_sbu_mux>; + }; + }; + }; + }; + + connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss1_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss1_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss1_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss1_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss1_con_sbu_out>; + }; + }; + }; + }; + + connector@2 { + compatible =3D "usb-c-connector"; + reg =3D <2>; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + pmic_glink_ss2_hs_in: endpoint { + remote-endpoint =3D <&usb_1_ss2_dwc3_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + pmic_glink_ss2_ss_in: endpoint { + remote-endpoint =3D <&retimer_ss2_ss_out>; + }; + }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss2_con_sbu_in: endpoint { + remote-endpoint =3D <&retimer_ss2_con_sbu_out>; + }; + }; + }; + }; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_edp_3p3: regulator-edp-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_EDP_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 70 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&edp_reg_en>; + pinctrl-names =3D "default"; + + regulator-always-on; + regulator-boot-on; + }; + + vreg_nvme: regulator-nvme { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_NVME_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 18 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&nvme_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p15: regulator-rtmr0-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_1p8: regulator-rtmr0-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr0_3p3: regulator-rtmr0-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR0_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb0_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p15: regulator-rtmr1-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 188 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_1p8: regulator-rtmr1-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 175 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr1_3p3: regulator-rtmr1-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR1_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 186 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb1_pwr_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_1p15: regulator-rtmr2-1p15 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_1P15"; + regulator-min-microvolt =3D <1150000>; + regulator-max-microvolt =3D <1150000>; + + gpio =3D <&tlmm 189 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_1p15_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_1p8: regulator-rtmr2-1p8 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_1P8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 126 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_1p8_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + vreg_rtmr2_3p3: regulator-rtmr2-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_RTMR2_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 187 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&usb2_pwr_3p3_reg_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + usb-1-ss0-sbu-mux { + compatible =3D "onnn,fsusb42", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 168 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 167 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb_1_ss0_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb_1_ss0_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_sbu>; + }; + }; + }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_3P3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 214 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wcn_sw_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + /* + * TODO: These two regulators are actually part of the removable M.2 + * card and not the CRD mainboard. Need to describe this differently. + * Functionally it works correctly, because all we need to do is to + * turn on the actual 3.3V supply above. + */ + vreg_wcn_0p95: regulator-wcn-0p95 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_0P95"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <950000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wcn_1p9: regulator-wcn-1p9 { + compatible =3D "regulator-fixed"; + + regulator-name =3D "VREG_WCN_1P9"; + regulator-min-microvolt =3D <1900000>; + regulator-max-microvolt =3D <1900000>; + + vin-supply =3D <&vreg_wcn_3p3>; + }; + + vreg_wwan: regulator-wwan { + compatible =3D "regulator-fixed"; + + regulator-name =3D "SDX_VPH_PWR"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + gpio =3D <&tlmm 221 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 =3D <&wwan_sw_en>; + pinctrl-names =3D "default"; + + regulator-boot-on; + }; + + wcn7850-pmu { + compatible =3D "qcom,wcn7850-pmu"; + + vdd-supply =3D <&vreg_wcn_0p95>; + vddio-supply =3D <&vreg_l15b_1p8>; + vddaon-supply =3D <&vreg_wcn_0p95>; + vdddig-supply =3D <&vreg_wcn_0p95>; + vddrfa1p2-supply =3D <&vreg_wcn_1p9>; + vddrfa1p8-supply =3D <&vreg_wcn_1p9>; + + bt-enable-gpios =3D <&tlmm 116 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&wcn_bt_en>; + pinctrl-names =3D "default"; + + regulators { + vreg_pmu_rfa_cmn: ldo0 { + regulator-name =3D "vreg_pmu_rfa_cmn"; + }; + + vreg_pmu_aon_0p59: ldo1 { + regulator-name =3D "vreg_pmu_aon_0p59"; + }; + + vreg_pmu_wlcx_0p8: ldo2 { + regulator-name =3D "vreg_pmu_wlcx_0p8"; + }; + + vreg_pmu_wlmx_0p85: ldo3 { + regulator-name =3D "vreg_pmu_wlmx_0p85"; + }; + + vreg_pmu_btcmx_0p85: ldo4 { + regulator-name =3D "vreg_pmu_btcmx_0p85"; + }; + + vreg_pmu_rfa_0p8: ldo5 { + regulator-name =3D "vreg_pmu_rfa_0p8"; + }; + + vreg_pmu_rfa_1p2: ldo6 { + regulator-name =3D "vreg_pmu_rfa_1p2"; + }; + + vreg_pmu_rfa_1p8: ldo7 { + regulator-name =3D "vreg_pmu_rfa_1p8"; + }; + + vreg_pmu_pcie_0p9: ldo8 { + regulator-name =3D "vreg_pmu_pcie_0p9"; + }; + + vreg_pmu_pcie_1p8: ldo9 { + regulator-name =3D "vreg_pmu_pcie_1p8"; + }; + }; + }; +}; + +&i2c1 { + clock-frequency =3D <400000>; + status =3D "okay"; + + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x08>; + + clocks =3D <&rpmhcc RPMH_RF_CLK5>; + + vdd-supply =3D <&vreg_rtmr2_1p15>; + vdd33-supply =3D <&vreg_rtmr2_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr2_3p3>; + vddar-supply =3D <&vreg_rtmr2_1p15>; + vddat-supply =3D <&vreg_rtmr2_1p15>; + vddio-supply =3D <&vreg_rtmr2_1p8>; + + reset-gpios =3D <&tlmm 185 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&rtmr2_default>; + pinctrl-names =3D "default"; + + orientation-switch; + retimer-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss2_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss2_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss2_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss2_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss2_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss2_con_sbu_in>; + }; + }; + }; + }; +}; + +&i2c5 { + clock-frequency =3D <400000>; + status =3D "okay"; + + eusb3_repeater: redriver@47 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x47>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 6 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb3_reset_n>; + pinctrl-names =3D "default"; + }; + + eusb5_repeater: redriver@43 { + compatible =3D "nxp,ptn3222"; + reg =3D <0x43>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 7 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb5_reset_n>; + pinctrl-names =3D "default"; + }; + + eusb6_repeater: redriver@4f { + compatible =3D "nxp,ptn3222"; + reg =3D <0x4f>; + #phy-cells =3D <0>; + + vdd3v3-supply =3D <&vreg_l13b_3p0>; + vdd1v8-supply =3D <&vreg_l4b_1p8>; + + reset-gpios =3D <&tlmm 184 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&eusb6_reset_n>; + pinctrl-names =3D "default"; + }; +}; + +&i2c7 { + clock-frequency =3D <400000>; + + status =3D "okay"; + + typec-mux@8 { + compatible =3D "parade,ps8830"; + reg =3D <0x8>; + + clocks =3D <&rpmhcc RPMH_RF_CLK4>; + + vdd-supply =3D <&vreg_rtmr1_1p15>; + vdd33-supply =3D <&vreg_rtmr1_3p3>; + vdd33-cap-supply =3D <&vreg_rtmr1_3p3>; + vddar-supply =3D <&vreg_rtmr1_1p15>; + vddat-supply =3D <&vreg_rtmr1_1p15>; + vddio-supply =3D <&vreg_rtmr1_1p8>; + + reset-gpios =3D <&tlmm 176 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&rtmr1_default>; + pinctrl-names =3D "default"; + + retimer-switch; + orientation-switch; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + retimer_ss1_ss_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_ss_in>; + }; + }; + + port@1 { + reg =3D <1>; + + retimer_ss1_ss_in: endpoint { + remote-endpoint =3D <&usb_1_ss1_qmpphy_out>; + }; + }; + + port@2 { + reg =3D <2>; + + retimer_ss1_con_sbu_out: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_con_sbu_in>; + }; + }; + }; + }; +}; + +&mdss { + status =3D "okay"; +}; + +&mdss_dp0 { + status =3D "okay"; +}; + +&mdss_dp0_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp1 { + status =3D "okay"; +}; + +&mdss_dp1_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp2 { + status =3D "okay"; +}; + +&mdss_dp2_out { + data-lanes =3D <0 1>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 5400000000 81000000= 00>; +}; + +&mdss_dp3 { + /delete-property/ #sound-dai-cells; + + status =3D "okay"; + + aux-bus { + panel { + compatible =3D "edp-panel"; + power-supply =3D <&vreg_edp_3p3>; + + port { + edp_panel_in: endpoint { + remote-endpoint =3D <&mdss_dp3_out>; + }; + }; + }; + }; + + ports { + port@1 { + reg =3D <1>; + + mdss_dp3_out: endpoint { + data-lanes =3D <0 1 2 3>; + link-frequencies =3D /bits/ 64 <1620000000 2700000000 + 5400000000 8100000000>; + + remote-endpoint =3D <&edp_panel_in>; + }; + }; + }; +}; + +&mdss_dp3_phy { + vdda-phy-supply =3D <&vreg_l3j_0p8>; + vdda-pll-supply =3D <&vreg_l2j_1p2>; + + status =3D "okay"; +}; + +&pcie6a { + vddpe-3v3-supply =3D <&vreg_nvme>; +}; + +&pm8550_gpios { + rtmr0_default: rtmr0-reset-n-active-state { + pins =3D "gpio10"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; + + usb0_3p3_reg_en: usb0-3p3-reg-en-state { + pins =3D "gpio11"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&pm8550ve_9_gpios { + usb0_1p8_reg_en: usb0-1p8-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&pmc8380_5_gpios { + usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state { + pins =3D "gpio8"; + function =3D "normal"; + power-source =3D <1>; /* 1.8V */ + bias-disable; + input-disable; + output-enable; + }; +}; + +&smb2360_0 { + status =3D "okay"; +}; + +&smb2360_0_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l2b_3p0>; +}; + +&smb2360_1 { + status =3D "okay"; +}; + +&smb2360_1_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l14b_3p0>; +}; + +&smb2360_2 { + status =3D "okay"; +}; + +&smb2360_2_eusb2_repeater { + vdd18-supply =3D <&vreg_l3d_1p8>; + vdd3-supply =3D <&vreg_l8b_3p0>; +}; + +&tlmm { + edp_reg_en: edp-reg-en-state { + pins =3D "gpio70"; + function =3D "gpio"; + drive-strength =3D <16>; + bias-disable; + }; + + eusb3_reset_n: eusb3-reset-n-state { + pins =3D "gpio6"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-low; + }; + + eusb5_reset_n: eusb5-reset-n-state { + pins =3D "gpio7"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + output-low; + }; + + eusb6_reset_n: eusb6-reset-n-state { + pins =3D "gpio184"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + output-low; + }; + + nvme_reg_en: nvme-reg-en-state { + pins =3D "gpio18"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr1_default: rtmr1-reset-n-active-state { + pins =3D "gpio176"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + rtmr2_default: rtmr2-reset-n-active-state { + pins =3D "gpio185"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_1p15_reg_en: usb1-pwr-1p15-reg-en-state { + pins =3D "gpio188"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_1p8_reg_en: usb1-pwr-1p8-reg-en-state { + pins =3D "gpio175"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb1_pwr_3p3_reg_en: usb1-pwr-3p3-reg-en-state { + pins =3D "gpio186"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_1p15_reg_en: usb2-pwr-1p15-reg-en-state { + pins =3D "gpio189"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_1p8_reg_en: usb2-pwr-1p8-reg-en-state { + pins =3D "gpio126"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb2_pwr_3p3_reg_en: usb2-pwr-3p3-reg-en-state { + pins =3D "gpio187"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + usb_1_ss0_sbu_default: usb-1-ss0-sbu-state { + mode-pins { + pins =3D "gpio166"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + output-high; + }; + + oe-n-pins { + pins =3D "gpio168"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + sel-pins { + pins =3D "gpio167"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + }; + + wcn_bt_en: wcn-bt-en-state { + pins =3D "gpio116"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wwan_sw_en: wwan-sw-en-state { + pins =3D "gpio221"; + function =3D "gpio"; + drive-strength =3D <4>; + bias-disable; + }; + + wcn_sw_en: wcn-sw-en-state { + pins =3D "gpio214"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wcn_usb_sw_n: wcn-usb-sw-n-state { + pins =3D "gpio225"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + output-high; + }; +}; + +&uart14 { + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn7850-bt"; + max-speed =3D <3200000>; + + vddaon-supply =3D <&vreg_pmu_aon_0p59>; + vddwlcx-supply =3D <&vreg_pmu_wlcx_0p8>; + vddwlmx-supply =3D <&vreg_pmu_wlmx_0p85>; + vddrfacmn-supply =3D <&vreg_pmu_rfa_cmn>; + vddrfa0p8-supply =3D <&vreg_pmu_rfa_0p8>; + vddrfa1p2-supply =3D <&vreg_pmu_rfa_1p2>; + vddrfa1p8-supply =3D <&vreg_pmu_rfa_1p8>; + }; +}; + +&uart21 { + compatible =3D "qcom,geni-debug-uart"; + + status =3D "okay"; +}; + +&usb_1_ss0_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss0_hs_in>; +}; + +&usb_1_ss0_hsphy { + phys =3D <&smb2360_0_eusb2_repeater>; +}; + +&usb_1_ss0_qmpphy_out { + remote-endpoint =3D <&pmic_glink_ss0_ss_in>; +}; + +&usb_1_ss1_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss1_hs_in>; +}; + +&usb_1_ss1_hsphy { + phys =3D <&smb2360_1_eusb2_repeater>; +}; + +&usb_1_ss1_qmpphy_out { + remote-endpoint =3D <&retimer_ss1_ss_in>; +}; + +&usb_1_ss2_dwc3_hs { + remote-endpoint =3D <&pmic_glink_ss2_hs_in>; +}; + +&usb_1_ss2_hsphy { + phys =3D <&smb2360_2_eusb2_repeater>; +}; + +&usb_1_ss2_qmpphy_out { + remote-endpoint =3D <&retimer_ss2_ss_in>; +}; + +&usb_2_hsphy { + phys =3D <&eusb5_repeater>; + + pinctrl-0 =3D <&wcn_usb_sw_n>; + pinctrl-names =3D "default"; +}; + +&usb_mp_hsphy0 { + phys =3D <&eusb6_repeater>; +}; + +&usb_mp_hsphy1 { + phys =3D <&eusb3_repeater>; +}; --=20 2.34.1