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We do not touch registers that will not be read by the SMMU due to disabled features. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mostafa Saleh --- .../iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c | 149 +++++++++++++++++- .../iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h | 12 ++ 2 files changed, 160 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c b/drivers/iom= mu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c index 2f43804e08e0..e9bc35e019b6 100644 --- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c @@ -7,15 +7,162 @@ #include =20 #include +#include =20 #include "arm_smmu_v3.h" =20 +#define ARM_SMMU_POLL_TIMEOUT_US 100000 /* 100ms arbitrary timeout */ + size_t __ro_after_init kvm_hyp_arm_smmu_v3_count; struct hyp_arm_smmu_v3_device *kvm_hyp_arm_smmu_v3_smmus; =20 +#define for_each_smmu(smmu) \ + for ((smmu) =3D kvm_hyp_arm_smmu_v3_smmus; \ + (smmu) !=3D &kvm_hyp_arm_smmu_v3_smmus[kvm_hyp_arm_smmu_v3_count]; \ + (smmu)++) + +/* + * Wait until @cond is true. + * Return 0 on success, or -ETIMEDOUT + */ +#define smmu_wait(_cond) \ +({ \ + int __ret =3D 0; \ + u64 delay =3D pkvm_time_get() + ARM_SMMU_POLL_TIMEOUT_US; \ + \ + while (!(_cond)) { \ + if (pkvm_time_get() >=3D delay) { \ + __ret =3D -ETIMEDOUT; \ + break; \ + } \ + } \ + __ret; \ +}) + +static int smmu_write_cr0(struct hyp_arm_smmu_v3_device *smmu, u32 val) +{ + writel_relaxed(val, smmu->base + ARM_SMMU_CR0); + return smmu_wait(readl_relaxed(smmu->base + ARM_SMMU_CR0ACK) =3D=3D val); +} + +/* Transfer ownership of structures from host to hyp */ +static int smmu_take_pages(u64 phys, size_t size) +{ + WARN_ON(!PAGE_ALIGNED(phys) || !PAGE_ALIGNED(size)); + return __pkvm_host_donate_hyp(phys >> PAGE_SHIFT, size >> PAGE_SHIFT); +} + +static void smmu_reclaim_pages(u64 phys, size_t size) +{ + WARN_ON(!PAGE_ALIGNED(phys) || !PAGE_ALIGNED(size)); + WARN_ON(__pkvm_hyp_donate_host(phys >> PAGE_SHIFT, size >> PAGE_SHIFT)); +} + +static int smmu_init_registers(struct hyp_arm_smmu_v3_device *smmu) +{ + u64 val, old; + int ret; + + if (!(readl_relaxed(smmu->base + ARM_SMMU_GBPA) & GBPA_ABORT)) + return -EINVAL; + + /* Initialize all RW registers that will be read by the SMMU */ + ret =3D smmu_write_cr0(smmu, 0); + if (ret) + return ret; + + val =3D FIELD_PREP(CR1_TABLE_SH, ARM_SMMU_SH_ISH) | + FIELD_PREP(CR1_TABLE_OC, CR1_CACHE_WB) | + FIELD_PREP(CR1_TABLE_IC, CR1_CACHE_WB) | + FIELD_PREP(CR1_QUEUE_SH, ARM_SMMU_SH_ISH) | + FIELD_PREP(CR1_QUEUE_OC, CR1_CACHE_WB) | + FIELD_PREP(CR1_QUEUE_IC, CR1_CACHE_WB); + writel_relaxed(val, smmu->base + ARM_SMMU_CR1); + writel_relaxed(CR2_PTM, smmu->base + ARM_SMMU_CR2); + writel_relaxed(0, smmu->base + ARM_SMMU_IRQ_CTRL); + + val =3D readl_relaxed(smmu->base + ARM_SMMU_GERROR); + old =3D readl_relaxed(smmu->base + ARM_SMMU_GERRORN); + /* Service Failure Mode is fatal */ + if ((val ^ old) & GERROR_SFM_ERR) + return -EIO; + /* Clear pending errors */ + writel_relaxed(val, smmu->base + ARM_SMMU_GERRORN); + + return 0; +} + +/* Put the device in a state that can be probed by the host driver. */ +static void smmu_deinit_device(struct hyp_arm_smmu_v3_device *smmu) +{ + int i; + size_t nr_pages =3D smmu->mmio_size >> PAGE_SHIFT; + + for (i =3D 0 ; i < nr_pages ; ++i) { + u64 pfn =3D (smmu->mmio_addr >> PAGE_SHIFT) + i; + + WARN_ON(__pkvm_hyp_donate_host_mmio(pfn)); + } +} + +static int smmu_init_device(struct hyp_arm_smmu_v3_device *smmu) +{ + int i; + size_t nr_pages; + int ret; + + if (!PAGE_ALIGNED(smmu->mmio_addr | smmu->mmio_size)) + return -EINVAL; + + nr_pages =3D smmu->mmio_size >> PAGE_SHIFT; + for (i =3D 0 ; i < nr_pages ; ++i) { + u64 pfn =3D (smmu->mmio_addr >> PAGE_SHIFT) + i; + + /* + * This should never happen, so it's fine to be strict to avoid + * complicated error handling. + */ + WARN_ON(__pkvm_host_donate_hyp_mmio(pfn)); + } + smmu->base =3D hyp_phys_to_virt(smmu->mmio_addr); + + ret =3D smmu_init_registers(smmu); + if (ret) + goto out_err; + return ret; + +out_err: + smmu_deinit_device(smmu); + return ret; +} + static int smmu_init(void) { - return -ENOSYS; + int ret; + struct hyp_arm_smmu_v3_device *smmu; + size_t smmu_arr_size =3D PAGE_ALIGN(sizeof(*kvm_hyp_arm_smmu_v3_smmus) * + kvm_hyp_arm_smmu_v3_count); + phys_addr_t smmu_arr_phys; + + kvm_hyp_arm_smmu_v3_smmus =3D kern_hyp_va(kvm_hyp_arm_smmu_v3_smmus); + smmu_arr_phys =3D hyp_virt_to_phys(kvm_hyp_arm_smmu_v3_smmus); + + ret =3D smmu_take_pages(smmu_arr_phys, smmu_arr_size); + if (ret) + return ret; + + for_each_smmu(smmu) { + ret =3D smmu_init_device(smmu); + if (ret) + goto out_reclaim_smmu; + } + + return 0; +out_reclaim_smmu: + while (smmu !=3D kvm_hyp_arm_smmu_v3_smmus) + smmu_deinit_device(--smmu); + smmu_reclaim_pages(smmu_arr_phys, smmu_arr_size); + return ret; } =20 /* Shared with the kernel driver in EL1 */ diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h b/drivers/iom= mu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h index f6ad91d3fb85..9b1d021ada63 100644 --- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm_smmu_v3.h @@ -4,7 +4,19 @@ =20 #include =20 +#include "../arm-smmu-v3-common.h" + +/* + * Parameters from the trusted host: + * @mmio_addr base address of the SMMU registers + * @mmio_size size of the registers resource + * @base Virtual address of SMMU registers + * Other members are filled and used at runtime by the SMMU driver. + */ struct hyp_arm_smmu_v3_device { + phys_addr_t mmio_addr; + size_t mmio_size; + void __iomem *base; }; =20 extern size_t kvm_nvhe_sym(kvm_hyp_arm_smmu_v3_count); --=20 2.50.1.552.g942d659e1b-goog