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Mon, 28 Jul 2025 09:45:13 -0400 From: Ioana Risteiu To: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , "David Lechner" , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ramona Nechita , , , CC: Ioana Risteiu Subject: [PATCH 4/4] iio: adc: Update ad7779 to use IIO backend Date: Mon, 28 Jul 2025 16:43:36 +0300 Message-ID: <20250728134340.3644-5-Ioana.Risteiu@analog.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250728134340.3644-1-Ioana.Risteiu@analog.com> References: <20250728134340.3644-1-Ioana.Risteiu@analog.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI4MDA5OSBTYWx0ZWRfX7EtbNhme0PaH AdkM5SsuyrE55G8IESpPBqQ78GFmZ1XRzhagAZHnVAJXoEI5Z5zt6I0I8CJGGqufwC/xcBJ3NPV ui4rpvpZ8aCWI7WzH8zDe4VPfMVpFfKMO/rK4vJrcpnVyrs8ZonQhR80JJMaEep/XK1r7FcO+Ll VGlS/kniVf0E8L8+MvVSYuzBokUZP//zzpbuORQx1gk2w1CexLEiVsXfDfNJDL8/MVn5rqTCDBG 1elf38rw9F8hf2dfldQIa7Yo4CihRU+yuxlbYEX4lLRz7jcC2+KJuxb2jFBDd9/OwjFsiyElETQ oXwpet4Vo2Au8PFkQTVsmS6ds/b3HkzMvz2dSL62a9QcMqI22Y1K7Pftvi5A2iXiK0h0ry8ijnj /Z7J+dJwNYpCw8eBzMzMBtGW5/uPYoMBFhr1/he8YyfZBGC9FITW5A1jzpIU3mqqWOUxtNIk X-Authority-Analysis: v=2.4 cv=WN9/XmsR c=1 sm=1 tr=0 ts=68877ef0 cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=Wb1JkmetP80A:10 a=gAnH3GRIAAAA:8 a=J2y4Sem60MisZtHZY1wA:9 X-Proofpoint-GUID: TTquj49XyucnDCi0oNVHKjs1cmFzymtX X-Proofpoint-ORIG-GUID: TTquj49XyucnDCi0oNVHKjs1cmFzymtX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_03,2025-07-28_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 malwarescore=0 priorityscore=1501 mlxlogscore=999 phishscore=0 clxscore=1015 impostorscore=0 spamscore=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507280099 Content-Type: text/plain; charset="utf-8" Add a new functionality to ad7779 driver that streams data through data output interface using IIO backend interface. Signed-off-by: Ioana Risteiu --- drivers/iio/adc/ad7779.c | 299 +++++++++++++++++++++++++++++++++------ 1 file changed, 256 insertions(+), 43 deletions(-) diff --git a/drivers/iio/adc/ad7779.c b/drivers/iio/adc/ad7779.c index 845adc510239..872c551eadf6 100644 --- a/drivers/iio/adc/ad7779.c +++ b/drivers/iio/adc/ad7779.c @@ -31,6 +31,8 @@ #include #include =20 +#include + #define AD7779_SPI_READ_CMD BIT(7) =20 #define AD7779_DISABLE_SD BIT(7) @@ -116,6 +118,12 @@ #define AD7779_CRC8_POLY 0x07 DECLARE_CRC8_TABLE(ad7779_crc8_table); =20 +enum ad7779_data_lines { + AD7779_4LINES, + AD7779_2LINES, + AD7779_1LINE, +}; + enum ad7779_filter { AD7779_SINC3, AD7779_SINC5, @@ -157,6 +165,8 @@ struct ad7779_state { u8 reg_rx_buf[3]; u8 reg_tx_buf[3]; u8 reset_buf[8]; + + struct iio_backend *back; }; =20 static const char * const ad7779_filter_type[] =3D { @@ -164,6 +174,12 @@ static const char * const ad7779_filter_type[] =3D { [AD7779_SINC5] =3D "sinc5", }; =20 +static const char * const ad7779_data_lines_modes[] =3D { + [AD7779_4LINES] =3D "4_data_lines", + [AD7779_2LINES] =3D "2_data_lines", + [AD7779_1LINE] =3D "1_data_line", +}; + static const char * const ad7779_power_supplies[] =3D { "avdd1", "avdd2", "avdd4", }; @@ -339,6 +355,59 @@ static int ad7779_set_sampling_frequency(struct ad7779= _state *st, return 0; } =20 +static int ad7779_set_data_lines(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + unsigned int mode) +{ + struct ad7779_state *st =3D iio_priv(indio_dev); + int ret; + + ret =3D ad7779_spi_write_mask(st, AD7779_REG_DOUT_FORMAT, + AD7779_DOUT_FORMAT_MSK, + FIELD_PREP(AD7779_DOUT_FORMAT_MSK, mode)); + switch (mode) { + case AD7779_4LINES: + ret =3D ad7779_set_sampling_frequency(st, AD7779_DEFAULT_SAMPLING_FREQ); + if (ret) + return ret; + ret =3D iio_backend_num_lanes_set(st->back, 4); + break; + case AD7779_2LINES: + ret =3D ad7779_set_sampling_frequency(st, AD7779_DEFAULT_SAMPLING_2LINE); + if (ret) + return ret; + ret =3D iio_backend_num_lanes_set(st->back, 2); + break; + case AD7779_1LINE: + ret =3D ad7779_set_sampling_frequency(st, AD7779_DEFAULT_SAMPLING_1LINE); + if (ret) + return ret; + ret =3D iio_backend_num_lanes_set(st->back, 1); + break; + default: + return -EINVAL; + } + + if (ret) + return ret; + + return 0; +} + +static int ad7779_get_data_lines(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan) +{ + struct ad7779_state *st =3D iio_priv(indio_dev); + u8 temp; + int ret; + + ret =3D ad7779_spi_read(st, AD7779_REG_DOUT_FORMAT, &temp); + if (ret) + return ret; + + return FIELD_GET(AD7779_DOUT_FORMAT_MSK, temp); +} + static int ad7779_get_filter(struct iio_dev *indio_dev, struct iio_chan_spec const *chan) { @@ -630,12 +699,45 @@ static int ad7779_reset(struct iio_dev *indio_dev, st= ruct gpio_desc *reset_gpio) return ret; } =20 +static int ad7779_update_scan_mode(struct iio_dev *indio_dev, + const unsigned long *scan_mask) +{ + struct ad7779_state *st =3D iio_priv(indio_dev); + unsigned int c; + int ret; + + for (c =3D 0; c < AD7779_NUM_CHANNELS; c++) { + if (test_bit(c, scan_mask)) + ret =3D iio_backend_chan_enable(st->back, c); + else + ret =3D iio_backend_chan_disable(st->back, c); + if (ret) + return ret; + } + + return 0; +} + static const struct iio_info ad7779_info =3D { .read_raw =3D ad7779_read_raw, .write_raw =3D ad7779_write_raw, .debugfs_reg_access =3D &ad7779_reg_access, }; =20 +static const struct iio_info ad7779_info_data =3D { + .read_raw =3D ad7779_read_raw, + .write_raw =3D ad7779_write_raw, + .debugfs_reg_access =3D &ad7779_reg_access, + .update_scan_mode =3D &ad7779_update_scan_mode, +}; + +static const struct iio_enum ad7779_data_lines_enum =3D { + .items =3D ad7779_data_lines_modes, + .num_items =3D ARRAY_SIZE(ad7779_data_lines_modes), + .get =3D ad7779_get_data_lines, + .set =3D ad7779_set_data_lines, +}; + static const struct iio_enum ad7779_filter_enum =3D { .items =3D ad7779_filter_type, .num_items =3D ARRAY_SIZE(ad7779_filter_type), @@ -643,6 +745,13 @@ static const struct iio_enum ad7779_filter_enum =3D { .set =3D ad7779_set_filter, }; =20 +static const struct iio_chan_spec_ext_info ad7779_ext_info[] =3D { + IIO_ENUM("data_lines", IIO_SHARED_BY_ALL, &ad7779_data_lines_enum), + IIO_ENUM_AVAILABLE("data_lines", IIO_SHARED_BY_ALL, + &ad7779_data_lines_enum), + { } +}; + static const struct iio_chan_spec_ext_info ad7779_ext_filter[] =3D { IIO_ENUM("filter_type", IIO_SHARED_BY_ALL, &ad7779_filter_enum), IIO_ENUM_AVAILABLE("filter_type", IIO_SHARED_BY_ALL, @@ -650,6 +759,16 @@ static const struct iio_chan_spec_ext_info ad7779_ext_= filter[] =3D { { } }; =20 +static const struct iio_chan_spec_ext_info ad7779_ext_info_filter[] =3D { + IIO_ENUM("data_lines", IIO_SHARED_BY_ALL, &ad7779_data_lines_enum), + IIO_ENUM_AVAILABLE("data_lines", IIO_SHARED_BY_ALL, + &ad7779_data_lines_enum), + IIO_ENUM("filter_type", IIO_SHARED_BY_ALL, &ad7779_filter_enum), + IIO_ENUM_AVAILABLE("filter_type", IIO_SHARED_BY_ALL, + &ad7779_filter_enum), + { } +}; + #define AD777x_CHAN_S(index, _ext_info) \ { \ .type =3D IIO_VOLTAGE, \ @@ -669,11 +788,34 @@ static const struct iio_chan_spec_ext_info ad7779_ext= _filter[] =3D { }, \ } =20 +#define AD777X_CHAN(index, _ext_info) \ + { \ + .type =3D IIO_VOLTAGE, \ + .info_mask_shared_by_all =3D BIT(IIO_CHAN_INFO_SAMP_FREQ), \ + .address =3D (index), \ + .indexed =3D 1, \ + .channel =3D (index), \ + .scan_index =3D (index), \ + .ext_info =3D (_ext_info), \ + .scan_type =3D { \ + .sign =3D 's', \ + .realbits =3D 24, \ + .storagebits =3D 32, \ + }, \ + } + #define AD777x_CHAN_NO_FILTER_S(index) \ AD777x_CHAN_S(index, NULL) =20 +#define AD777X_CHAN_NO_FILTER(index) \ + AD777X_CHAN(index, ad7779_ext_info) + #define AD777x_CHAN_FILTER_S(index) \ AD777x_CHAN_S(index, ad7779_ext_filter) + +#define AD777X_CHAN_FILTER(index) \ + AD777X_CHAN(index, ad7779_ext_info_filter) + static const struct iio_chan_spec ad7779_channels[] =3D { AD777x_CHAN_NO_FILTER_S(0), AD777x_CHAN_NO_FILTER_S(1), @@ -686,6 +828,17 @@ static const struct iio_chan_spec ad7779_channels[] = =3D { IIO_CHAN_SOFT_TIMESTAMP(8), }; =20 +static const struct iio_chan_spec ad7779_channels_data[] =3D { + AD777X_CHAN_NO_FILTER(0), + AD777X_CHAN_NO_FILTER(1), + AD777X_CHAN_NO_FILTER(2), + AD777X_CHAN_NO_FILTER(3), + AD777X_CHAN_NO_FILTER(4), + AD777X_CHAN_NO_FILTER(5), + AD777X_CHAN_NO_FILTER(6), + AD777X_CHAN_NO_FILTER(7), +}; + static const struct iio_chan_spec ad7779_channels_filter[] =3D { AD777x_CHAN_FILTER_S(0), AD777x_CHAN_FILTER_S(1), @@ -698,6 +851,17 @@ static const struct iio_chan_spec ad7779_channels_filt= er[] =3D { IIO_CHAN_SOFT_TIMESTAMP(8), }; =20 +static const struct iio_chan_spec ad7779_channels_filter_data[] =3D { + AD777X_CHAN_FILTER(0), + AD777X_CHAN_FILTER(1), + AD777X_CHAN_FILTER(2), + AD777X_CHAN_FILTER(3), + AD777X_CHAN_FILTER(4), + AD777X_CHAN_FILTER(5), + AD777X_CHAN_FILTER(6), + AD777X_CHAN_FILTER(7), +}; + static const struct iio_buffer_setup_ops ad7779_buffer_setup_ops =3D { .preenable =3D ad7779_buffer_preenable, .postdisable =3D ad7779_buffer_postdisable, @@ -752,6 +916,91 @@ static int ad7779_conf(struct ad7779_state *st, struct= gpio_desc *start_gpio) return 0; } =20 +static int ad7779_register_irq(struct ad7779_state *st, struct iio_dev *in= dio_dev) +{ + int ret; + struct device *dev =3D &st->spi->dev; + + indio_dev->info =3D &ad7779_info; + indio_dev->channels =3D st->chip_info->channels; + indio_dev->num_channels =3D ARRAY_SIZE(ad7779_channels); + + st->trig =3D devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name, + iio_device_id(indio_dev)); + if (!st->trig) + return -ENOMEM; + + st->trig->ops =3D &ad7779_trigger_ops; + + iio_trigger_set_drvdata(st->trig, st); + + ret =3D devm_request_irq(dev, st->spi->irq, iio_trigger_generic_data_rdy_= poll, + IRQF_ONESHOT | IRQF_NO_AUTOEN, indio_dev->name, + st->trig); + if (ret) + return dev_err_probe(dev, ret, "request IRQ %d failed\n", + st->spi->irq); + + ret =3D devm_iio_trigger_register(dev, st->trig); + if (ret) + return ret; + + indio_dev->trig =3D iio_trigger_get(st->trig); + + init_completion(&st->completion); + + ret =3D devm_iio_triggered_buffer_setup(dev, indio_dev, + &iio_pollfunc_store_time, + &ad7779_trigger_handler, + &ad7779_buffer_setup_ops); + if (ret) + return ret; + + ret =3D ad7779_spi_write_mask(st, AD7779_REG_DOUT_FORMAT, + AD7779_DCLK_CLK_DIV_MSK, + FIELD_PREP(AD7779_DCLK_CLK_DIV_MSK, 7)); + if (ret) + return ret; + + return devm_iio_device_register(dev, indio_dev); +} + +static int ad7779_register_back(struct ad7779_state *st, struct iio_dev *i= ndio_dev) +{ + struct device *dev =3D &st->spi->dev; + int ret =3D -EINVAL; + + indio_dev->info =3D &ad7779_info_data; + + if (strcmp(st->chip_info->name, "ad7771") =3D=3D 0) { + indio_dev->channels =3D ad7779_channels_filter_data; + indio_dev->num_channels =3D ARRAY_SIZE(ad7779_channels_filter_data); + } else { + indio_dev->channels =3D ad7779_channels_data; + indio_dev->num_channels =3D ARRAY_SIZE(ad7779_channels_data); + } + + st->back =3D devm_iio_backend_get(dev, NULL); + if (IS_ERR(st->back)) { + dev_err_probe(dev, ret, "failed to get iio backend"); + return PTR_ERR(st->back); + } + + ret =3D devm_iio_backend_request_buffer(dev, st->back, indio_dev); + if (ret) + return ret; + + ret =3D devm_iio_backend_enable(dev, st->back); + if (ret) + return ret; + + ret =3D iio_backend_num_lanes_set(st->back, 4); + if (ret) + return ret; + + return devm_iio_device_register(dev, indio_dev); +} + static int ad7779_probe(struct spi_device *spi) { struct iio_dev *indio_dev; @@ -760,8 +1009,8 @@ static int ad7779_probe(struct spi_device *spi) struct device *dev =3D &spi->dev; int ret =3D -EINVAL; =20 - if (!spi->irq) - return dev_err_probe(dev, ret, "DRDY irq not present\n"); + if (!spi->irq && !device_property_present(dev, "io-backends")) + return dev_err_probe(dev, ret, "Either DRDY interrupt or io-backends pro= perty required\n"); =20 indio_dev =3D devm_iio_device_alloc(dev, sizeof(*st)); if (!indio_dev) @@ -804,49 +1053,12 @@ static int ad7779_probe(struct spi_device *spi) return ret; =20 indio_dev->name =3D st->chip_info->name; - indio_dev->info =3D &ad7779_info; indio_dev->modes =3D INDIO_DIRECT_MODE; - indio_dev->channels =3D st->chip_info->channels; - indio_dev->num_channels =3D ARRAY_SIZE(ad7779_channels); - - st->trig =3D devm_iio_trigger_alloc(dev, "%s-dev%d", indio_dev->name, - iio_device_id(indio_dev)); - if (!st->trig) - return -ENOMEM; - - st->trig->ops =3D &ad7779_trigger_ops; - - iio_trigger_set_drvdata(st->trig, st); - - ret =3D devm_request_irq(dev, spi->irq, iio_trigger_generic_data_rdy_poll, - IRQF_ONESHOT | IRQF_NO_AUTOEN, indio_dev->name, - st->trig); - if (ret) - return dev_err_probe(dev, ret, "request IRQ %d failed\n", - st->spi->irq); - - ret =3D devm_iio_trigger_register(dev, st->trig); - if (ret) - return ret; - - indio_dev->trig =3D iio_trigger_get(st->trig); - - init_completion(&st->completion); - - ret =3D devm_iio_triggered_buffer_setup(dev, indio_dev, - &iio_pollfunc_store_time, - &ad7779_trigger_handler, - &ad7779_buffer_setup_ops); - if (ret) - return ret; =20 - ret =3D ad7779_spi_write_mask(st, AD7779_REG_DOUT_FORMAT, - AD7779_DCLK_CLK_DIV_MSK, - FIELD_PREP(AD7779_DCLK_CLK_DIV_MSK, 7)); - if (ret) - return ret; - - return devm_iio_device_register(dev, indio_dev); + if (spi->irq) + return ad7779_register_irq(st, indio_dev); + else + return ad7779_register_back(st, indio_dev); } =20 static int ad7779_suspend(struct device *dev) @@ -936,3 +1148,4 @@ module_spi_driver(ad7779_driver); MODULE_AUTHOR("Ramona Alexandra Nechita "); MODULE_DESCRIPTION("Analog Devices AD7779 ADC"); MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_BACKEND"); --=20 2.47.2