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Mon, 28 Jul 2025 06:14:49 -0700 (PDT) From: Jun Nie Date: Mon, 28 Jul 2025 21:14:25 +0800 Subject: [PATCH v13 01/12] drm/msm/dpu: polish log for resource allocation Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250728-v6-16-rc2-quad-pipe-upstream-v13-1-954e4917fe4f@linaro.org> References: <20250728-v6-16-rc2-quad-pipe-upstream-v13-0-954e4917fe4f@linaro.org> In-Reply-To: <20250728-v6-16-rc2-quad-pipe-upstream-v13-0-954e4917fe4f@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Jessica Zhang Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Jun Nie , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753708472; l=2319; i=jun.nie@linaro.org; s=20240403; h=from:subject:message-id; bh=xSbmnUPPIXthlmIB0KVW45Mr6GQu0WXNqCZGA6y0yZ0=; b=lVpvqNqN4710MACSOo02aP3ML9e8AZPuQuFTAF4tkcRI2wnxVjA2Op28INXYKbd1ld2C2MPfo 1L+fKhd1vOoAIWq0tgV0XQ4bXeeC+WHqW9SSUxJkIYV5ZBFFCECC8LH X-Developer-Key: i=jun.nie@linaro.org; a=ed25519; pk=MNiBt/faLPvo+iJoP1hodyY2x6ozVXL8QMptmsKg3cc= It is more likely that resource allocation may fail in complex usage case, such as quad-pipe case, than existing usage cases. A resource type ID is printed on failure in the current implementation, but the raw ID number is not explicit enough to help easily understand which resource caused the failure, so add a table to match the type ID to an human readable resource name and use it in the error print. Signed-off-by: Jun Nie Reviewed-by: Jessica Zhang Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/d= isp/dpu1/dpu_rm.c index 25382120cb1a4f2b68b0c6573371f75fb8d489ea..2c77c74fac0fda649da8ce19b7b= 3c6cb32b9535c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -865,6 +865,21 @@ void dpu_rm_release_all_sspp(struct dpu_global_state *= global_state, ARRAY_SIZE(global_state->sspp_to_crtc_id), crtc_id); } =20 +static char *dpu_hw_blk_type_name[] =3D { + [DPU_HW_BLK_TOP] =3D "TOP", + [DPU_HW_BLK_SSPP] =3D "SSPP", + [DPU_HW_BLK_LM] =3D "LM", + [DPU_HW_BLK_CTL] =3D "CTL", + [DPU_HW_BLK_PINGPONG] =3D "pingpong", + [DPU_HW_BLK_INTF] =3D "INTF", + [DPU_HW_BLK_WB] =3D "WB", + [DPU_HW_BLK_DSPP] =3D "DSPP", + [DPU_HW_BLK_MERGE_3D] =3D "merge_3d", + [DPU_HW_BLK_DSC] =3D "DSC", + [DPU_HW_BLK_CDM] =3D "CDM", + [DPU_HW_BLK_MAX] =3D "unknown", +}; + /** * dpu_rm_get_assigned_resources - Get hw resources of the given type that= are * assigned to this encoder @@ -946,13 +961,13 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, } =20 if (num_blks =3D=3D blks_size) { - DPU_ERROR("More than %d resources assigned to crtc %d\n", - blks_size, crtc_id); + DPU_ERROR("More than %d %s assigned to crtc %d\n", + blks_size, dpu_hw_blk_type_name[type], crtc_id); break; } if (!hw_blks[i]) { - DPU_ERROR("Allocated resource %d unavailable to assign to crtc %d\n", - type, crtc_id); + DPU_ERROR("%s unavailable to assign to crtc %d\n", + dpu_hw_blk_type_name[type], crtc_id); break; } blks[num_blks++] =3D hw_blks[i]; --=20 2.34.1