From nobody Mon Oct 6 01:25:51 2025 Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 30688266A7; Sun, 27 Jul 2025 16:07:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753632459; cv=none; b=K8HdtTnvgWd1CWGTpnVgp0P1GTvYP/+RovYb96eYt6pQ9nnTxOj/uN8WwcnPB3dlVFVWmFpY27NjHk6q2sUXFAgGjhUlk6tsLg5O/52daAOPxfNmQ/WGNHMPsc/Cd3KRgdPcjHg0TOfhOr2Lipra2yalGzXJ8IiPifti+bVrMuc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753632459; c=relaxed/simple; bh=pZWpIDRldAnhhur7e2jNcZxhW0QKMXgm3GjVpv451yE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=K947E7ZjqfcBV7VL1THI0jR/NQmWnV8OzYKClUQk7Bd4xsJ3rNC3Xdm5WiwN0Dq67Wi8uLj1ckAG24f0JWFrEfpPuxBOsH2E89UIcdUQFtdh9C6RsNlP7uilZgoGXBhuoiG8PYQMiX24ogCX1wXAUUqZWSiy+X+/oNt6JvjVmnY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=IhyTGruc; arc=none smtp.client-ip=209.85.221.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="IhyTGruc" Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-3b78310b296so395871f8f.2; Sun, 27 Jul 2025 09:07:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1753632454; x=1754237254; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VnjbDis0A7bH/zvFm0vxLxf4ewSGzdHeQArTdwNiWjk=; b=IhyTGrucenLLpMVA3UJbkUjZl3CQU6EVPRneyAoDbzsaMytSguE2P0Z8dtY3MLcrxc 1C7wyopNaGcVqv0Flc/MfK0pDXBw77lIprPrdOLAZE05QtJfWNWHD3PJfT/d04EJg/Bq vYaCye9T1esBuMtGipw3kI5QZV1fPgg1qZV0Yl2WTqilXIEkDAysgbLzdLcFpMdaIiRo qNBiorZ5mh9m88fh0awqPSvmIrbDumIm+aRrDHsUrrzFM3zgPhcVeGSdEBgsS7Vaxfcd omjhy22EFDjDXd+frQXGUMO9Ubz++WBALrOFAwK3ZDKWPH0h4yhQ3eNso389Tn9mROtN BWWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753632454; x=1754237254; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VnjbDis0A7bH/zvFm0vxLxf4ewSGzdHeQArTdwNiWjk=; b=kSfuydZGwhDEz2x0ET7RczCTyv2JABqvPgWKvg836W7KvI1RW+7thR3ixjOPQMSajy u8HdXp/R6j9qkD70bD6oenMuC/JVQvV3HOE2CYFlL8gL+6Ve1xvEEZYrekRU2dqsHEJL gUgqvmkUhagSKRgGfeH+KYYjv5AL7Jjqbq8d5M7Akbhy7wsOX5Uya2Bb+X2HTktqRaIS uYkaatv8HR55ve9NAwOlrmQOw2QsW2RM5E3PRH//dRW7cHeeo6VC5TO92jr/0rNRjOBN aTmF7TOK38wKuTetVzwIAp48PCe85dHVIHaRji1eIHDesDWBdpilq0iAy4SMQc0wAhRb QenA== X-Forwarded-Encrypted: i=1; AJvYcCUCuV0HjbgBabSdYmHKacPE8W6shsjJFd/oEb84UjW7vqDMr8CSprr8G6f2QNAnxm6CmFzunVwbOlCtRgM=@vger.kernel.org, AJvYcCUvExY2uHni/uvg3nehTBzNgKfKsMQkcUJIrk6H2o8sFt00RCGD7E//Wl+9/G0IyzImH/xg2TKJNfMT@vger.kernel.org, AJvYcCXSNmt+GmNYO028aVlcWA7v+bxg96HTvm+K2tpKkyEO78RuvUiKLYrTJGwt3aivzfaVjSoDk1GbWp8m7uq+kwWnctQ=@vger.kernel.org X-Gm-Message-State: AOJu0Yz0W/p7+SutLGYwNK8o/GPsqJuEfcF/wqZ5l59URQRqKo82cIZp poBTwnVTwTFWNvM6JVWWaa3fHOr7ggwGpfaCrWPrRPO3QjPmlcA28A+m X-Gm-Gg: ASbGncsWVB2kZuIusrM/b2W/io6K7RMjccfnldo6299y1WHRyYj7NESqHACE5QFvV6T Ejh/CM7eW/WUg9GLEMj8dLecGIAOFe64/QVU7Og2llUcUn6C0PUxnVd83x9cMaxv4WTD0tqHNxI RtmjiRBBAHfYCVTXNpqoVTjfFMWE6ys0GW/dRYPnvRRA8BC2JqkaQeOnZ8roaD7oU2/XHdeJsbN X5KAQ2PSQmZPV+YBrGpMUXh7Mdi8n/hna1dn1NeGrmH0DH7nzQCykyeATbjHS3KL4eRuL+FiTC0 qYdcmlQa2BMNCukEY9rir+8vBhigKh4dWE4aWAxiAuw07WoMPx7QuOAjRluODlfPVvIeGuDrQt+ m+737FwiCPrw7uEZUHmjtXnRAMqMdYkP6NefCyLoZBa0qDNNAm4KLXjy6d4zrK+Q9+gcsDg09lQ == X-Google-Smtp-Source: AGHT+IFv3lDskrmiFS760M9ZMDxE+kSMi9bS/qb0qGA1+h59OgvGSDucbPWlk6AmfK86FSqdOIPdxw== X-Received: by 2002:a05:6000:310a:b0:3b5:e6bf:5e0c with SMTP id ffacd0b85a97d-3b77675b7b6mr5718194f8f.31.1753632454109; Sun, 27 Jul 2025 09:07:34 -0700 (PDT) Received: from biju.lan (host31-53-6-191.range31-53.btcentralplus.com. [31.53.6.191]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4586ec63d29sm107788615e9.1.2025.07.27.09.07.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Jul 2025 09:07:33 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: Wolfram Sang , Ulf Hansson Cc: Biju Das , linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v2 1/2] mmc: tmio: Add 64-bit read/write support for SD_BUF0 in polling mode Date: Sun, 27 Jul 2025 17:07:26 +0100 Message-ID: <20250727160731.106312-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250727160731.106312-1-biju.das.jz@bp.renesas.com> References: <20250727160731.106312-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das As per the RZ/{G2L,G3E} HW manual SD_BUF0 can be accessed by 16/32/64 bits. Most of the data transfer in SD/SDIO/eMMC mode is more than 8 bytes. During testing it is found that, if the DMA buffer is not aligned to 128 bit it fallback to PIO mode. In such cases, 64-bit access is much more efficient than the current 16-bit. Tested-by: Wolfram Sang Reviewed-by: Wolfram Sang Signed-off-by: Biju Das --- RFT->v2: * Collected tags * Fixed the buid error reported by the bot by guarding the code with CONFIG_64BIT. --- drivers/mmc/host/tmio_mmc.h | 14 +++++++++++++ drivers/mmc/host/tmio_mmc_core.c | 33 ++++++++++++++++++++++++++++++ include/linux/platform_data/tmio.h | 3 +++ 3 files changed, 50 insertions(+) diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index d730b7633ae1..8cf9be9833b2 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -242,6 +242,20 @@ static inline void sd_ctrl_read32_rep(struct tmio_mmc_= host *host, int addr, ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count); } =20 +#ifdef CONFIG_64BIT +static inline void sd_ctrl_read64_rep(struct tmio_mmc_host *host, int addr, + u64 *buf, int count) +{ + ioread64_rep(host->ctl + (addr << host->bus_shift), buf, count); +} + +static inline void sd_ctrl_write64_rep(struct tmio_mmc_host *host, int add= r, + const u64 *buf, int count) +{ + iowrite64_rep(host->ctl + (addr << host->bus_shift), buf, count); +} +#endif + static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val) { diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_c= ore.c index 21c2f9095bac..775e0d9353d5 100644 --- a/drivers/mmc/host/tmio_mmc_core.c +++ b/drivers/mmc/host/tmio_mmc_core.c @@ -349,6 +349,39 @@ static void tmio_mmc_transfer_data(struct tmio_mmc_hos= t *host, /* * Transfer the data */ +#ifdef CONFIG_64BIT + if (host->pdata->flags & TMIO_MMC_64BIT_DATA_PORT) { + u64 *buf64 =3D (u64 *)buf; + u64 data =3D 0; + + if (count >=3D 8) { + if (is_read) + sd_ctrl_read64_rep(host, CTL_SD_DATA_PORT, + buf64, count >> 3); + else + sd_ctrl_write64_rep(host, CTL_SD_DATA_PORT, + buf64, count >> 3); + } + + /* if count was multiple of 8 */ + if (!(count & 0x7)) + return; + + buf64 +=3D count >> 3; + count %=3D 8; + + if (is_read) { + sd_ctrl_read64_rep(host, CTL_SD_DATA_PORT, &data, 1); + memcpy(buf64, &data, count); + } else { + memcpy(&data, buf64, count); + sd_ctrl_write64_rep(host, CTL_SD_DATA_PORT, &data, 1); + } + + return; + } +#endif + if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) { u32 data =3D 0; u32 *buf32 =3D (u32 *)buf; diff --git a/include/linux/platform_data/tmio.h b/include/linux/platform_da= ta/tmio.h index b060124ba1ae..426291713b83 100644 --- a/include/linux/platform_data/tmio.h +++ b/include/linux/platform_data/tmio.h @@ -47,6 +47,9 @@ /* Some controllers have a CBSY bit */ #define TMIO_MMC_HAVE_CBSY BIT(11) =20 +/* Some controllers have a 64-bit wide data port register */ +#define TMIO_MMC_64BIT_DATA_PORT BIT(12) + struct tmio_mmc_data { void *chan_priv_tx; void *chan_priv_rx; --=20 2.43.0 From nobody Mon Oct 6 01:25:51 2025 Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6FC786337; Sun, 27 Jul 2025 16:07:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753632459; cv=none; b=RF5dxXJAYqk7bbpLJN4J7PhqwDBbh39dhOL/IRYlL5KqpBDAGbpIKxmRqYpWf0SmSdRoJJ/4xLwEaICkhPpKzGKfcNSotz2yQzWt4ICxb51FSXuLwPlwjxRfl2eD6khw7npg7hfHj7LFZMaO/l2iPK/Z7tKLPHnYLBkky/EIem8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753632459; c=relaxed/simple; bh=0CeknRqE0eEfZCrRsdLe+YXGsdILn1lLahY4PY6zFEs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZQhGoIn2yZ6V7W2E9LRptNVpDDMb+irritCc3zGchot0kGcwpg8tN16a7vo4KOyE/92b3COg03GAVncKpljQb4ziK3Cgk7TtCNYcTSRvbbGh3VB6zESKd4JnDMm3Yv2PRJGkt7aAwCd/KC4rd2z/PqY7EG/gIBSP7Dn4+SuIKYE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=VYMxq+gq; arc=none smtp.client-ip=209.85.221.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="VYMxq+gq" Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-3b773767fddso1757175f8f.0; Sun, 27 Jul 2025 09:07:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1753632455; x=1754237255; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tOkAOdu2F8aisPK/SoSZUBGiYlXhhPOuWigARvcwBB0=; b=VYMxq+gqGrNlZ0xkwE9AZbiaL3nG7Z3bpZImoR1yYHs9qWs8hqXzWCJT8j0RgwbSMy IvJOQgnNg2LhJoI8bbkN0cpVerYSTOhowTU2jWnPZEmhK+o5TALDBOUlqxhiY1l9eTSC Lif58CdpyiEylLd+1JoJ3ehcFDaFYTSUP/HEti/VDz6qBlm/SBOe5X/Gp2NDlVM0DKe2 C1qtX9p8IB0O29z6Sp88DSD935gJ64ig12xKMiMErYv5ftDMqjkK3jS8fSC327Z1dll9 CDcG+T7l9U9+FeLEWB6TpMujRxilb4vVEzJtYqngOlTTHE/Uj/W/jX4x/rw4+3LzpHCY 8AIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753632455; x=1754237255; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tOkAOdu2F8aisPK/SoSZUBGiYlXhhPOuWigARvcwBB0=; b=Xrg/F8+mYggkLlrhEZfAepV/YWUw05rvWZ1rOxLLDF5CsGwZd/3nWW5txwRn4gN+3v FiXhXWg9i+0X0WI0ainOYO0xSqr77Sa1hOIqC0+yx00hejLL7ZOJb/nmSm0EMKGB+SRY lSeucbajSOGKV5qSwNN+6eyQW2wdzw6outN7k59013egWwOWZplW1I5GfFR5SnDGg6XS Q5LUL1aiCmSQb8fdPOy7YNLijkj7nG1Z53IhGP8dP4S1vITEtXGL5fFzflxpClT3M+nn UGPJymO27rwYAlg24mdeU4YPPqqCPWuQOydZx8youvzEapavZ8HX7PJJ5up2xrW7ndJQ 3NgQ== X-Forwarded-Encrypted: i=1; AJvYcCUrafTvVyoREEqEYr0m5brf++TVHTpfiPVGHNHc1gHWxV+P/2lZMi3FyakoqEsgjlemMguWfihKZ4I3V1E=@vger.kernel.org, AJvYcCVm2LrVR84LdYKTM6SgW5Snbif8LbuzniMkUcnUSTLcekzSdOfvfu4kss898cD/0KmV77sI+2/mH+e5@vger.kernel.org, AJvYcCWOYfEJa+N3Fv4sFcaHhQbofcEobFRytsdg64suqcSUI6ftf8IJMATpb4rO1E8AVxA4TrcXToYzlVuKfE9eWTKIb8w=@vger.kernel.org X-Gm-Message-State: AOJu0Yy9oB4UFzxvT/9iZwWQR+pAGg5/3B9LJtqWafa4XMwR2FnmKU3N JbpyzF/waHcjH/5NPxvRSj3IJNltzqq0CkmTN/HzSfEBY6nWMlD6dozCnFUtkBpx54c= X-Gm-Gg: ASbGnctblNIGOb4IT5j/QXyTmnB+4Sif08SPFho1ykI/e/LfbHqJ2LXx6sjpJo/Ii5q l0R/d6zXDY6R/q6jF94qxfl+ueqBl/oZAcy2b0QjZ4I0yydRgYC1ydaLbJg9N4ruAF4pc9EwkKF 6ZEConjXGeqVpD1S0cIY6xkFJsZRMtPowIheC3TtOa09Yhcs4MfQV/XTQKnC0GUPT/CpeHgyp3a wgUfdk3aE2AMrP6xDfJQFSaS9GmPbUs0x9exxdNFazhC1Ua7Ia5BzjllYd2mexbapdhstArMOSh NYJn7BXCI2cmhHBLDH0jLk5IvtfqN8sQpNsC1jDRe8P+yE7hhXHv4qInVYqBJIARXaR9Tapqqve VyRv6yL2jhVpmAngOw2YNxykr+WiWyG6on336B6V8L2K7wal7k0j5AaWRQ5Tnk3m5Ry/k6beIFQ == X-Google-Smtp-Source: AGHT+IE3oplR9aeJ8D+dJUnqodAsc63A55seAZ0/aiznjn5Chr3s+GYBXldiuwfaqSz6ZeN8EgqFRw== X-Received: by 2002:a5d:5d86:0:b0:3b7:871b:8cba with SMTP id ffacd0b85a97d-3b7871b8d7fmr1160729f8f.55.1753632454759; Sun, 27 Jul 2025 09:07:34 -0700 (PDT) Received: from biju.lan (host31-53-6-191.range31-53.btcentralplus.com. [31.53.6.191]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4586ec63d29sm107788615e9.1.2025.07.27.09.07.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Jul 2025 09:07:34 -0700 (PDT) From: Biju X-Google-Original-From: Biju To: Wolfram Sang , Ulf Hansson Cc: Biju Das , linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v2 2/2] mmc: renesas_sdhi: Enable 64-bit polling mode Date: Sun, 27 Jul 2025 17:07:27 +0100 Message-ID: <20250727160731.106312-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250727160731.106312-1-biju.das.jz@bp.renesas.com> References: <20250727160731.106312-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das Enable 64-bit polling mode for R-Car gen3 and RZ/G2L SoCs. Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Signed-off-by: Biju Das --- RFT->v2: * Collected tags --- drivers/mmc/host/renesas_sdhi_internal_dmac.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/ho= st/renesas_sdhi_internal_dmac.c index 4b389e92399e..9e3ed0bcddd6 100644 --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c @@ -107,7 +107,8 @@ static const struct renesas_sdhi_of_data of_data_rza2 = =3D { =20 static const struct renesas_sdhi_of_data of_data_rcar_gen3 =3D { .tmio_flags =3D TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | - TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2, + TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2 | + TMIO_MMC_64BIT_DATA_PORT, .capabilities =3D MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY, .capabilities2 =3D MMC_CAP2_NO_WRITE_PROTECT | MMC_CAP2_MERGE_CAPABLE, --=20 2.43.0