From nobody Mon Oct 6 05:00:34 2025 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3AE7A2EE615; Fri, 25 Jul 2025 15:26:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753457196; cv=none; b=TGpBtsQmSQ584ZhGvwLFhOiqY7Y2UIHLNzKa3ueDa9VNbx2MC+1zv65lFAoJ+4KeJdCq9tMxvGyK+8wB2FBD8J2M9hKYDwqExHGK91WaxaeAQj3xP1PV44nTt4xVsrau8DRQQo89vM9FXGKGmAPeIifVwwxtwSTwO1LzoghcJyE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753457196; c=relaxed/simple; bh=Dr71X9TMibRCGENnbXpsKdj9kTXcwYk6Xmr1fetYOUA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=M1OnGUEdJjK7HNXhEAT0dtx9DwCGqKgdLtwbUZg3JwMxdklFK6B+Uc34QtVba+A5DSBZ2MyzuOYHhB4w+1IjMlJSQAgFZ9rW/ME+1p341oLRM0NQ8uyeQIRxSyyLDMwZFkbhaAyszdMIrlB7K1yN/esXJ0UbCyXhl4mck5WkGOk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=FjO+UY5m; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="FjO+UY5m" Received: by mail.gandi.net (Postfix) with ESMTPA id A831F442AC; Fri, 25 Jul 2025 15:26:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1753457192; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=w0q9t+IDDJyuRt/F6xIeOItMdu3pySdmJUNjggGVqF0=; b=FjO+UY5mNgVS5gXH91NBwdkQUUOl7dNOCf2mV9XsPSGl7MI7ivkMMfCZxNEjiDFx+yzoJe snmOmcXs9MVX//vUAppRN40bapVHGgy0BRbVsp14e1/ruvIrt3T3T0eJwh85ocfKMKfCMe DS/Re3Nw/bbOdcsD85DFxbHO+gfery5tlcfc2L/xGYa1vUnA9H66AgMOhBy4PZQo19XIaN s0ypalALnOVj8Sh51PwX3sdLjMYXYabSaVKkbSS868yhkwhNqeOZQjAZJa0YU7WUfBh33y GGSMAQ6myB8i5MFKeaZsKnYx9zhacfKwGaP1j/rW8d73393N/Kh4Qb42RF4rCQ== From: Herve Codina To: Hoan Tran , Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Saravana Kannan , Serge Semin , Herve Codina Cc: Phil Edworthy , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Miquel Raynal , Thomas Petazzoni Subject: [PATCH 6/6] ARM: dts: r9a06g032: Add support for GPIO interrupts Date: Fri, 25 Jul 2025 17:26:15 +0200 Message-ID: <20250725152618.32886-7-herve.codina@bootlin.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250725152618.32886-1-herve.codina@bootlin.com> References: <20250725152618.32886-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-GND-State: clean X-GND-Score: -100 X-GND-Cause: gggruggvucftvghtrhhoucdtuddrgeeffedrtdefgdekfeekkecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfitefpfffkpdcuggftfghnshhusghstghrihgsvgenuceurghilhhouhhtmecufedtudenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomhepjfgvrhhvvgcuvehoughinhgruceohhgvrhhvvgdrtghoughinhgrsegsohhothhlihhnrdgtohhmqeenucggtffrrghtthgvrhhnpeehffeigfejueelueeuffelueefgfelhfejhfehieegudekteeiledttdfhffekffenucfkphepledtrdekledrudeifedruddvjeenucevlhhushhtvghrufhiiigvpedvnecurfgrrhgrmhepihhnvghtpeeltddrkeelrdduieefrdduvdejpdhhvghloheplhhotggrlhhhohhsthdrlhhotggrlhguohhmrghinhdpmhgrihhlfhhrohhmpehhvghrvhgvrdgtohguihhnrgessghoohhtlhhinhdrtghomhdpnhgspghrtghpthhtohepudekpdhrtghpthhtohephhhorghnsehoshdrrghmphgvrhgvtghomhhpuhhtihhnghdrtghomhdprhgtphhtthhopehlihhnuhhsrdifrghllhgvihhjsehlihhnrghrohdrohhrghdprhgtphhtthhopegsrhhglhessghguggvvhdrphhlpdhrtghpthhtoheprhhosghhsehkvghrnhgvlhdrohhrghdprhgtphhtthhopehkrhiikhdoughtsehkvghrnhgvlhdrohhrghdprhgtphhtt hhopegtohhnohhrodgutheskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepghgvvghrthdorhgvnhgvshgrshesghhlihguvghrrdgsvgdprhgtphhtthhopehmrghgnhhushdruggrmhhmsehgmhgrihhlrdgtohhm X-GND-Sasl: herve.codina@bootlin.com Content-Type: text/plain; charset="utf-8" In the RZ/N1 SoC, the GPIO interrupts are multiplexed using the GPIO Interrupt Multiplexer. Add the multiplexer node and connect GPIO interrupt lines to the multiplexer. The interrupt-map available in the multiplexer node has to be updated in dts files depending on the GPIO usage. Indeed, the usage of an interrupt for a GPIO is board dependent. Up to 8 GPIOs can be used as an interrupt line (one per multiplexer output interrupt). Signed-off-by: Herve Codina --- arch/arm/boot/dts/renesas/r9a06g032.dtsi | 45 ++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/r= enesas/r9a06g032.dtsi index 7f71c01af409..0e2e0fe92cd3 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi @@ -535,6 +535,14 @@ gpio0a: gpio@0 { #gpio-cells =3D <2>; snps,nr-gpios =3D <32>; reg =3D <0>; + + interrupt-controller; + interrupt-parent =3D <&gpioirqmux>; + interrupts =3D < 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 >; + #interrupt-cells =3D <2>; }; =20 /* GPIO0b[0..1] connected to pins GPIO1..2 */ @@ -579,6 +587,14 @@ gpio1a: gpio@0 { #gpio-cells =3D <2>; snps,nr-gpios =3D <32>; reg =3D <0>; + + interrupt-controller; + interrupt-parent =3D <&gpioirqmux>; + interrupts =3D < 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 >; + #interrupt-cells =3D <2>; }; =20 /* GPIO1b[0..1] connected to pins GPIO55..56 */ @@ -613,6 +629,14 @@ gpio2a: gpio@0 { #gpio-cells =3D <2>; snps,nr-gpios =3D <32>; reg =3D <0>; + + interrupt-controller; + interrupt-parent =3D <&gpioirqmux>; + interrupts =3D < 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 >; + #interrupt-cells =3D <2>; }; =20 /* GPIO2b[0..9] connected to pins GPIO160..169 */ @@ -626,6 +650,27 @@ gpio2b: gpio@1 { }; }; =20 + gpioirqmux: interrupt-controller@51000480 { + compatible =3D "renesas,r9a06g032-gpioirqmux", "renesas,rzn1-gpioirqmux= "; + reg =3D <0x51000480 0x20>; + interrupts =3D , + , + , + , + , + , + , + ; + #interrupt-cells =3D <1>; + #address-cells =3D <0>; + interrupt-map-mask =3D <0x7f>; + + /* interrupt-map has to be updated according to GPIO usage */ + interrupt-map =3D <0 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + + status =3D "disabled"; + }; + can0: can@52104000 { compatible =3D "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000"; reg =3D <0x52104000 0x800>; --=20 2.50.1