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client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000FCC4.mail.protection.outlook.com (10.167.242.106) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8964.20 via Frontend Transport; Fri, 25 Jul 2025 11:07:01 +0000 Received: from BLRKPRNAYAK.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Jul 2025 06:06:56 -0500 From: K Prateek Nayak To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , CC: Naveen rao , Sairaj Kodilkar , "H. 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Shenoy" , Babu Moger , "Suravee Suthikulpanit" , K Prateek Nayak Subject: [PATCH v2 1/3] x86/cpu/topology: Use initial APICID from XTOPOEXT on AMD/HYGON Date: Fri, 25 Jul 2025 11:06:20 +0000 Message-ID: <20250725110622.59743-2-kprateek.nayak@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250725110622.59743-1-kprateek.nayak@amd.com> References: <20250725110622.59743-1-kprateek.nayak@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC4:EE_|DS2PR12MB9751:EE_ X-MS-Office365-Filtering-Correlation-Id: 55c0ed51-5635-480a-a98b-08ddcb6b617a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|7416014|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?x14ekPSZZe14Qp9ODWN2nS11kiZ519ml1I8CqpTnX8QWKiRhPG5bloVJ4Vhk?= =?us-ascii?Q?Z2+/0ysKBnVa/Cdb8r9f/WH6iXI5WEFYCS3O36UIzavPoOJYDqMYmK2aYohf?= =?us-ascii?Q?v6C/e1MqmrRJzFw6a429Z9egA/+PFwupjCH6XUaLIP1ttrkjiyk87KhiEVJ8?= =?us-ascii?Q?7nk5Buzfc0zW2VotOMdRnOtXd70iNzRh2P+gavMx2br8FMNryUB44E7gg50+?= =?us-ascii?Q?0Lw3SEIYZoTqlFPCi9gAOKQ0zGkyzEDzJkNzUxz3xBzQFMh6CiFycOx3ysj5?= =?us-ascii?Q?Z8LJjTNZay6oYqwibgoX617RAyO0Sp61VFvUyRBNp89KGU4jp+OC3wb3MCsr?= =?us-ascii?Q?Rpuk7lGBX8DFgkfd0l3IC00jBAxIa0fdqv3nPOMrhvLgWJiTV52BuKdPrRfl?= =?us-ascii?Q?SU/HEbjZwDVn4SoMFE+duQWnq4d05YfWUdAlRwS+TnXUml7hoOQyC0qxPyNx?= =?us-ascii?Q?d6yW+PLfHW+PktkBxViuIYis9l9p0vFbWYT/+ESDeZKO5obFSQJL6RDhdddU?= =?us-ascii?Q?FsVWby26prxxIDfytkKthomkOLGU/6t/thFQUENeG7mHCN9cx5f848ba6tYJ?= =?us-ascii?Q?/ID1rea6ms76wX6XcHquLpozvxFUSidsn4Dd1hm9jMPgC/Sl0NXnp47gX8c0?= =?us-ascii?Q?I0dNkviUU0Lkj2hZ/uQ9TamCsrYHIFbgkEDWWsXQosS/UWp/kc6mA+quIhXR?= =?us-ascii?Q?l2LrNiwjefCzQcApy4jZ1/vHcwvLUg3K+RusoNhJyy2/IfHYr9/5OzEgtfDG?= =?us-ascii?Q?ZxXQhfV1TdzRcrh5+2rz1+dvTetkoLviYaHqzI+bcaqVa4U0QjWhEuACy1pl?= =?us-ascii?Q?r4zaRrjmWhYl5Hx7QvGKfsXwNFtvvqyJOXMBmHzx6ZZsf2sFLcPTnGFRf1VT?= =?us-ascii?Q?BoBRZk8gbHJigyjRNZusn2MOaVPLsnzlsOZRXI9VjfhsGflzc8XZdcffoccp?= =?us-ascii?Q?+WXZWQ4EGQ72mKmXJk7UeeT8Io1ItK06W4ODT1JWZDQvyEf+rha7NYvwwerk?= =?us-ascii?Q?6Br7lkrbv1mWcunF5SLsNMuRSin6TOw801ZJ0X8rVPZJv4obuNRh8NW8iJtZ?= =?us-ascii?Q?PBYqIqsHR5YLhRk6LkEhxF5fBRZUpQxUG+VPxT9myL4vSe7xHrnoqapcJLhb?= =?us-ascii?Q?34A6/I8PChp67RMlO4/QrDKL4hTLXx8k4av5LA4u3qqsyRlvSm53nZm2CaUJ?= =?us-ascii?Q?kxrUQJmL5PmZWynyJTcXI8TPL4tnsyy+f4C+pCenEYK4cj8BNkabnjE3GU5W?= =?us-ascii?Q?afkd+1jrc7HFnD0/9XwBgvA9ilRwvK0dJWj3ZLRCePpUycmPN5NF2I1Eofm7?= =?us-ascii?Q?R7K/ICPBdL+ky0FLUwy9ZIuym7jZc5ENpUX8DuDq92oUCQWTNiPr9LyXIclM?= =?us-ascii?Q?mxWcEXpm+WzCLUOZvQZuQntSkOJv9IpSkw0xEY7ftyyOtMcm8bOJPJZK03Uo?= =?us-ascii?Q?pJFknh5oyIPITxgdsoBXqrBt5eTktQ7jJqT2KxQxCIAZXKjjCfH7fxOTMbmD?= =?us-ascii?Q?dVj4GRCtu+ZgrPQXeLcmmLHTYCuNcj0EN8Rt8T7waMJnpyOHUGWGdj2gqQ?= =?us-ascii?Q?=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(7416014)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jul 2025 11:07:01.2974 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 55c0ed51-5635-480a-a98b-08ddcb6b617a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS2PR12MB9751 Content-Type: text/plain; charset="utf-8" Prior to the topology parsing rewrite and the switchover to the new parsing logic for AMD processors in commit c749ce393b8f ("x86/cpu: Use common topology code for AMD"), the "initial_apicid" on these platforms was: - First initialized to the LocalApicId from CPUID leaf 0x1 EBX[31:24]. - Then overwritten by the ExtendedLocalApicId in CPUID leaf 0xb EDX[31:0] on processors that supported topoext. With the new parsing flow introduced in commit f7fb3b2dd92c ("x86/cpu: Provide an AMD/HYGON specific topology parser"), parse_8000_001e() now unconditionally overwrites the "initial_apicid" already parsed during cpu_parse_topology_ext(). Although this has not been a problem on baremetal platforms, on virtualized AMD guests that feature more than 255 cores, QEMU 0's out the CPUID leaf 0x8000001e on CPUs with "CoreID" > 255 to prevent collision of these IDs in EBX[7:0] which can only represent a maximum of 255 cores [1]. This results in the following FW_BUG being logged when booting a guest with more than 255 cores: [Firmware Bug]: CPU 512: APIC ID mismatch. CPUID: 0x0000 APIC: 0x0200 Rely on the APICID parsed during cpu_parse_topology_ext() from CPUID leaf 0x80000026 or 0xb and only use the APICID from leaf 0x8000001e if cpu_parse_topology_ext() failed (has_topoext is false). On platforms that support the 0xb leaf (Zen2 or later, AMD guests on QEMU) or the extended leaf 0x80000026 (Zen4 or later), the "initial_apicid" is now set to the value parsed from EDX[31:0]. On older AMD/Hygon platforms that does not support the 0xb leaf but supports the TOPOEXT extension (Fam 0x15, 0x16, 0x17[Zen1], and Hygon), the current behavior is retained where "initial_apicid" is set using the 0x8000001e leaf. Link: https://github.com/qemu/qemu/commit/35ac5dfbcaa4b [1] Debugged-by: Naveen N Rao (AMD) Debugged-by: Sairaj Kodilkar Fixes: c749ce393b8f ("x86/cpu: Use common topology code for AMD") Tested-by: Naveen N Rao (AMD) Signed-off-by: K Prateek Nayak --- Changelog v1..v2: o Collected tags from Naveen. (Thank you for testing!) o Moved this patch up ahead since it restores the original behavior before the topology rewrite. --- arch/x86/kernel/cpu/topology_amd.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/arch/x86/kernel/cpu/topology_amd.c b/arch/x86/kernel/cpu/topol= ogy_amd.c index 843b1655ab45..a0e3e177fc35 100644 --- a/arch/x86/kernel/cpu/topology_amd.c +++ b/arch/x86/kernel/cpu/topology_amd.c @@ -81,20 +81,28 @@ static bool parse_8000_001e(struct topo_scan *tscan, bo= ol has_topoext) =20 cpuid_leaf(0x8000001e, &leaf); =20 - tscan->c->topo.initial_apicid =3D leaf.ext_apic_id; - - /* - * If leaf 0xb is available, then the domain shifts are set - * already and nothing to do here. Only valid for family >=3D 0x17. - */ - if (!has_topoext && tscan->c->x86 >=3D 0x17) { + if (!has_topoext) { /* - * Leaf 0x80000008 set the CORE domain shift already. - * Update the SMT domain, but do not propagate it. + * Prefer initial_apicid parsed from XTOPOLOGY leaf + * 0x8000026 or 0xb if available. Otherwise prefer the + * one from leaf 0x8000001e over 0x1. */ - unsigned int nthreads =3D leaf.core_nthreads + 1; + tscan->c->topo.initial_apicid =3D leaf.ext_apic_id; =20 - topology_update_dom(tscan, TOPO_SMT_DOMAIN, get_count_order(nthreads), n= threads); + /* + * If XTOPOLOGY leaf is available, then the domain shifts are set + * already and nothing to do here. Only valid for family >=3D 0x17. + */ + if (tscan->c->x86 >=3D 0x17) { + /* + * Leaf 0x80000008 set the CORE domain shift already. + * Update the SMT domain, but do not propagate it. + */ + unsigned int nthreads =3D leaf.core_nthreads + 1; + + topology_update_dom(tscan, TOPO_SMT_DOMAIN, + get_count_order(nthreads), nthreads); + } } =20 store_node(tscan, leaf.nnodes_per_socket + 1, leaf.node_id); --=20 2.34.1