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([178.197.203.90]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b76fcb83c5sm4586171f8f.60.2025.07.25.03.02.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Jul 2025 03:02:46 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, linux-leds@vger.kernel.org, linux-mmc@vger.kernel.org, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Krzysztof Kozlowski , Ulf Hansson , Lee Jones , Thierry Reding , Geert Uytterhoeven Subject: [PATCH v2] dt-bindings: Correct indentation and style in DTS example Date: Fri, 25 Jul 2025 12:02:42 +0200 Message-ID: <20250725100241.120106-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.48.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=37180; i=krzysztof.kozlowski@linaro.org; h=from:subject; bh=UrxzcDP0J0GUK2aMRwvYPnrrXPp3f2UnJaUqP7Op3pE=; b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBog1ZBXe7wl7mkQsC9CTbzs2JbA+TUmKhLJs76p fLaIourZkWJAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCaINWQQAKCRDBN2bmhouD 12QSEACJp8AeQjO6KUO+dlpDhoSfykIrH1q5zpz+M7vLF8FI0LX3+GctY+gZjN8SYSoU//TLm1D YKHa7lfJwb+jsAY5cMSV2L3b9RSjw0+ET7b4Y3hZ+HSPzINhsmxR3n6Bl2hh96/56a6AocQ7Wib zUp2PCCRr3MNNnAG8QytYPcK0s9Bu2ht0G/t8asZEPJi3MzEvMaiGwucUV97PCnJ6N2O3LmXWrN fnuJCZX2+XyoZNZayGwRIwKlOcXNFybbq2FKHmOZBabNiCi1xo63QXM2gGweMxtjV4eVmvIFYez qsV7mPpg700wfZQm245/oJnep1lNy0N+FgdU+aVl2Mw9atAlsOZe1+PdZPDZndZ4e9Q2VPP5tok e2EDTsOSguLh/RDd9odoDsVdRvAM39M3IiMK5bnzbhWiugpL8jM+rEUOzFXH5m9f03pl+X5weA9 G/kDhGBYhLmpXbdAO8SbXggI7clWSoOpe5Btof+aq12+7xPvrpp3Rdb31Mvkj2o0WuPtwihvfk4 k34tcCaFug0EiOQ5A+k7RRmh51KGbw/rellBc92d4ji0HvMCW5LLWiwsDZCgk7f3qCH0ZH3sZpU Cu0Q2Dn49LFy3HvlOlMOqMweoyUQAFK8QdsxjJ0rZhdIUoFXQX13oCyEHGNnUylPrpez5soHqLj ecV8FORzwvLIE4w== X-Developer-Key: i=krzysztof.kozlowski@linaro.org; a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Acked-by: Ulf Hansson # For MMC Acked-by: Lee Jones Acked-by: Thierry Reding Reviewed-by: Geert Uytterhoeven # renesas Link: https://lore.kernel.org/r/20250107131456.247610-1-krzysztof.kozlowski= @linaro.org Signed-off-by: Krzysztof Kozlowski Acked-by: Alexandre Belloni --- Changes in v2: 1. Rebase on latest Rob's for-next tree, collect tags. 2. Patch also applies cleanly on next, so there are no cross tree conflicts expected. --- .../arm/arm,trace-buffer-extension.yaml | 10 +- .../bindings/arm/stm32/st,mlahb.yaml | 20 +- .../bindings/dsp/mediatek,mt8195-dsp.yaml | 42 ++-- ...ntel,ixp4xx-network-processing-engine.yaml | 52 ++--- .../bindings/fpga/xlnx,versal-fpga.yaml | 2 +- .../bindings/iommu/riscv,iommu.yaml | 6 +- .../devicetree/bindings/leds/leds-mt6360.yaml | 195 +++++++++--------- .../devicetree/bindings/mips/brcm/soc.yaml | 42 ++-- .../misc/intel,ixp4xx-ahb-queue-manager.yaml | 6 +- .../devicetree/bindings/mmc/renesas,sdhi.yaml | 78 +++---- .../bindings/mtd/technologic,nand.yaml | 2 +- .../bindings/nvmem/amlogic,meson6-efuse.yaml | 2 +- .../bindings/pci/ti,j721e-pci-ep.yaml | 34 +-- .../bindings/power/reset/qcom,pon.yaml | 62 +++--- .../nvidia,tegra264-bpmp-shmem.yaml | 15 +- .../bindings/rtc/renesas,rzn1-rtc.yaml | 22 +- .../amlogic/amlogic,meson-gx-hhi-sysctrl.yaml | 26 +-- .../bindings/soc/qcom/qcom,eud.yaml | 38 ++-- .../bindings/soc/ti/wkup-m3-ipc.yaml | 32 +-- 19 files changed, 343 insertions(+), 343 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/arm,trace-buffer-extensi= on.yaml b/Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.= yaml index 87128e7b7d28..f5b54b4fc55d 100644 --- a/Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml +++ b/Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml @@ -41,10 +41,10 @@ additionalProperties: false examples: =20 - | - #include + #include =20 - trbe { - compatible =3D "arm,trace-buffer-extension"; - interrupts =3D ; - }; + trbe { + compatible =3D "arm,trace-buffer-extension"; + interrupts =3D ; + }; ... diff --git a/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml b/Do= cumentation/devicetree/bindings/arm/stm32/st,mlahb.yaml index 3e996346b264..4970b9167d1c 100644 --- a/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml @@ -55,17 +55,17 @@ unevaluatedProperties: false examples: - | ahb { - compatible =3D "st,mlahb", "simple-bus"; - #address-cells =3D <1>; - #size-cells =3D <1>; - ranges; - dma-ranges =3D <0x00000000 0x38000000 0x10000>, - <0x10000000 0x10000000 0x60000>, - <0x30000000 0x30000000 0x60000>; + compatible =3D "st,mlahb", "simple-bus"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + dma-ranges =3D <0x00000000 0x38000000 0x10000>, + <0x10000000 0x10000000 0x60000>, + <0x30000000 0x30000000 0x60000>; =20 - m4_rproc: m4@10000000 { - reg =3D <0x10000000 0x40000>; - }; + m4_rproc: m4@10000000 { + reg =3D <0x10000000 0x40000>; + }; }; =20 ... diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml= b/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml index ca8d8661f872..abc52978be7a 100644 --- a/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml +++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml @@ -81,25 +81,25 @@ examples: #include #include dsp@10803000 { - compatible =3D "mediatek,mt8195-dsp"; - reg =3D <0x10803000 0x1000>, - <0x10840000 0x40000>; - reg-names =3D "cfg", "sram"; - clocks =3D <&topckgen 10>, //CLK_TOP_ADSP - <&clk26m>, - <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS - <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2 - <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP - <&topckgen 34>; //CLK_TOP_AUDIO_H - clock-names =3D "adsp_sel", - "clk26m_ck", - "audio_local_bus", - "mainpll_d7_d2", - "scp_adsp_audiodsp", - "audio_h"; - memory-region =3D <&adsp_dma_mem_reserved>, - <&adsp_mem_reserved>; - power-domains =3D <&spm 6>; //MT8195_POWER_DOMAIN_ADSP - mbox-names =3D "rx", "tx"; - mboxes =3D <&adsp_mailbox0>, <&adsp_mailbox1>; + compatible =3D "mediatek,mt8195-dsp"; + reg =3D <0x10803000 0x1000>, + <0x10840000 0x40000>; + reg-names =3D "cfg", "sram"; + clocks =3D <&topckgen 10>, //CLK_TOP_ADSP + <&clk26m>, + <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS + <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2 + <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP + <&topckgen 34>; //CLK_TOP_AUDIO_H + clock-names =3D "adsp_sel", + "clk26m_ck", + "audio_local_bus", + "mainpll_d7_d2", + "scp_adsp_audiodsp", + "audio_h"; + memory-region =3D <&adsp_dma_mem_reserved>, + <&adsp_mem_reserved>; + power-domains =3D <&spm 6>; //MT8195_POWER_DOMAIN_ADSP + mbox-names =3D "rx", "tx"; + mboxes =3D <&adsp_mailbox0>, <&adsp_mailbox1>; }; diff --git a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-networ= k-processing-engine.yaml b/Documentation/devicetree/bindings/firmware/intel= ,ixp4xx-network-processing-engine.yaml index e6bed7d93e2d..50f1f08744a1 100644 --- a/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-proce= ssing-engine.yaml +++ b/Documentation/devicetree/bindings/firmware/intel,ixp4xx-network-proce= ssing-engine.yaml @@ -62,33 +62,33 @@ examples: #include =20 npe: npe@c8006000 { - compatible =3D "intel,ixp4xx-network-processing-engine"; - reg =3D <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1= 000>; - #address-cells =3D <1>; - #size-cells =3D <0>; + compatible =3D "intel,ixp4xx-network-processing-engine"; + reg =3D <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x10= 00>; + #address-cells =3D <1>; + #size-cells =3D <0>; =20 - hss@0 { - compatible =3D "intel,ixp4xx-hss"; - reg =3D <0>; - intel,npe-handle =3D <&npe 0>; - intel,queue-chl-rxtrig =3D <&qmgr 12>; - intel,queue-chl-txready =3D <&qmgr 34>; - intel,queue-pkt-rx =3D <&qmgr 13>; - intel,queue-pkt-tx =3D <&qmgr 14>, <&qmgr 15>, <&qmgr 16>, <&= qmgr 17>; - intel,queue-pkt-rxfree =3D <&qmgr 18>, <&qmgr 19>, <&qmgr 20>= , <&qmgr 21>; - intel,queue-pkt-txdone =3D <&qmgr 22>; - cts-gpios =3D <&gpio0 10 GPIO_ACTIVE_LOW>; - rts-gpios =3D <&gpio0 14 GPIO_ACTIVE_LOW>; - dcd-gpios =3D <&gpio0 6 GPIO_ACTIVE_LOW>; - dtr-gpios =3D <&gpio_74 2 GPIO_ACTIVE_LOW>; - clk-internal-gpios =3D <&gpio_74 0 GPIO_ACTIVE_HIGH>; - }; + hss@0 { + compatible =3D "intel,ixp4xx-hss"; + reg =3D <0>; + intel,npe-handle =3D <&npe 0>; + intel,queue-chl-rxtrig =3D <&qmgr 12>; + intel,queue-chl-txready =3D <&qmgr 34>; + intel,queue-pkt-rx =3D <&qmgr 13>; + intel,queue-pkt-tx =3D <&qmgr 14>, <&qmgr 15>, <&qmgr 16>, <&q= mgr 17>; + intel,queue-pkt-rxfree =3D <&qmgr 18>, <&qmgr 19>, <&qmgr 20>,= <&qmgr 21>; + intel,queue-pkt-txdone =3D <&qmgr 22>; + cts-gpios =3D <&gpio0 10 GPIO_ACTIVE_LOW>; + rts-gpios =3D <&gpio0 14 GPIO_ACTIVE_LOW>; + dcd-gpios =3D <&gpio0 6 GPIO_ACTIVE_LOW>; + dtr-gpios =3D <&gpio_74 2 GPIO_ACTIVE_LOW>; + clk-internal-gpios =3D <&gpio_74 0 GPIO_ACTIVE_HIGH>; + }; =20 - crypto { - compatible =3D "intel,ixp4xx-crypto"; - intel,npe-handle =3D <&npe 2>; - queue-rx =3D <&qmgr 30>; - queue-txready =3D <&qmgr 29>; - }; + crypto { + compatible =3D "intel,ixp4xx-crypto"; + intel,npe-handle =3D <&npe 2>; + queue-rx =3D <&qmgr 30>; + queue-txready =3D <&qmgr 29>; + }; }; ... diff --git a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml b= /Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml index 80833462f620..41b368d54557 100644 --- a/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml +++ b/Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml @@ -27,7 +27,7 @@ additionalProperties: false examples: - | versal_fpga: versal-fpga { - compatible =3D "xlnx,versal-fpga"; + compatible =3D "xlnx,versal-fpga"; }; =20 ... diff --git a/Documentation/devicetree/bindings/iommu/riscv,iommu.yaml b/Doc= umentation/devicetree/bindings/iommu/riscv,iommu.yaml index 5d015eeb06d0..d4838c3b3741 100644 --- a/Documentation/devicetree/bindings/iommu/riscv,iommu.yaml +++ b/Documentation/devicetree/bindings/iommu/riscv,iommu.yaml @@ -139,9 +139,9 @@ examples: =20 /* The IOMMU programming interface uses slot 00:01.0 */ iommu0: iommu@1,0 { - compatible =3D "pci1efd,edf1", "riscv,pci-iommu"; - reg =3D <0x800 0 0 0 0>; - #iommu-cells =3D <1>; + compatible =3D "pci1efd,edf1", "riscv,pci-iommu"; + reg =3D <0x800 0 0 0 0>; + #iommu-cells =3D <1>; }; }; }; diff --git a/Documentation/devicetree/bindings/leds/leds-mt6360.yaml b/Docu= mentation/devicetree/bindings/leds/leds-mt6360.yaml index d84e28e616d7..d2e1d8afc302 100644 --- a/Documentation/devicetree/bindings/leds/leds-mt6360.yaml +++ b/Documentation/devicetree/bindings/leds/leds-mt6360.yaml @@ -87,106 +87,105 @@ additionalProperties: false =20 examples: - | - #include - led-controller { - compatible =3D "mediatek,mt6360-led"; - #address-cells =3D <1>; - #size-cells =3D <0>; + #include + led-controller { + compatible =3D "mediatek,mt6360-led"; + #address-cells =3D <1>; + #size-cells =3D <0>; =20 - multi-led@0 { - reg =3D <0>; - function =3D LED_FUNCTION_INDICATOR; - color =3D ; - led-max-microamp =3D <24000>; - #address-cells =3D <1>; - #size-cells =3D <0>; - led@0 { - reg =3D <0>; - color =3D ; - }; - led@1 { - reg =3D <1>; - color =3D ; - }; - led@2 { - reg =3D <2>; - color =3D ; - }; - }; - led@3 { - reg =3D <3>; - function =3D LED_FUNCTION_INDICATOR; - color =3D ; - led-max-microamp =3D <150000>; - }; - led@4 { - reg =3D <4>; - function =3D LED_FUNCTION_FLASH; - color =3D ; - function-enumerator =3D <1>; - led-max-microamp =3D <200000>; - flash-max-microamp =3D <500000>; - flash-max-timeout-us =3D <1024000>; - }; - led@5 { - reg =3D <5>; - function =3D LED_FUNCTION_FLASH; - color =3D ; - function-enumerator =3D <2>; - led-max-microamp =3D <200000>; - flash-max-microamp =3D <500000>; - flash-max-timeout-us =3D <1024000>; - }; - }; + multi-led@0 { + reg =3D <0>; + function =3D LED_FUNCTION_INDICATOR; + color =3D ; + led-max-microamp =3D <24000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + led@0 { + reg =3D <0>; + color =3D ; + }; + led@1 { + reg =3D <1>; + color =3D ; + }; + led@2 { + reg =3D <2>; + color =3D ; + }; + }; + led@3 { + reg =3D <3>; + function =3D LED_FUNCTION_INDICATOR; + color =3D ; + led-max-microamp =3D <150000>; + }; + led@4 { + reg =3D <4>; + function =3D LED_FUNCTION_FLASH; + color =3D ; + function-enumerator =3D <1>; + led-max-microamp =3D <200000>; + flash-max-microamp =3D <500000>; + flash-max-timeout-us =3D <1024000>; + }; + led@5 { + reg =3D <5>; + function =3D LED_FUNCTION_FLASH; + color =3D ; + function-enumerator =3D <2>; + led-max-microamp =3D <200000>; + flash-max-microamp =3D <500000>; + flash-max-timeout-us =3D <1024000>; + }; + }; =20 - | + led-controller { + compatible =3D "mediatek,mt6360-led"; + #address-cells =3D <1>; + #size-cells =3D <0>; =20 - led-controller { - compatible =3D "mediatek,mt6360-led"; - #address-cells =3D <1>; - #size-cells =3D <0>; - - led@0 { - reg =3D <0>; - function =3D LED_FUNCTION_INDICATOR; - color =3D ; - led-max-microamp =3D <24000>; - }; - led@1 { - reg =3D <1>; - function =3D LED_FUNCTION_INDICATOR; - color =3D ; - led-max-microamp =3D <24000>; - }; - led@2 { - reg =3D <2>; - function =3D LED_FUNCTION_INDICATOR; - color =3D ; - led-max-microamp =3D <24000>; - }; - led@3 { - reg =3D <3>; - function =3D LED_FUNCTION_INDICATOR; - color =3D ; - led-max-microamp =3D <150000>; - }; - led@4 { - reg =3D <4>; - function =3D LED_FUNCTION_FLASH; - color =3D ; - function-enumerator =3D <1>; - led-max-microamp =3D <200000>; - flash-max-microamp =3D <500000>; - flash-max-timeout-us =3D <1024000>; - }; - led@5 { - reg =3D <5>; - function =3D LED_FUNCTION_FLASH; - color =3D ; - function-enumerator =3D <2>; - led-max-microamp =3D <200000>; - flash-max-microamp =3D <500000>; - flash-max-timeout-us =3D <1024000>; - }; - }; + led@0 { + reg =3D <0>; + function =3D LED_FUNCTION_INDICATOR; + color =3D ; + led-max-microamp =3D <24000>; + }; + led@1 { + reg =3D <1>; + function =3D LED_FUNCTION_INDICATOR; + color =3D ; + led-max-microamp =3D <24000>; + }; + led@2 { + reg =3D <2>; + function =3D LED_FUNCTION_INDICATOR; + color =3D ; + led-max-microamp =3D <24000>; + }; + led@3 { + reg =3D <3>; + function =3D LED_FUNCTION_INDICATOR; + color =3D ; + led-max-microamp =3D <150000>; + }; + led@4 { + reg =3D <4>; + function =3D LED_FUNCTION_FLASH; + color =3D ; + function-enumerator =3D <1>; + led-max-microamp =3D <200000>; + flash-max-microamp =3D <500000>; + flash-max-timeout-us =3D <1024000>; + }; + led@5 { + reg =3D <5>; + function =3D LED_FUNCTION_FLASH; + color =3D ; + function-enumerator =3D <2>; + led-max-microamp =3D <200000>; + flash-max-microamp =3D <500000>; + flash-max-timeout-us =3D <1024000>; + }; + }; ... diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documen= tation/devicetree/bindings/mips/brcm/soc.yaml index 0cc634482a6a..461a8c063313 100644 --- a/Documentation/devicetree/bindings/mips/brcm/soc.yaml +++ b/Documentation/devicetree/bindings/mips/brcm/soc.yaml @@ -92,29 +92,29 @@ additionalProperties: true =20 examples: - | - / { - compatible =3D "brcm,bcm3368"; - #address-cells =3D <1>; - #size-cells =3D <1>; - model =3D "Broadcom 3368"; + / { + compatible =3D "brcm,bcm3368"; + #address-cells =3D <1>; + #size-cells =3D <1>; + model =3D "Broadcom 3368"; =20 - cpus { - #address-cells =3D <1>; - #size-cells =3D <0>; + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; =20 - mips-hpt-frequency =3D <150000000>; + mips-hpt-frequency =3D <150000000>; =20 - cpu@0 { - compatible =3D "brcm,bmips4350"; - device_type =3D "cpu"; - reg =3D <0>; - }; + cpu@0 { + compatible =3D "brcm,bmips4350"; + device_type =3D "cpu"; + reg =3D <0>; + }; =20 - cpu@1 { - compatible =3D "brcm,bmips4350"; - device_type =3D "cpu"; - reg =3D <1>; - }; - }; - }; + cpu@1 { + compatible =3D "brcm,bmips4350"; + device_type =3D "cpu"; + reg =3D <1>; + }; + }; + }; ... diff --git a/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-= manager.yaml b/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queu= e-manager.yaml index 36a9dbdf3f03..aab89946b04f 100644 --- a/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager= .yaml +++ b/Documentation/devicetree/bindings/misc/intel,ixp4xx-ahb-queue-manager= .yaml @@ -45,7 +45,7 @@ examples: #include =20 qmgr: queue-manager@60000000 { - compatible =3D "intel,ixp4xx-ahb-queue-manager"; - reg =3D <0x60000000 0x4000>; - interrupts =3D <3 IRQ_TYPE_LEVEL_HIGH>, <4 IRQ_TYPE_LEVEL_HIGH>; + compatible =3D "intel,ixp4xx-ahb-queue-manager"; + reg =3D <0x60000000 0x4000>; + interrupts =3D <3 IRQ_TYPE_LEVEL_HIGH>, <4 IRQ_TYPE_LEVEL_HIGH>; }; diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Docu= mentation/devicetree/bindings/mmc/renesas,sdhi.yaml index ba15ccbda61a..c754ea71f51f 100644 --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml @@ -266,49 +266,49 @@ examples: #include =20 sdhi0: mmc@ee100000 { - compatible =3D "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi= "; - reg =3D <0xee100000 0x328>; - interrupts =3D ; - clocks =3D <&cpg CPG_MOD 314>; - dmas =3D <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 = 0xce>; - dma-names =3D "tx", "rx", "tx", "rx"; - max-frequency =3D <195000000>; - power-domains =3D <&sysc R8A7790_PD_ALWAYS_ON>; - resets =3D <&cpg 314>; + compatible =3D "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; + reg =3D <0xee100000 0x328>; + interrupts =3D ; + clocks =3D <&cpg CPG_MOD 314>; + dmas =3D <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce= >; + dma-names =3D "tx", "rx", "tx", "rx"; + max-frequency =3D <195000000>; + power-domains =3D <&sysc R8A7790_PD_ALWAYS_ON>; + resets =3D <&cpg 314>; }; =20 sdhi1: mmc@ee120000 { - compatible =3D "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdh= i"; - reg =3D <0xee120000 0x328>; - interrupts =3D ; - clocks =3D <&cpg CPG_MOD 313>; - dmas =3D <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1= 0xca>; - dma-names =3D "tx", "rx", "tx", "rx"; - max-frequency =3D <195000000>; - power-domains =3D <&sysc R8A7790_PD_ALWAYS_ON>; - resets =3D <&cpg 313>; + compatible =3D "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; + reg =3D <0xee120000 0x328>; + interrupts =3D ; + clocks =3D <&cpg CPG_MOD 313>; + dmas =3D <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca= >; + dma-names =3D "tx", "rx", "tx", "rx"; + max-frequency =3D <195000000>; + power-domains =3D <&sysc R8A7790_PD_ALWAYS_ON>; + resets =3D <&cpg 313>; }; =20 sdhi2: mmc@ee140000 { - compatible =3D "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdh= i"; - reg =3D <0xee140000 0x100>; - interrupts =3D ; - clocks =3D <&cpg CPG_MOD 312>; - dmas =3D <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1= 0xc2>; - dma-names =3D "tx", "rx", "tx", "rx"; - max-frequency =3D <97500000>; - power-domains =3D <&sysc R8A7790_PD_ALWAYS_ON>; - resets =3D <&cpg 312>; - }; - - sdhi3: mmc@ee160000 { - compatible =3D "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sd= hi"; - reg =3D <0xee160000 0x100>; - interrupts =3D ; - clocks =3D <&cpg CPG_MOD 311>; - dmas =3D <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac= 1 0xd4>; - dma-names =3D "tx", "rx", "tx", "rx"; - max-frequency =3D <97500000>; - power-domains =3D <&sysc R8A7790_PD_ALWAYS_ON>; - resets =3D <&cpg 311>; + compatible =3D "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; + reg =3D <0xee140000 0x100>; + interrupts =3D ; + clocks =3D <&cpg CPG_MOD 312>; + dmas =3D <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2= >; + dma-names =3D "tx", "rx", "tx", "rx"; + max-frequency =3D <97500000>; + power-domains =3D <&sysc R8A7790_PD_ALWAYS_ON>; + resets =3D <&cpg 312>; + }; + + sdhi3: mmc@ee160000 { + compatible =3D "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; + reg =3D <0xee160000 0x100>; + interrupts =3D ; + clocks =3D <&cpg CPG_MOD 311>; + dmas =3D <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4= >; + dma-names =3D "tx", "rx", "tx", "rx"; + max-frequency =3D <97500000>; + power-domains =3D <&sysc R8A7790_PD_ALWAYS_ON>; + resets =3D <&cpg 311>; }; diff --git a/Documentation/devicetree/bindings/mtd/technologic,nand.yaml b/= Documentation/devicetree/bindings/mtd/technologic,nand.yaml index f9d87c46094b..a3c316436317 100644 --- a/Documentation/devicetree/bindings/mtd/technologic,nand.yaml +++ b/Documentation/devicetree/bindings/mtd/technologic,nand.yaml @@ -40,6 +40,6 @@ examples: #address-cells =3D <1>; #size-cells =3D <0>; nand@0 { - reg =3D <0>; + reg =3D <0>; }; }; diff --git a/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.y= aml b/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml index b5cf740f96fa..9879d521842e 100644 --- a/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml @@ -53,6 +53,6 @@ examples: }; =20 temperature_calib: calib@1f4 { - reg =3D <0x1f4 0x4>; + reg =3D <0x1f4 0x4>; }; }; diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/D= ocumentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index 97f2579ea908..29580cbd1767 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -123,21 +123,21 @@ examples: #size-cells =3D <2>; =20 pcie0_ep: pcie-ep@d000000 { - compatible =3D "ti,j721e-pcie-ep"; - reg =3D <0x00 0x02900000 0x00 0x1000>, - <0x00 0x02907000 0x00 0x400>, - <0x00 0x0d000000 0x00 0x00800000>, - <0x00 0x10000000 0x00 0x08000000>; - reg-names =3D "intd_cfg", "user_cfg", "reg", "mem"; - ti,syscon-pcie-ctrl =3D <&pcie0_ctrl 0x4070>; - max-link-speed =3D <3>; - num-lanes =3D <2>; - power-domains =3D <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; - clocks =3D <&k3_clks 239 1>; - clock-names =3D "fck"; - max-functions =3D /bits/ 8 <6>; - dma-coherent; - phys =3D <&serdes0_pcie_link>; - phy-names =3D "pcie-phy"; - }; + compatible =3D "ti,j721e-pcie-ep"; + reg =3D <0x00 0x02900000 0x00 0x1000>, + <0x00 0x02907000 0x00 0x400>, + <0x00 0x0d000000 0x00 0x00800000>, + <0x00 0x10000000 0x00 0x08000000>; + reg-names =3D "intd_cfg", "user_cfg", "reg", "mem"; + ti,syscon-pcie-ctrl =3D <&pcie0_ctrl 0x4070>; + max-link-speed =3D <3>; + num-lanes =3D <2>; + power-domains =3D <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 239 1>; + clock-names =3D "fck"; + max-functions =3D /bits/ 8 <6>; + dma-coherent; + phys =3D <&serdes0_pcie_link>; + phy-names =3D "pcie-phy"; + }; }; diff --git a/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml b/= Documentation/devicetree/bindings/power/reset/qcom,pon.yaml index 3da3d02a6690..979a377cb4ff 100644 --- a/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml +++ b/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml @@ -115,40 +115,40 @@ allOf: =20 examples: - | - #include - #include - #include + #include + #include + #include =20 - spmi@c440000 { - reg =3D <0x0c440000 0x1100>; - #address-cells =3D <2>; - #size-cells =3D <0>; + spmi@c440000 { + reg =3D <0x0c440000 0x1100>; + #address-cells =3D <2>; + #size-cells =3D <0>; =20 - pmic@0 { - reg =3D <0x0 SPMI_USID>; - #address-cells =3D <1>; - #size-cells =3D <0>; + pmic@0 { + reg =3D <0x0 SPMI_USID>; + #address-cells =3D <1>; + #size-cells =3D <0>; =20 - pon@800 { - compatible =3D "qcom,pm8998-pon"; - reg =3D <0x800>; + pon@800 { + compatible =3D "qcom,pm8998-pon"; + reg =3D <0x800>; =20 - pwrkey { - compatible =3D "qcom,pm8941-pwrkey"; - interrupts =3D <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; - debounce =3D <15625>; - bias-pull-up; - linux,code =3D ; - }; + pwrkey { + compatible =3D "qcom,pm8941-pwrkey"; + interrupts =3D <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; + debounce =3D <15625>; + bias-pull-up; + linux,code =3D ; + }; =20 - resin { - compatible =3D "qcom,pm8941-resin"; - interrupts =3D <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; - debounce =3D <15625>; - bias-pull-up; - linux,code =3D ; - }; - }; - }; - }; + resin { + compatible =3D "qcom,pm8941-resin"; + interrupts =3D <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; + debounce =3D <15625>; + bias-pull-up; + linux,code =3D ; + }; + }; + }; + }; ... diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra= 264-bpmp-shmem.yaml b/Documentation/devicetree/bindings/reserved-memory/nvi= dia,tegra264-bpmp-shmem.yaml index f9b2f0fdc282..4380f622f9a9 100644 --- a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpm= p-shmem.yaml +++ b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra264-bpm= p-shmem.yaml @@ -36,12 +36,13 @@ required: examples: - | reserved-memory { - #address-cells =3D <2>; - #size-cells =3D <2>; - dram_cpu_bpmp_mail: shmem@f1be0000 { - compatible =3D "nvidia,tegra264-bpmp-shmem"; - reg =3D <0x0 0xf1be0000 0x0 0x2000>; - no-map; - }; + #address-cells =3D <2>; + #size-cells =3D <2>; + + shmem@f1be0000 { + compatible =3D "nvidia,tegra264-bpmp-shmem"; + reg =3D <0x0 0xf1be0000 0x0 0x2000>; + no-map; + }; }; ... diff --git a/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml b/= Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml index f6fdcc7090b6..1860f0e4c31a 100644 --- a/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml @@ -61,14 +61,14 @@ examples: #include #include rtc@40006000 { - compatible =3D "renesas,r9a06g032-rtc", "renesas,rzn1-rtc"; - reg =3D <0x40006000 0x1000>; - interrupts =3D , - , - ; - interrupt-names =3D "alarm", "timer", "pps"; - clocks =3D <&sysctrl R9A06G032_HCLK_RTC>; - clock-names =3D "hclk"; - power-domains =3D <&sysctrl>; - start-year =3D <2000>; - }; + compatible =3D "renesas,r9a06g032-rtc", "renesas,rzn1-rtc"; + reg =3D <0x40006000 0x1000>; + interrupts =3D , + , + ; + interrupt-names =3D "alarm", "timer", "pps"; + clocks =3D <&sysctrl R9A06G032_HCLK_RTC>; + clock-names =3D "hclk"; + power-domains =3D <&sysctrl>; + start-year =3D <2000>; + }; diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx= -hhi-sysctrl.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,m= eson-gx-hhi-sysctrl.yaml index 3dc66f1de023..f3a85c67ce8a 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sy= sctrl.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sy= sctrl.yaml @@ -186,22 +186,22 @@ examples: }; =20 power-controller { - compatible =3D "amlogic,meson-axg-pwrc"; - #power-domain-cells =3D <1>; - amlogic,ao-sysctrl =3D <&sysctrl_AO>; + compatible =3D "amlogic,meson-axg-pwrc"; + #power-domain-cells =3D <1>; + amlogic,ao-sysctrl =3D <&sysctrl_AO>; =20 - resets =3D <&reset_viu>, - <&reset_venc>, - <&reset_vcbus>, - <&reset_vencl>, - <&reset_vid_lock>; - reset-names =3D "viu", "venc", "vcbus", "vencl", "vid_lock"; - clocks =3D <&clk_vpu>, <&clk_vapb>; - clock-names =3D "vpu", "vapb"; + resets =3D <&reset_viu>, + <&reset_venc>, + <&reset_vcbus>, + <&reset_vencl>, + <&reset_vid_lock>; + reset-names =3D "viu", "venc", "vcbus", "vencl", "vid_lock"; + clocks =3D <&clk_vpu>, <&clk_vapb>; + clock-names =3D "vpu", "vapb"; }; =20 phy { - compatible =3D "amlogic,axg-mipi-pcie-analog-phy"; - #phy-cells =3D <0>; + compatible =3D "amlogic,axg-mipi-pcie-analog-phy"; + #phy-cells =3D <0>; }; }; diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Doc= umentation/devicetree/bindings/soc/qcom/qcom,eud.yaml index f2c5ec7e6437..84218636c0d8 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -55,25 +55,25 @@ additionalProperties: false examples: - | eud@88e0000 { - compatible =3D "qcom,sc7280-eud", "qcom,eud"; - reg =3D <0x88e0000 0x2000>, - <0x88e2000 0x1000>; + compatible =3D "qcom,sc7280-eud", "qcom,eud"; + reg =3D <0x88e0000 0x2000>, + <0x88e2000 0x1000>; =20 - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - port@0 { - reg =3D <0>; - eud_ep: endpoint { - remote-endpoint =3D <&usb2_role_switch>; - }; - }; + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + port@0 { + reg =3D <0>; + eud_ep: endpoint { + remote-endpoint =3D <&usb2_role_switch>; + }; + }; =20 - port@1 { - reg =3D <1>; - eud_con: endpoint { - remote-endpoint =3D <&con_eud>; - }; - }; - }; + port@1 { + reg =3D <1>; + eud_con: endpoint { + remote-endpoint =3D <&con_eud>; + }; + }; + }; }; diff --git a/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml b/Do= cumentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml index 0df41c4f60c1..56b16183c885 100644 --- a/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml +++ b/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml @@ -121,13 +121,13 @@ examples: }; =20 wkup_m3_ipc@1324 { - compatible =3D "ti,am3352-wkup-m3-ipc"; - reg =3D <0x1324 0x24>; - interrupts =3D <78>; - ti,rproc =3D <&wkup_m3>; - mboxes =3D <&am335x_mailbox &mbox_wkupm3>; - ti,vtt-gpio-pin =3D <7>; - firmware-name =3D "am335x-evm-scale-data.bin"; + compatible =3D "ti,am3352-wkup-m3-ipc"; + reg =3D <0x1324 0x24>; + interrupts =3D <78>; + ti,rproc =3D <&wkup_m3>; + mboxes =3D <&am335x_mailbox &mbox_wkupm3>; + ti,vtt-gpio-pin =3D <7>; + firmware-name =3D "am335x-evm-scale-data.bin"; }; }; =20 @@ -155,20 +155,20 @@ examples: pinctrl-0 =3D <&ddr3_vtt_toggle_default>; =20 ddr3_vtt_toggle_default: ddr_vtt_toggle_default { - pinctrl-single,pins =3D < + pinctrl-single,pins =3D < 0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_F= ORCE_OFF_MODE | MUX_MODE7) - >; + >; }; }; =20 wkup_m3_ipc@1324 { - compatible =3D "ti,am4372-wkup-m3-ipc"; - reg =3D <0x1324 0x24>; - interrupts =3D <78>; - ti,rproc =3D <&wkup_m3>; - mboxes =3D <&am437x_mailbox &mbox_wkupm3>; - ti,set-io-isolation; - firmware-name =3D "am43x-evm-scale-data.bin"; + compatible =3D "ti,am4372-wkup-m3-ipc"; + reg =3D <0x1324 0x24>; + interrupts =3D <78>; + ti,rproc =3D <&wkup_m3>; + mboxes =3D <&am437x_mailbox &mbox_wkupm3>; + ti,set-io-isolation; + firmware-name =3D "am43x-evm-scale-data.bin"; }; }; =20 --=20 2.48.1