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Otherwise, if the transfer is NACKed due to IBIWON and retries continue, data may be prefilled again but could be lost because the FIFO is not empty. Fixes: 4008a74e0f9b ("i3c: master: svc: Fix npcm845 FIFO empty issue") Signed-off-by: Stanley Chu --- drivers/i3c/master/svc-i3c-master.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i= 3c-master.c index 7e1a7cb94b43..34b6e125b18a 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -104,6 +104,7 @@ #define SVC_I3C_MDATACTRL_TXTRIG_FIFO_NOT_FULL GENMASK(5, 4) #define SVC_I3C_MDATACTRL_RXTRIG_FIFO_NOT_EMPTY 0 #define SVC_I3C_MDATACTRL_RXCOUNT(x) FIELD_GET(GENMASK(28, 24), (x)) +#define SVC_I3C_MDATACTRL_TXCOUNT(x) FIELD_GET(GENMASK(20, 16), (x)) #define SVC_I3C_MDATACTRL_TXFULL BIT(30) #define SVC_I3C_MDATACTRL_RXEMPTY BIT(31) =20 @@ -280,6 +281,13 @@ static inline bool is_events_enabled(struct svc_i3c_ma= ster *master, u32 mask) return !!(master->enabled_events & mask); } =20 +static inline bool svc_i3c_master_tx_empty(struct svc_i3c_master *master) +{ + u32 reg =3D readl(master->regs + SVC_I3C_MDATACTRL); + + return (SVC_I3C_MDATACTRL_TXCOUNT(reg) =3D=3D 0); +} + static bool svc_i3c_master_error(struct svc_i3c_master *master) { u32 mstatus, merrwarn; @@ -1303,7 +1311,8 @@ static int svc_i3c_master_xfer(struct svc_i3c_master = *master, * The only way to work around this hardware issue is to let the * FIFO start filling as soon as possible after EmitStartAddr. */ - if (svc_has_quirk(master, SVC_I3C_QUIRK_FIFO_EMPTY) && !rnw && xfer_len)= { + if (svc_has_quirk(master, SVC_I3C_QUIRK_FIFO_EMPTY) && !rnw && xfer_len = && + svc_i3c_master_tx_empty(master)) { u32 end =3D xfer_len > SVC_I3C_FIFO_SIZE ? 0 : SVC_I3C_MWDATAB_END; u32 len =3D min_t(u32, xfer_len, SVC_I3C_FIFO_SIZE); =20 --=20 2.34.1