From nobody Mon Oct 6 03:13:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 079A72D46AF; Fri, 25 Jul 2025 10:04:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753437858; cv=none; b=kT8Tw3Vn3KV6P5XY/e+xxeZo4ThhCiobLHZam9N4kXPKRR6znjZTNUsEbzkHMooTNP3w4k8NOF84mW4rndaoteqbMLO5JdkhXsmKfno43VPDDn+6D2fbVM1k0mz6aXO5LCnrgdVt/GVrdzBBoVRnJT0BufGkdgfk1LL3QJYoh1o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753437858; c=relaxed/simple; bh=l60S4jNx01XKj1Fvfo919gLHnqRjWJ/W7OEnjIxuQK8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=S9MdWukEuSpARhcT052IlxrvTrGNIU7UWi+UvHe8pUlmhZLegGItu9QubIuQQO3Wg9kJkDMt0nqT1zeqroftrat9Vt3XOhXDjkQl+ewUL1k6B1f7sKogBmkGjjFIOhsutp6ot0FbgrgUNr/m9JRdsoIa979FY+Y1YC7ZFY5D1+0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=t96Nf/d5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="t96Nf/d5" Received: by smtp.kernel.org (Postfix) with ESMTPS id A9271C4CEF5; Fri, 25 Jul 2025 10:04:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1753437857; bh=l60S4jNx01XKj1Fvfo919gLHnqRjWJ/W7OEnjIxuQK8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=t96Nf/d5ClDL+lw5UxM8tWHiQQF6UOWne0+IbS+FiJH14BvtnZ3Fu/OePMicUeSmk oKnYT3sMSDkXByMGzLuT43g8nVE/4AaHYQDqLnVx0tJ1mNidarc+u6mXUp5uUrwzM8 mD9YtO5XIJQmpl6B16SWhqv0ve3eQfS/VD4sZ9JVjueCpEvFs8dSOr9GXe1oiOf3sS xj7miTvLiVSlPATX4oM/lGTx472hdQwn0kfrbvl2cy+g2vy4s9KOveTz5SSET5HUzJ 7Hfb9PnyspYgusvdY2wjyCvc+g+xqM4IYbaWAtsuWr2sWMf5AVpVrv85m3CaTQ2/7Q nCkqw/qVarobg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90A9AC87FCD; Fri, 25 Jul 2025 10:04:17 +0000 (UTC) From: Fenglin Wu via B4 Relay Date: Fri, 25 Jul 2025 18:04:03 +0800 Subject: [PATCH 1/2] leds: flash: leds-qcom-flash: update torch current clamp setting Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250725-fix-torch-clamp-issue-v1-1-4cf3ebaa4c67@oss.qualcomm.com> References: <20250725-fix-torch-clamp-issue-v1-0-4cf3ebaa4c67@oss.qualcomm.com> In-Reply-To: <20250725-fix-torch-clamp-issue-v1-0-4cf3ebaa4c67@oss.qualcomm.com> To: kernel@oss.qualcomm.com, Lee Jones , Pavel Machek , Fenglin Wu Cc: Subbaraman Narayanamurthy , linux-leds@vger.kernel.org, linux-kernel@vger.kernel.org, Fenglin Wu X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753437856; l=3409; i=fenglin.wu@oss.qualcomm.com; s=20240327; h=from:subject:message-id; bh=v2hPU9OxK+ys58fLw4CJe4MftTpBGLNVnc5w51m7B2Q=; b=OvcBcHSFhra6s9er1jloJ4CKjih4RY55XCMBwZNoYXynrXbcRWStA7mE8oXJYp1jcrnEUJbxy xNU3S19JqMgDZEUSrHLXalTVI+cN1W6xMAr6o62wwcS9Lp4yytyyhyW X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu There is a register to clamp the flash current per LED channel when safety timer is disabled. It needs to be updated according to the maximum torch LED current setting to ensure the torch current won't be clamped unexpectedly. Fixes: 96a2e242a5dc ("leds: flash: Add driver to support flash LED module i= n QCOM PMICs") Signed-off-by: Fenglin Wu --- drivers/leds/flash/leds-qcom-flash.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/leds/flash/leds-qcom-flash.c b/drivers/leds/flash/leds= -qcom-flash.c index 89cf5120f5d55bbb7e24faa8c3a946416f8fed46..9c2e41cfddcf2d50d5a633cb157= 084371a631d74 100644 --- a/drivers/leds/flash/leds-qcom-flash.c +++ b/drivers/leds/flash/leds-qcom-flash.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2022, 2024 Qualcomm Innovation Center, Inc. All rights re= served. + * Copyright (c) 2022, 2024-2025 Qualcomm Innovation Center, Inc. All righ= ts reserved. */ =20 #include @@ -111,6 +111,7 @@ enum { REG_IRESOLUTION, REG_CHAN_STROBE, REG_CHAN_EN, + REG_TORCH_CLAMP, REG_THERM_THRSH1, REG_THERM_THRSH2, REG_THERM_THRSH3, @@ -127,6 +128,7 @@ static const struct reg_field mvflash_3ch_regs[REG_MAX_= COUNT] =3D { REG_FIELD(0x47, 0, 5), /* iresolution */ REG_FIELD_ID(0x49, 0, 2, 3, 1), /* chan_strobe */ REG_FIELD(0x4c, 0, 2), /* chan_en */ + REG_FIELD(0xec, 0, 6), /* torch_clamp */ REG_FIELD(0x56, 0, 2), /* therm_thrsh1 */ REG_FIELD(0x57, 0, 2), /* therm_thrsh2 */ REG_FIELD(0x58, 0, 2), /* therm_thrsh3 */ @@ -142,6 +144,7 @@ static const struct reg_field mvflash_4ch_regs[REG_MAX_= COUNT] =3D { REG_FIELD(0x49, 0, 3), /* iresolution */ REG_FIELD_ID(0x4a, 0, 6, 4, 1), /* chan_strobe */ REG_FIELD(0x4e, 0, 3), /* chan_en */ + REG_FIELD(0xed, 0, 6), /* torch_clamp */ REG_FIELD(0x7a, 0, 2), /* therm_thrsh1 */ REG_FIELD(0x78, 0, 2), /* therm_thrsh2 */ }; @@ -156,6 +159,7 @@ struct qcom_flash_data { u8 max_channels; u8 chan_en_bits; u8 revision; + u8 torch_clamp; }; =20 struct qcom_flash_led { @@ -702,6 +706,7 @@ static int qcom_flash_register_led_device(struct device= *dev, u32 current_ua, timeout_us; u32 channels[4]; int i, rc, count; + u8 torch_clamp; =20 count =3D fwnode_property_count_u32(node, "led-sources"); if (count <=3D 0) { @@ -751,6 +756,12 @@ static int qcom_flash_register_led_device(struct devic= e *dev, current_ua =3D min_t(u32, current_ua, TORCH_CURRENT_MAX_UA * led->chan_co= unt); led->max_torch_current_ma =3D current_ua / UA_PER_MA; =20 + torch_clamp =3D (current_ua / led->chan_count) / TORCH_IRES_UA; + if (torch_clamp !=3D 0) + torch_clamp--; + + flash_data->torch_clamp =3D max_t(u8, flash_data->torch_clamp, torch_clam= p); + if (fwnode_property_present(node, "flash-max-microamp")) { flash->led_cdev.flags |=3D LED_DEV_CAP_FLASH; =20 @@ -917,8 +928,7 @@ static int qcom_flash_led_probe(struct platform_device = *pdev) flash_data->leds_count++; } =20 - return 0; - + return regmap_field_write(flash_data->r_fields[REG_TORCH_CLAMP], flash_da= ta->torch_clamp); release: while (flash_data->v4l2_flash[flash_data->leds_count] && flash_data->leds= _count) v4l2_flash_release(flash_data->v4l2_flash[flash_data->leds_count--]); --=20 2.34.1 From nobody Mon Oct 6 03:13:33 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26A682D6412; Fri, 25 Jul 2025 10:04:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753437859; cv=none; b=GaZyGY84wJlSil+AW66FNP2Z0F9I/wGq9TFI8bhu7Pa9z0Jg4KsGMouGiBRPA/ZtS26bONLlAxSJoRcIzQmTWG826/goONov8HEVrb+wOtieIWjdDkr4sqSY2xeQQCaBIThe+mlYxNGv0/NDDhm0gengG5vIyDny4x3NV4cMBlU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753437859; c=relaxed/simple; bh=6bWWiC2YbBfgnkT1i6jFvQwqcRzI6nEvksUFy1ZFZPg=; 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Fri, 25 Jul 2025 10:04:17 +0000 (UTC) From: Fenglin Wu via B4 Relay Date: Fri, 25 Jul 2025 18:04:04 +0800 Subject: [PATCH 2/2] leds: flash: leds-qcom-flash: add a separate register map for PMI8998 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250725-fix-torch-clamp-issue-v1-2-4cf3ebaa4c67@oss.qualcomm.com> References: <20250725-fix-torch-clamp-issue-v1-0-4cf3ebaa4c67@oss.qualcomm.com> In-Reply-To: <20250725-fix-torch-clamp-issue-v1-0-4cf3ebaa4c67@oss.qualcomm.com> To: kernel@oss.qualcomm.com, Lee Jones , Pavel Machek , Fenglin Wu Cc: Subbaraman Narayanamurthy , linux-leds@vger.kernel.org, linux-kernel@vger.kernel.org, Fenglin Wu X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753437856; l=2388; i=fenglin.wu@oss.qualcomm.com; s=20240327; h=from:subject:message-id; bh=apUF2dH/Mll13q6/mMcrFJ2TYLuscFy4mzUCJJ0pxQU=; b=/Pv9fB6kxS8Qb1XuKdnLLN5YWv3jJq9NW8gfeSe5ZJrha8fsNAvd3wefCoyUgX8OVMCGTOZmy FZaOiwx0RxTD5nrsgRpmUx8wqJBPtFLHXtCOlHR3Og7NnTaZQCtqeWH X-Developer-Key: i=fenglin.wu@oss.qualcomm.com; a=ed25519; pk=BF8SA4IVDk8/EBCwlBehKtn2hp6kipuuAuDAHh9s+K4= X-Endpoint-Received: by B4 Relay for fenglin.wu@oss.qualcomm.com/20240327 with auth_id=406 X-Original-From: Fenglin Wu Reply-To: fenglin.wu@oss.qualcomm.com From: Fenglin Wu The 3-channel flash module in PMI8998 has several registers different than the others, such as: torch_clamp. Add different register fields for it. Signed-off-by: Fenglin Wu --- drivers/leds/flash/leds-qcom-flash.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/leds/flash/leds-qcom-flash.c b/drivers/leds/flash/leds= -qcom-flash.c index 9c2e41cfddcf2d50d5a633cb157084371a631d74..2554ef7bcae6bc8f66edbffc7c8= 85a9386b263ad 100644 --- a/drivers/leds/flash/leds-qcom-flash.c +++ b/drivers/leds/flash/leds-qcom-flash.c @@ -118,6 +118,22 @@ enum { REG_MAX_COUNT, }; =20 +static const struct reg_field mvflash_3ch_pmi8998_regs[REG_MAX_COUNT] =3D { + REG_FIELD(0x08, 0, 7), /* status1 */ + REG_FIELD(0x09, 0, 7), /* status2 */ + REG_FIELD(0x0a, 0, 7), /* status3 */ + REG_FIELD_ID(0x40, 0, 7, 3, 1), /* chan_timer */ + REG_FIELD_ID(0x43, 0, 6, 3, 1), /* itarget */ + REG_FIELD(0x46, 7, 7), /* module_en */ + REG_FIELD(0x47, 0, 5), /* iresolution */ + REG_FIELD_ID(0x49, 0, 2, 3, 1), /* chan_strobe */ + REG_FIELD(0x4c, 0, 2), /* chan_en */ + REG_FIELD(0xea, 0, 6), /* torch_clamp */ + REG_FIELD(0x56, 0, 2), /* therm_thrsh1 */ + REG_FIELD(0x57, 0, 2), /* therm_thrsh2 */ + REG_FIELD(0x58, 0, 2), /* therm_thrsh3 */ +}; + static const struct reg_field mvflash_3ch_regs[REG_MAX_COUNT] =3D { REG_FIELD(0x08, 0, 7), /* status1 */ REG_FIELD(0x09, 0, 7), /* status2 */ @@ -862,13 +878,20 @@ static int qcom_flash_led_probe(struct platform_devic= e *pdev) return rc; } =20 - if (val =3D=3D FLASH_SUBTYPE_3CH_PM8150_VAL || val =3D=3D FLASH_SUBTYPE_3= CH_PMI8998_VAL) { + if (val =3D=3D FLASH_SUBTYPE_3CH_PM8150_VAL) { flash_data->hw_type =3D QCOM_MVFLASH_3CH; flash_data->max_channels =3D 3; regs =3D devm_kmemdup(dev, mvflash_3ch_regs, sizeof(mvflash_3ch_regs), GFP_KERNEL); if (!regs) return -ENOMEM; + } else if (val =3D=3D FLASH_SUBTYPE_3CH_PMI8998_VAL) { + flash_data->hw_type =3D QCOM_MVFLASH_3CH; + flash_data->max_channels =3D 3; + regs =3D devm_kmemdup(dev, mvflash_3ch_pmi8998_regs, + sizeof(mvflash_3ch_pmi8998_regs), GFP_KERNEL); + if (!regs) + return -ENOMEM; } else if (val =3D=3D FLASH_SUBTYPE_4CH_VAL) { flash_data->hw_type =3D QCOM_MVFLASH_4CH; flash_data->max_channels =3D 4; --=20 2.34.1