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Thu, 24 Jul 2025 15:10:09 -0700 From: Nicolin Chen To: , CC: , , , , , , Subject: [PATCH v4 1/2] iommu/arm-smmu-v3: Do not bother impl_ops if IOMMU_VIOMMU_TYPE_ARM_SMMUV3 Date: Thu, 24 Jul 2025 15:10:01 -0700 Message-ID: <20250724221002.1883034-2-nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250724221002.1883034-1-nicolinc@nvidia.com> References: <20250724221002.1883034-1-nicolinc@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB50:EE_|MW6PR12MB7087:EE_ X-MS-Office365-Filtering-Correlation-Id: 5b626f9f-9154-4167-6c36-08ddcafee5f1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|376014|7053199007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?nlGlLIJrQYQIKJSARoLe7yzTEOd8ezLU9Se6ND1hbeV5ndKuZUdZgdcMP9hS?= =?us-ascii?Q?6gBeX4pla0Q1g37HoK5kjCIrtYWBEUslZ7aYiAlKDlfTs2TmkA7t4VKrsMtb?= =?us-ascii?Q?Rph+GbR5aOIVoq/39XxkAYNn+jbi29sbKEr3MlS2bL8V7f5gOx1g1jBb0Ugw?= =?us-ascii?Q?FlviTItoN2pkKKk/tgoMvvxKWWeS5NjbYncYTuOYLxHrASzNjaAdAqsgKAE+?= =?us-ascii?Q?LXxTjQjRUrp4Vfy0c5xY/NbR3Z4/lHZfUdJ4vHeDrNDNNwD10ToAqcKJ3tXG?= =?us-ascii?Q?zjKUXLGJtrSn647QGkLR7gIymxCFygzgkdnaSeV6guaNQHHBjiXncmkNs9Y7?= =?us-ascii?Q?o/tmto/aBHfWK5zcvYidGRkgs1fgFryGGEM5rKrqmBQYWR7Dt04z728sHjkB?= =?us-ascii?Q?4T4q2J2Uy3SHVt9XWBzHQJNGleFX8GJg/FOXMB6PFmelAcikhU93kmPmFqHB?= =?us-ascii?Q?KZubPdo5eKBXgYUHZCP4qf2B2/i5VGNqVZ6rlCfKbZGZgRMKzsQrDP3CVtSI?= =?us-ascii?Q?48LQiKcS6/p05sTRn40R+taD07yErBqkDROv+yR7FvrbhAugtSoQXMPCrB/1?= =?us-ascii?Q?lXzWns19IQsfwNZTm5J+SWlT1k9+eTR6CH89actXt4pSo0lvUT59Ubyw+ChD?= =?us-ascii?Q?EAxuqZsn10QOyLtBVM8/bOIRlQ3eVtlGhr/q3h5TC94GJA+bpW67+zc0pexL?= =?us-ascii?Q?kgDmQ08oiFuimpcEmqHFLuW4E7DsBfpwviLJTxXe699JEjB9FM1Mg8svdmEG?= =?us-ascii?Q?HQxsXdrDEkU+5B46Uzt9SK5Dw1Tb5A/oegnBxiVHfOsbzbLkyplUJFG34gIj?= =?us-ascii?Q?0DMjVe8WzSiCMV+n8noNTrJQY055dWyM6ssOlDKDy2gPdlagHEfyY9gTq7+K?= =?us-ascii?Q?mptFr1OIQQ/UwcNuM6dB5MOPFu4UGX2YHlaQrv8T3/jCv+zknvIIq9iDB8xn?= =?us-ascii?Q?SP2a2Zbn1vxvJVaP4/TrtUxCBZrS//VGPtRGAkHLK/qyxQpNW/tJg9+19bYZ?= =?us-ascii?Q?tj6BOpR5RU+tQd4cJ/G34pyOQfZbDiJyUtR+izsdzC3zRbfNQB18+LyDuXh4?= =?us-ascii?Q?ZEY59h/EcZp87fQfQS+SgIUMBZAB2rd6ZP1mQ39h0BHng8I36WADXgqLoSvL?= =?us-ascii?Q?HVH0JwJlR4P157bC/iknXKl4DaBQ+3VF+2auoKT5TFJfAtuHt3f6JLOKyOR7?= =?us-ascii?Q?p1zTVcTSB5tmzokOUVMmvmKcdJrfBswMfyM+WKK4GMioFN7GCudE6X7FSnrd?= =?us-ascii?Q?8rggMa4CzubzIMy0Q2yUK8dcXZoW68DkATbZ6EbhZ7AJECXVG2JsAuEmZB2E?= =?us-ascii?Q?ps1TgkTl1UeS74N8X04RRAASMgZ32She5driZXXlsEwIg7Grz81yXfMXdWff?= =?us-ascii?Q?LimasQhBVns6bHFzcOe9yMQq4EhPHWkjH3Jalrejnpp3IfzsLBZZpo4Qhlxv?= =?us-ascii?Q?K6R/QQxrlNNLMPFad47b/mrHv8DzlNV1oeroig//1rWkWRIFgbHPuhI4jKLi?= =?us-ascii?Q?y5P3xezsK8cEbDHpPc+n27boe7aRj6qluio/?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014)(7053199007);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jul 2025 22:10:28.2988 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5b626f9f-9154-4167-6c36-08ddcafee5f1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB50.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB7087 Content-Type: text/plain; charset="utf-8" When viommu type is IOMMU_VIOMMU_TYPE_ARM_SMMUV3, always return or init the standard struct arm_vsmmu, instead of going through impl_ops that must have its own viommu type than the standard IOMMU_VIOMMU_TYPE_ARM_SMMUV3. Given that arm_vsmmu_init() is called after arm_smmu_get_viommu_size(), any unsupported viommu->type must be a corruption. And it must be a driver bug that its vsmmu_size and vsmmu_init ops aren't paired. Warn these two cases. Suggested-by: Will Deacon Acked-by: Will Deacon Reviewed-by: Pranjal Shrivastava Signed-off-by: Nicolin Chen --- .../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 27 +++++++++++-------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 14 ++++++++++ 2 files changed, 30 insertions(+), 11 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c b/drivers/= iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c index d9bea8f1f636d..b963b9b3de542 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c @@ -420,14 +420,13 @@ size_t arm_smmu_get_viommu_size(struct device *dev, !(smmu->features & ARM_SMMU_FEAT_S2FWB)) return 0; =20 - if (smmu->impl_ops && smmu->impl_ops->vsmmu_size && - viommu_type =3D=3D smmu->impl_ops->vsmmu_type) - return smmu->impl_ops->vsmmu_size; + if (viommu_type =3D=3D IOMMU_VIOMMU_TYPE_ARM_SMMUV3) + return VIOMMU_STRUCT_SIZE(struct arm_vsmmu, core); =20 - if (viommu_type !=3D IOMMU_VIOMMU_TYPE_ARM_SMMUV3) + if (!smmu->impl_ops || !smmu->impl_ops->vsmmu_size || + viommu_type !=3D smmu->impl_ops->vsmmu_type) return 0; - - return VIOMMU_STRUCT_SIZE(struct arm_vsmmu, core); + return smmu->impl_ops->vsmmu_size; } =20 int arm_vsmmu_init(struct iommufd_viommu *viommu, @@ -447,12 +446,18 @@ int arm_vsmmu_init(struct iommufd_viommu *viommu, /* FIXME Move VMID allocation from the S2 domain allocation to here */ vsmmu->vmid =3D s2_parent->s2_cfg.vmid; =20 - if (smmu->impl_ops && smmu->impl_ops->vsmmu_init && - viommu->type =3D=3D smmu->impl_ops->vsmmu_type) - return smmu->impl_ops->vsmmu_init(vsmmu, user_data); + if (viommu->type =3D=3D IOMMU_VIOMMU_TYPE_ARM_SMMUV3) { + viommu->ops =3D &arm_vsmmu_ops; + return 0; + } =20 - viommu->ops =3D &arm_vsmmu_ops; - return 0; + /* + * Unsupported type should be rejected by arm_smmu_get_viommu_size. + * Seeing one here indicates a kernel bug or some data corruption. + */ + if (WARN_ON(viommu->type !=3D smmu->impl_ops->vsmmu_type)) + return -EOPNOTSUPP; + return smmu->impl_ops->vsmmu_init(vsmmu, user_data); } =20 int arm_vmaster_report_event(struct arm_smmu_vmaster *vmaster, u64 *evt) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 181d07bc1a9d4..9f4ad37058010 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -4703,6 +4703,7 @@ static void arm_smmu_impl_remove(void *data) static struct arm_smmu_device *arm_smmu_impl_probe(struct arm_smmu_device = *smmu) { struct arm_smmu_device *new_smmu =3D ERR_PTR(-ENODEV); + const struct arm_smmu_impl_ops *ops; int ret; =20 if (smmu->impl_dev && (smmu->options & ARM_SMMU_OPT_TEGRA241_CMDQV)) @@ -4713,11 +4714,24 @@ static struct arm_smmu_device *arm_smmu_impl_probe(= struct arm_smmu_device *smmu) if (IS_ERR(new_smmu)) return new_smmu; =20 + ops =3D new_smmu->impl_ops; + if (ops) { + /* vsmmu_size and vsmmu_init ops must be paired */ + if (WARN_ON(!ops->vsmmu_size !=3D !ops->vsmmu_init)) { + ret =3D -EINVAL; + goto err_remove; + } + } + ret =3D devm_add_action_or_reset(new_smmu->dev, arm_smmu_impl_remove, new_smmu); if (ret) return ERR_PTR(ret); return new_smmu; + +err_remove: + arm_smmu_impl_remove(new_smmu); + return ERR_PTR(ret); } =20 static int arm_smmu_device_probe(struct platform_device *pdev) --=20 2.43.0