From nobody Mon Oct 6 08:26:57 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 698A729A307; Thu, 24 Jul 2025 09:28:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753349313; cv=none; b=pbseAZ8Tk7z3z2UOrmsEbDVC6CQZVb5ji2P7UhnTLxZx18NcJjN34jf9utUgo3vkuI4x0s2cu7YEySvxG0ZXfO8h7I2784063clB+SktuJyKKiDl1GXfy741smG6EhRa4X5AkULFCMf8O7uDAVJpb0Ho6QY9N3Z6B3FPTRMkFo0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753349313; c=relaxed/simple; bh=uQzzVbjMkC/9+gc6fOUVo7lSatEISkZtcM0QArkbPDw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Ks+D2Rwuodrqo7A+LbKxQkEzbD+ARL08kEccReXAqEpWSVx40x6Wmph2HDctOCQIK9hGl/w7Sg0RKGzHmoJz4pGIDPgXAqgDpVQGHPd7Fv7ZTWxv7zWPzIzZxQ/Iaakg6nu8omiz9WQkiBkqgedzn/Cbfv80EQCoUMMytNTehmo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=MAveLVj3; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="MAveLVj3" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56NMXOlb005813; Thu, 24 Jul 2025 09:28:17 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= UoONq0pmeF/Z0GamRM3aBii0pqQHsHurfdfjnC4YpAk=; b=MAveLVj3ONgtcWIK /NPvhrf+J8q2E6NVWMItPLDT0moAf0zFts8sdTdIX1CHJFHG4zYlrh5uUL8cdZk8 Tejp5DTYiLW3+TKsMldnnmpnRZ91g2h/HjnzeFNZRiaJvGk3+xvX8T3x9JsixAfM nUFbPBjFaKxHrjzsvgHbdJKV9rBhjPShRYK5G5CZ3hsslb49alWXlkJJwN95viQv ff3+5V3V9/K7LjcfrqDGhz7EGuZ2jriykSbHcF+5uWZfFsxrikW2RcCkaxulyPT1 av/zpTMsojJZF9nFc/NwbeAgkmj6bobn1O2Ir1zvdXy/S+cEdJ09N+8ZJ5lBa067 j8Ab9g== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 48047qg6xe-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Jul 2025 09:28:16 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 56O9SFcC005702 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Jul 2025 09:28:15 GMT Received: from haixcui1-gv.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Thu, 24 Jul 2025 02:28:12 -0700 From: Haixu Cui To: , , , , , , , , , CC: Subject: [RFC PATCH v6 3/3] SPI: Add virtio SPI driver. Date: Thu, 24 Jul 2025 17:27:46 +0800 Message-ID: <20250724092746.1297608-4-quic_haixcui@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250724092746.1297608-1-quic_haixcui@quicinc.com> References: <20250724092746.1297608-1-quic_haixcui@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzI0MDA3MCBTYWx0ZWRfX7LhvL4im+4FS 1bLj3GDZ+ZgBZmXQrimDtF50LTEA4de/mzx8dq7Eo4OUFLfNu0cO/b+eR/PnIK+QT9lnkSPVtVN 5AauGVYhQ3hWJtIgxHr01m3O16t6r1y7CmyEYaLzJgTeKLM0s41drxKLiHZ5ndSJuPqmIAsOzuD tVlh9X19wNtE/XtG0tCayhfyjCCbpqTHzwbaY75+Vppx9iYPFb+amYFygS+sFkvebbc7Zu2mKhD dRDhc3u0HVEjKIQsxXVKLeZlLYr2b+4taSdsHVngVb7W7L7ONjHJoidDfb6LYFkYMhiPRira/Rd l42i4tgAfyI5zmDVgmrwnlwpJbmthaMS6tQo7pcoSRMd8WVhed19vHmItxtL/kgFunyN8C0qrbB OJ4J9Q90nGJbugNafnQzq4HG9tMYBnvpxs2bckn94uHdkO7KbO7exnFMd/+KknQ26W8IVp2H X-Proofpoint-ORIG-GUID: QADkY1xLLxTuN13MPqOGUMI4jMSRNj6X X-Proofpoint-GUID: QADkY1xLLxTuN13MPqOGUMI4jMSRNj6X X-Authority-Analysis: v=2.4 cv=IrMecK/g c=1 sm=1 tr=0 ts=6881fcb0 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=Wb1JkmetP80A:10 a=COk6AnOGAAAA:8 a=VwQbUJbxAAAA:8 a=n0-Sf9z_k3ELN0rn3eUA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-24_01,2025-07-23_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 clxscore=1015 priorityscore=1501 spamscore=0 mlxscore=0 mlxlogscore=999 phishscore=0 impostorscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507240070 Content-Type: text/plain; charset="utf-8" This is the virtio SPI Linux kernel driver. Signed-off-by: Haixu Cui --- MAINTAINERS | 6 + drivers/spi/Kconfig | 11 + drivers/spi/Makefile | 1 + drivers/spi/spi-virtio.c | 445 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 463 insertions(+) create mode 100644 drivers/spi/spi-virtio.c diff --git a/MAINTAINERS b/MAINTAINERS index a8bebd0886df..b02a53a3d2b9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26379,6 +26379,12 @@ S: Maintained F: include/uapi/linux/virtio_snd.h F: sound/virtio/* =20 +VIRTIO SPI DRIVER +M: Haixu Cui +S: Maintained +F: drivers/spi/spi-virtio.c +F: include/uapi/linux/virtio_spi.h + VIRTUAL BOX GUEST DEVICE DRIVER M: Hans de Goede M: Arnd Bergmann diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index c51da3fc3604..63a0235ddfbb 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -1207,6 +1207,17 @@ config SPI_UNIPHIER =20 If your SoC supports SCSSI, say Y here. =20 +config SPI_VIRTIO + tristate "Virtio SPI Controller" + depends on SPI_MASTER && VIRTIO + help + If you say yes to this option, support will be included for the virtio + SPI controller driver. The hardware can be emulated by any device model + software according to the virtio protocol. + + This driver can also be built as a module. If so, the module + will be called spi-virtio. + config SPI_XCOMM tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" depends on I2C diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 4ea89f6fc531..827a1e7e5ce8 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -156,6 +156,7 @@ spi-thunderx-objs :=3D spi-cavium.o spi-cavium-thunde= rx.o obj-$(CONFIG_SPI_THUNDERX) +=3D spi-thunderx.o obj-$(CONFIG_SPI_TOPCLIFF_PCH) +=3D spi-topcliff-pch.o obj-$(CONFIG_SPI_UNIPHIER) +=3D spi-uniphier.o +obj-$(CONFIG_SPI_VIRTIO) +=3D spi-virtio.o obj-$(CONFIG_SPI_XCOMM) +=3D spi-xcomm.o obj-$(CONFIG_SPI_XILINX) +=3D spi-xilinx.o obj-$(CONFIG_SPI_XLP) +=3D spi-xlp.o diff --git a/drivers/spi/spi-virtio.c b/drivers/spi/spi-virtio.c new file mode 100644 index 000000000000..ced37923d492 --- /dev/null +++ b/drivers/spi/spi-virtio.c @@ -0,0 +1,445 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * SPI bus driver for the Virtio SPI controller + * Copyright (C) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct virtio_spi_req { + struct completion completion; + struct spi_transfer_head transfer_head ____cacheline_aligned; + const uint8_t *tx_buf ____cacheline_aligned; + uint8_t *rx_buf ____cacheline_aligned; + struct spi_transfer_result result ____cacheline_aligned; +}; + +struct virtio_spi_priv { + /* The virtio device we're associated with */ + struct virtio_device *vdev; + /* Pointer to the virtqueue */ + struct virtqueue *vq; + /* Copy of config space mode_func_supported */ + u32 mode_func_supported; + /* Copy of config space max_freq_hz */ + u32 max_freq_hz; +}; + +static void virtio_spi_msg_done(struct virtqueue *vq) +{ + struct virtio_spi_req *req; + unsigned int len; + + while ((req =3D virtqueue_get_buf(vq, &len))) + complete(&req->completion); +} + +/* + * virtio_spi_set_delays - Set delay parameters for SPI transfer + * + * This function sets various delay parameters for SPI transfer, + * including delay after CS asserted, timing intervals between + * adjacent words within a transfer, delay before and after CS + * deasserted. It converts these delay parameters to nanoseconds + * using spi_delay_to_ns and stores the results in spi_transfer_head + * structure. + * If the conversion fails, the function logs a warning message and + * returns an error code. + * . . . . . . . . . . + * Delay + A + + B + + C + D + E + F + A + + * . . . . . . . . . . + * ___. . . . . . .___.___. . + * CS# |___.______.____.____.___.___| . |___._____________ + * . . . . . . . . . . + * . . . . . . . . . . + * SCLK__.___.___NNN_____NNN__.___.___.___.___.___.___NNN_______ + * + * NOTE: 1st transfer has two words, the delay between these two words are + * 'B' in the diagram. + * + * A =3D> struct spi_device -> cs_setup + * B =3D> max{struct spi_transfer -> word_delay, struct spi_device -> word= _delay} + * Note: spi_device and spi_transfer both have word_delay, Linux + * choose the bigger one, refer to _spi_xfer_word_delay_update fun= ction + * C =3D> struct spi_transfer -> delay + * D =3D> struct spi_device -> cs_hold + * E =3D> struct spi_device -> cs_inactive + * F =3D> struct spi_transfer -> cs_change_delay + * + * So the corresponding relationship: + * A <=3D=3D=3D> cs_setup_ns (after CS asserted) + * B <=3D=3D=3D> word_delay_ns (delay between adjacent words within a tr= ansfer) + * C+D <=3D=3D=3D> cs_delay_hold_ns (before CS deasserted) + * E+F <=3D=3D=3D> cs_change_delay_inactive_ns (after CS deasserted, these= two + * values are also recommended in the Linux driver to be added up) + */ +static int virtio_spi_set_delays(struct spi_transfer_head *th, + struct spi_device *spi, + struct spi_transfer *xfer) +{ + int cs_setup; + int cs_word_delay_xfer; + int cs_word_delay_spi; + int delay; + int cs_hold; + int cs_inactive; + int cs_change_delay; + + cs_setup =3D spi_delay_to_ns(&spi->cs_setup, xfer); + if (cs_setup < 0) { + dev_warn(&spi->dev, "Cannot convert cs_setup\n"); + return cs_setup; + } + th->cs_setup_ns =3D cpu_to_le32((u32)cs_setup); + + cs_word_delay_xfer =3D spi_delay_to_ns(&xfer->word_delay, xfer); + if (cs_word_delay_xfer < 0) { + dev_warn(&spi->dev, "Cannot convert cs_word_delay_xfer\n"); + return cs_word_delay_xfer; + } + cs_word_delay_spi =3D spi_delay_to_ns(&spi->word_delay, xfer); + if (cs_word_delay_spi < 0) { + dev_warn(&spi->dev, "Cannot convert cs_word_delay_spi\n"); + return cs_word_delay_spi; + } + if (cs_word_delay_spi > cs_word_delay_xfer) + th->word_delay_ns =3D cpu_to_le32((u32)cs_word_delay_spi); + else + th->word_delay_ns =3D cpu_to_le32((u32)cs_word_delay_xfer); + + delay =3D spi_delay_to_ns(&xfer->delay, xfer); + if (delay < 0) { + dev_warn(&spi->dev, "Cannot convert delay\n"); + return delay; + } + cs_hold =3D spi_delay_to_ns(&spi->cs_hold, xfer); + if (cs_hold < 0) { + dev_warn(&spi->dev, "Cannot convert cs_hold\n"); + return cs_hold; + } + th->cs_delay_hold_ns =3D cpu_to_le32((u32)delay + (u32)cs_hold); + + cs_inactive =3D spi_delay_to_ns(&spi->cs_inactive, xfer); + if (cs_inactive < 0) { + dev_warn(&spi->dev, "Cannot convert cs_inactive\n"); + return cs_inactive; + } + cs_change_delay =3D spi_delay_to_ns(&xfer->cs_change_delay, xfer); + if (cs_change_delay < 0) { + dev_warn(&spi->dev, "Cannot convert cs_change_delay\n"); + return cs_change_delay; + } + th->cs_change_delay_inactive_ns =3D + cpu_to_le32((u32)cs_inactive + (u32)cs_change_delay); + + return 0; +} + +static int virtio_spi_transfer_one(struct spi_controller *ctrl, + struct spi_device *spi, + struct spi_transfer *xfer) +{ + struct virtio_spi_priv *priv =3D spi_controller_get_devdata(ctrl); + struct virtio_spi_req *spi_req; + struct spi_transfer_head *th; + struct scatterlist sg_out_head, sg_out_payload; + struct scatterlist sg_in_result, sg_in_payload; + struct scatterlist *sgs[4]; + unsigned int outcnt =3D 0u; + unsigned int incnt =3D 0u; + int ret; + + spi_req =3D kzalloc(sizeof(*spi_req), GFP_KERNEL); + if (!spi_req) + return -ENOMEM; + + init_completion(&spi_req->completion); + + th =3D &spi_req->transfer_head; + + /* Fill struct spi_transfer_head */ + th->chip_select_id =3D spi_get_chipselect(spi, 0); + th->bits_per_word =3D spi->bits_per_word; + th->cs_change =3D xfer->cs_change; + th->tx_nbits =3D xfer->tx_nbits; + th->rx_nbits =3D xfer->rx_nbits; + th->reserved[0] =3D 0; + th->reserved[1] =3D 0; + th->reserved[2] =3D 0; + + BUILD_BUG_ON(VIRTIO_SPI_CPHA !=3D SPI_CPHA); + BUILD_BUG_ON(VIRTIO_SPI_CPOL !=3D SPI_CPOL); + BUILD_BUG_ON(VIRTIO_SPI_CS_HIGH !=3D SPI_CS_HIGH); + BUILD_BUG_ON(VIRTIO_SPI_MODE_LSB_FIRST !=3D SPI_LSB_FIRST); + + th->mode =3D cpu_to_le32(spi->mode & (SPI_LSB_FIRST | SPI_CS_HIGH | + SPI_CPOL | SPI_CPHA)); + if ((spi->mode & SPI_LOOP) !=3D 0) + th->mode |=3D cpu_to_le32(VIRTIO_SPI_MODE_LOOP); + + th->freq =3D cpu_to_le32(xfer->speed_hz); + + ret =3D virtio_spi_set_delays(th, spi, xfer); + if (ret) + goto msg_done; + + /* Set buffers */ + spi_req->tx_buf =3D xfer->tx_buf; + spi_req->rx_buf =3D xfer->rx_buf; + + /* Prepare sending of virtio message */ + init_completion(&spi_req->completion); + + sg_init_one(&sg_out_head, th, sizeof(*th)); + sgs[outcnt] =3D &sg_out_head; + outcnt++; + + if (spi_req->tx_buf) { + sg_init_one(&sg_out_payload, spi_req->tx_buf, xfer->len); + sgs[outcnt] =3D &sg_out_payload; + outcnt++; + } + + if (spi_req->rx_buf) { + sg_init_one(&sg_in_payload, spi_req->rx_buf, xfer->len); + sgs[outcnt] =3D &sg_in_payload; + incnt++; + } + + sg_init_one(&sg_in_result, &spi_req->result, + sizeof(struct spi_transfer_result)); + sgs[outcnt + incnt] =3D &sg_in_result; + incnt++; + + ret =3D virtqueue_add_sgs(priv->vq, sgs, outcnt, incnt, spi_req, + GFP_KERNEL); + if (ret) + goto msg_done; + + /* Simple implementation: There can be only one transfer in flight */ + virtqueue_kick(priv->vq); + + wait_for_completion(&spi_req->completion); + + /* Read result from message and translate return code */ + switch (spi_req->result.result) { + case VIRTIO_SPI_TRANS_OK: + break; + case VIRTIO_SPI_PARAM_ERR: + ret =3D -EINVAL; + break; + case VIRTIO_SPI_TRANS_ERR: + ret =3D -EIO; + break; + default: + ret =3D -EIO; + break; + } + +msg_done: + kfree(spi_req); + if (ret) + ctrl->cur_msg->status =3D ret; + + return ret; +} + +static void virtio_spi_read_config(struct virtio_device *vdev) +{ + struct spi_controller *ctrl =3D dev_get_drvdata(&vdev->dev); + struct virtio_spi_priv *priv =3D vdev->priv; + u8 cs_max_number; + u8 tx_nbits_supported; + u8 rx_nbits_supported; + + cs_max_number =3D virtio_cread8(vdev, offsetof(struct virtio_spi_config, + cs_max_number)); + ctrl->num_chipselect =3D cs_max_number; + + /* Set the mode bits which are understood by this driver */ + priv->mode_func_supported =3D + virtio_cread32(vdev, offsetof(struct virtio_spi_config, + mode_func_supported)); + ctrl->mode_bits =3D priv->mode_func_supported & + (VIRTIO_SPI_CS_HIGH | VIRTIO_SPI_MODE_LSB_FIRST); + if ((priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_CPHA_1) !=3D 0) + ctrl->mode_bits |=3D VIRTIO_SPI_CPHA; + if ((priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_CPOL_1) !=3D 0) + ctrl->mode_bits |=3D VIRTIO_SPI_CPOL; + if ((priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_LSB_FIRST) !=3D 0) + ctrl->mode_bits |=3D SPI_LSB_FIRST; + if ((priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_LOOPBACK) !=3D 0) + ctrl->mode_bits |=3D SPI_LOOP; + tx_nbits_supported =3D + virtio_cread8(vdev, offsetof(struct virtio_spi_config, + tx_nbits_supported)); + if ((tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_DUAL) !=3D 0) + ctrl->mode_bits |=3D SPI_TX_DUAL; + if ((tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_QUAD) !=3D 0) + ctrl->mode_bits |=3D SPI_TX_QUAD; + if ((tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_OCTAL) !=3D 0) + ctrl->mode_bits |=3D SPI_TX_OCTAL; + rx_nbits_supported =3D + virtio_cread8(vdev, offsetof(struct virtio_spi_config, + rx_nbits_supported)); + if ((rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_DUAL) !=3D 0) + ctrl->mode_bits |=3D SPI_RX_DUAL; + if ((rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_QUAD) !=3D 0) + ctrl->mode_bits |=3D SPI_RX_QUAD; + if ((rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_OCTAL) !=3D 0) + ctrl->mode_bits |=3D SPI_RX_OCTAL; + + ctrl->bits_per_word_mask =3D + virtio_cread32(vdev, offsetof(struct virtio_spi_config, + bits_per_word_mask)); + + priv->max_freq_hz =3D + virtio_cread32(vdev, offsetof(struct virtio_spi_config, + max_freq_hz)); +} + +static int virtio_spi_find_vqs(struct virtio_spi_priv *priv) +{ + struct virtqueue *vq; + + vq =3D virtio_find_single_vq(priv->vdev, virtio_spi_msg_done, "spi-rq"); + if (IS_ERR(vq)) + return (int)PTR_ERR(vq); + priv->vq =3D vq; + return 0; +} + +/* Function must not be called before virtio_spi_find_vqs() has been run */ +static void virtio_spi_del_vq(struct virtio_device *vdev) +{ + virtio_reset_device(vdev); + vdev->config->del_vqs(vdev); +} + +static int virtio_spi_probe(struct virtio_device *vdev) +{ + struct virtio_spi_priv *priv; + struct spi_controller *ctrl; + int err; + u32 bus_num; + + ctrl =3D devm_spi_alloc_host(&vdev->dev, sizeof(*priv)); + if (!ctrl) + return -ENOMEM; + + priv =3D spi_controller_get_devdata(ctrl); + priv->vdev =3D vdev; + vdev->priv =3D priv; + ctrl->dev.of_node =3D vdev->dev.of_node; + + /* + * Setup ACPI node for controlled devices which will be probed through + * ACPI. + */ + ACPI_COMPANION_SET(&vdev->dev, ACPI_COMPANION(vdev->dev.parent)); + + dev_set_drvdata(&vdev->dev, ctrl); + + err =3D device_property_read_u32(&ctrl->dev, "spi,bus-num", &bus_num); + if (!err && bus_num <=3D S16_MAX) + ctrl->bus_num =3D (s16)bus_num; + else + ctrl->bus_num =3D -1; + + virtio_spi_read_config(vdev); + + ctrl->transfer_one =3D virtio_spi_transfer_one; + + err =3D virtio_spi_find_vqs(priv); + if (err) { + dev_err_probe(&vdev->dev, err, "Cannot setup virtqueues\n"); + return err; + } + + err =3D spi_register_controller(ctrl); + if (err) { + dev_err_probe(&vdev->dev, err, "Cannot register controller\n"); + goto err_return; + } + + return 0; + +err_return: + vdev->config->del_vqs(vdev); + return err; +} + +static void virtio_spi_remove(struct virtio_device *vdev) +{ + struct spi_controller *ctrl =3D dev_get_drvdata(&vdev->dev); + + spi_unregister_controller(ctrl); + virtio_spi_del_vq(vdev); +} + +static int virtio_spi_freeze(struct virtio_device *vdev) +{ + struct device *dev =3D &vdev->dev; + struct spi_controller *ctrl =3D dev_get_drvdata(dev); + int ret; + + ret =3D spi_controller_suspend(ctrl); + if (ret) { + dev_warn(dev, "cannot suspend controller (%d)\n", ret); + return ret; + } + + virtio_spi_del_vq(vdev); + return 0; +} + +static int virtio_spi_restore(struct virtio_device *vdev) +{ + struct device *dev =3D &vdev->dev; + struct spi_controller *ctrl =3D dev_get_drvdata(dev); + int ret; + + ret =3D virtio_spi_find_vqs(vdev->priv); + if (ret) { + dev_err(dev, "problem starting vqueue (%d)\n", ret); + return ret; + } + + ret =3D spi_controller_resume(ctrl); + if (ret) + dev_err(dev, "problem resuming controller (%d)\n", ret); + + return ret; +} + +static struct virtio_device_id virtio_spi_id_table[] =3D { + { VIRTIO_ID_SPI, VIRTIO_DEV_ANY_ID }, + { 0 }, +}; + +static struct virtio_driver virtio_spi_driver =3D { + .driver.name =3D KBUILD_MODNAME, + .driver.owner =3D THIS_MODULE, + .id_table =3D virtio_spi_id_table, + .probe =3D virtio_spi_probe, + .remove =3D virtio_spi_remove, + .freeze =3D pm_sleep_ptr(virtio_spi_freeze), + .restore =3D pm_sleep_ptr(virtio_spi_restore), +}; + +module_virtio_driver(virtio_spi_driver); +MODULE_DEVICE_TABLE(virtio, virtio_spi_id_table); + +MODULE_AUTHOR("Haixu Cui "); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Virtio SPI bus driver"); --=20 2.34.1