From nobody Mon Oct 6 06:39:14 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6AD02EA725; Thu, 24 Jul 2025 15:23:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753370615; cv=none; b=IMkAUImtP+sVzJXUoQYS/yGNZzam7kziA7Vg4nmwK9ouUV6q4cG9ttPjlW4nHp0BiUheKoOGp6MlycOkdb1NFSsDtcbC7UjNprocCae7gW8qKb+j9P5dD3BVgDCWNUg0InP5HaSmodiOShEIaG+Ti7bl5fDjFIcHg3jpFW29l4U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753370615; c=relaxed/simple; bh=+G9z575vTobmVUjKbLCcfdy8/4xi8CShYXQ+DuPWIUw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HhdF/i87DFGFu96HhfBel2u+lSFzXq8NErGmi0NWX8kniiW1N/WFj6jc99HjKrqo4CZYUxpRLx+VRRB21skYL7+DykLF+ziSv0bJFYQ4Q9Nevmy5D0TdpeaXmEwt59929DoIKzSURIl/WN9Acs/gv2fQ6+rY3qQZSb18VQI36ak= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=aIWdVFnT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="aIWdVFnT" Received: by smtp.kernel.org (Postfix) with ESMTPS id 79BA7C113CF; Thu, 24 Jul 2025 15:23:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1753370614; bh=+G9z575vTobmVUjKbLCcfdy8/4xi8CShYXQ+DuPWIUw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=aIWdVFnTYsrCx+rrS4quwpf1AtTXC2GwkDyT9R+Yeh6yvXtFESCLvOkXHsiOjjDz7 mrFuoysv5A4QS0GHY5ORaD+yyB2rnZ43VObUZt85/gCoMScrlTDulUXKnjRKGiAhdA jSfTYUlfvloywELYhn3tsDFSl0r8sXKw82DPx/hYK5ZfuvJfKv2ChcjsCVRtFyha+B vvJPScpRzUEWXV/KJzQ62xIvvkTjEfpbXlEOba3rDd3f2bPQ+8cJk6fc2vcUWu2OVA Ew9TZTjSg2YuBt3B3x9dVY2yDxuVVi8FLt/+DbJqaNjEqP9Ab3VZcf39YfiTFc1p8s KxFKvQ1cR6iQA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 705FAC87FC5; Thu, 24 Jul 2025 15:23:34 +0000 (UTC) From: Aleksa Paunovic via B4 Relay Date: Thu, 24 Jul 2025 17:23:29 +0200 Subject: [PATCH v5 5/7] riscv: hwprobe: Document MIPS xmipsexectl vendor extension Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250724-p8700-pause-v5-5-a6cbbe1c3412@htecgroup.com> References: <20250724-p8700-pause-v5-0-a6cbbe1c3412@htecgroup.com> In-Reply-To: <20250724-p8700-pause-v5-0-a6cbbe1c3412@htecgroup.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Jonathan Corbet Cc: Palmer Dabbelt , Conor Dooley , Djordje Todorovic , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Aleksa Paunovic , Alexandre Ghiti X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1753370612; l=1488; i=aleksa.paunovic@htecgroup.com; s=20250514; h=from:subject:message-id; bh=+gPZ/fNoQiSSWPCUqLgBumEM1NqDdXrfNQZR7V7bk6c=; b=0ws0HFUQbx/6OicMmxR4Fty6PTdRa5VPTDzN+7p1L2+GXfXmDi0Cglc+Jz2IZhzthF5KpPaYr V7ZHPYn1xI0BJSotFQJm8XlvfzYKVQ6AJQ96cK8EJk1zAMVm1SCIj2Q X-Developer-Key: i=aleksa.paunovic@htecgroup.com; a=ed25519; pk=gFVSVYLKAgJiS5qCnDyUMGOFuczv8C6o0UmRs+fgisA= X-Endpoint-Received: by B4 Relay for aleksa.paunovic@htecgroup.com/20250514 with auth_id=403 X-Original-From: Aleksa Paunovic Reply-To: aleksa.paunovic@htecgroup.com From: Aleksa Paunovic Document support for MIPS vendor extensions using the key "RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0" and xmipsexectl vendor extension using the key "RISCV_HWPROBE_VENDOR_EXT_XMIPSEXECTL". Signed-off-by: Aleksa Paunovic Reviewed-by: Alexandre Ghiti --- Documentation/arch/riscv/hwprobe.rst | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/risc= v/hwprobe.rst index 2aa9be272d5de1c15559a978a956bc36c34de81c..2f449c9b15bdd6b9813c9a968de= ca1a4c4ff9b14 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -327,6 +327,15 @@ The following keys are defined: * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED`: Misaligned vec= tor accesses are not supported at all and will generate a misaligned address fault. =20 +* :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_MIPS_0`: A bitmask containing the + mips vendor extensions that are compatible with the + :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior. + + * MIPS + + * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XMIPSEXECTL`: The xmipsexectl ven= dor + extension is supported in the MIPS ISA extensions spec. + * :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0`: A bitmask containing the thead vendor extensions that are compatible with the :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior. --=20 2.34.1