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Thu, 24 Jul 2025 16:25:59 -0700 (PDT) From: David Lechner Date: Thu, 24 Jul 2025 18:25:22 -0500 Subject: [PATCH 1/4] dt-bindings: iio: adc: adi,ad7124: fix clocks properties Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250724-iio-adc-ad7124-proper-clock-support-v1-1-88f35db2fcaf@baylibre.com> References: <20250724-iio-adc-ad7124-proper-clock-support-v1-0-88f35db2fcaf@baylibre.com> In-Reply-To: <20250724-iio-adc-ad7124-proper-clock-support-v1-0-88f35db2fcaf@baylibre.com> To: Michael Hennerich , Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3099; i=dlechner@baylibre.com; h=from:subject:message-id; bh=jipKWVKsFdr1qA0HSPJ1BXNrgw852G9el3ImjeG3Zvw=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBogsDrFQDENobZmWQK6a+NGqu+QL4N715ystTEB RPr8RaRE9eJATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCaILA6wAKCRDCzCAB/wGP wKxRB/41H2jgneOzpdOFI36J/f77O6Dw2Ec9weJ9vDvG/JXo/8XLIk4jD/j5dl2bFOTTSbSCAJJ 7dLjPEjJdBhNUOcBOcVL0pP7FS85zHC8GdOBJ0flD9OBpONj9YKj+YqaFuAibM54pJ/RvoIkCvr 9hkIOn+tMvPyCmn8DAfoX/6Pffvefv0zlFp0s5Ux/5w2gOowJzPgDAi4Ls60bnijG91C2tF78CD iK0peTLAjKvzt1ocXF/uGHsx1Nuvh/5ZU0jRgbQ3EgYbK8lrv3huFRrRxFTZ1277F8pzROTfqJ5 EkluqRgq+YuWcCa732U1tKsC2JDZ5fx3Lbaf66BQfXppfx72 X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 Use correct clocks properties for the AD7124 family of ADCs. These ADCs have an internal clock along with an optional external clock that can be connected to the CLK pin. This pin can be wired up 3 ways: 1. Not connected - the internal clock is used. 2. Connected to an external clock (input) - the external clock is used. 3. Connected to the CLK pin on another ADC (output) - the internal clock is used on one and the other is configured for an external clock. The new bindings describe these 3 cases by picking one of the following: 1. Omit both clocks and #clock-cells properties. 2. Include only the clocks property with a phandle to the external clock. 3. Include only the #clock-cells property on the ADC providing the output. The clock-names property is now deprecated and should not be used. The MCLK signal that it refers to is an internal counter in the ADC and therefore does not make sense as a devicetree property as it can't be connected to anything external to the ADC. Since there is only one possible external clock, the clock-names property is not needed anyway. Based on the implementation of the Linux driver, it looks like the "mclk" clock was basically being used as a control to select the power mode of the ADC, which is not something that should be done in the devicetree. Signed-off-by: David Lechner Reviewed-by: Rob Herring (Arm) --- .../devicetree/bindings/iio/adc/adi,ad7124.yaml | 21 ++++++++++++++++-= ---- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Do= cumentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index 7146a654ae382bac7410ba525dfc98662f0f674a..c4b5e29730d6df58d0c29ed6dc2= 0d250a9af67e6 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -27,12 +27,21 @@ properties: =20 clocks: maxItems: 1 - description: phandle to the master clock (mclk) + description: Optional external clock connected to the CLK pin. =20 clock-names: + deprecated: true + description: + MCLK is an internal counter in the ADC. Do not use this property. items: - const: mclk =20 + '#clock-cells': + description: + The CLK pin can be used as an output. When that is the case, include + this property. + const: 0 + interrupts: description: IRQ line for the ADC maxItems: 1 @@ -66,10 +75,14 @@ properties: required: - compatible - reg - - clocks - - clock-names - interrupts =20 +# Can't have both clock input and output at the same time. +not: + required: + - '#clock-cells' + - clocks + patternProperties: "^channel@([0-9]|1[0-5])$": $ref: adc.yaml @@ -135,8 +148,6 @@ examples: interrupt-parent =3D <&gpio>; rdy-gpios =3D <&gpio 25 GPIO_ACTIVE_LOW>; refin1-supply =3D <&adc_vref>; - clocks =3D <&ad7124_mclk>; - clock-names =3D "mclk"; =20 #address-cells =3D <1>; #size-cells =3D <0>; --=20 2.43.0