From nobody Mon Oct 6 08:24:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C67522DF95; Wed, 23 Jul 2025 19:09:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753297769; cv=none; b=EgchgCELa251xWo31QQsU6NLHWdmywOTfz2Cu/KobGVW6xpyZD0+mmMEzmlgSCDzUXJBBnW3wFFUN2PHs4VY8DbCN0+TH7YELN5OjGnegGAbvjwA71S4nxxaUaT+wGDt3gnAsvfRpUgq/wRKCRIfSij5LY+vpqS/LG0tReJSmeQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753297769; c=relaxed/simple; bh=EqnQS3pdLe9lVyvht1V5158PQzo2LAsPB5SdLoAewO4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dCOvM3qaHh/4HuhqrjN2XIW3td5Uw0FG9y9RCLARCFmvlRLk6WhZI7hhMsV/MrEGGewXyPEQp2HDwWae9dSPYSs5nf9w64z8qrdwxiDTvt/G2WARVhtppsVUzXkqGm94U3xLHEUMPZ0kNUGXpnxiDwAIl9Ez4lmmxRAQKCWqi1w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=SNMkLQUP; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="SNMkLQUP" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=tdrUjybWdgGgWiceS53q5t4Jfab18qZEI3ZHbcKrC6w=; b=SNMkLQUPhwUHCbJci3nswprMPt S79mppNui8kWpR3h/OhtXin11vAiz4vNLj69pwW4s3d1zysvVswFvPEVsslXoXL63z1pt+PERZp5X pxLx4u0GwRSCC/cc6h6grQBmzpvPD9OGaPv3knKJIjjVzIy6wa+qz3A/zM44EnEyqlva0eOTqJOdn iinCn+QYLNcZMCgMtZtIHxkxrT2nAoRzPfRnAz8XGQse3Gmx5HGjTbfdGDpKFdO+n4Mi+iCvkf2q6 DuQ4qA3kDnSf8DPeZzH4XfBJGFoTmKx7YW76dv727A9yir1wssJ44JOhuNlQXoNWGozv0/XVdYXaM UAMI6DlQ==; Received: from i53875aba.versanet.de ([83.135.90.186] helo=phil..) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ueeq1-0007Mn-VE; Wed, 23 Jul 2025 21:09:14 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, damon.ding@rock-chips.com, Heiko Stuebner Subject: [PATCH v2 2/2] arm64: dts: rockchip: add RK3588 DP carrier from Theobroma Systems Date: Wed, 23 Jul 2025 21:09:04 +0200 Message-ID: <20250723190904.37792-3-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250723190904.37792-1-heiko@sntech.de> References: <20250723190904.37792-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner The DisplayPort carrier is a very simple baseboard only providing serial, ethernet and a displayport output. But its main functionality is that it routes the Analogix eDP controller to this DisplayPort output, which allows to test that controller simply by hooking it up to a suitable monitor. The Analogix-DP controller supports eDP 1.3 and DP 1.2, so can drive both eDP displays as well as full DP monitors. It does not support DP+ so passive DP-to-HDMI adapters won't work. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../rk3588-tiger-displayport-carrier.dts | 109 ++++++++++++++++++ 2 files changed, 110 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-tiger-displayport-c= arrier.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 7946bec10670..a1acde3c23fa 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -176,6 +176,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-dsi1-fh= d10.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-ep.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-srns.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-displayport-carrier.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-video-demo.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-toybrick-x0.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3588-tiger-displayport-carrier.= dts b/arch/arm64/boot/dts/rockchip/rk3588-tiger-displayport-carrier.dts new file mode 100644 index 000000000000..025b2853c708 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-tiger-displayport-carrier.dts @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Cherry Embedded Solutions GmbH + */ + +/dts-v1/; +#include +#include "rk3588-tiger.dtsi" + +/ { + model =3D "Theobroma Systems RK3588-Q7 SoM on Tiger Displayport Carrier v= 1"; + compatible =3D "tsd,rk3588-tiger-displayport-carrier", "tsd,rk3588-tiger"= , "rockchip,rk3588"; + + aliases { + ethernet0 =3D &gmac0; + }; + + chosen { + stdout-path =3D "serial2:115200n8"; + }; + + dp-connector { + compatible =3D "dp-connector"; + dp-pwr-supply =3D <&vcc3v3_baseboard>; + /* Q7_DP_HPD# but Q7_HDMI_HPD# could be used too */ + hpd-gpios =3D <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>; + label =3D "dp0"; + pinctrl-0 =3D <&edp0_hpd_l>; + pinctrl-names =3D "default"; + type =3D "full-size"; + + port { + dp_con_in: endpoint { + remote-endpoint =3D <&edp0_out_con>; + }; + }; + }; + + vcc3v3_baseboard: regulator-vcc3v3-baseboard { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_baseboard"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc5v0_baseboard>; + }; + + vcc5v0_baseboard: regulator-vcc5v0-baseboard { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_baseboard"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; +}; + +&edp0 { + status =3D "okay"; +}; + +&edp0_in { + edp0_in_vp2: endpoint { + remote-endpoint =3D <&vp2_out_edp0>; + }; +}; + +&edp0_out { + edp0_out_con: endpoint { + remote-endpoint =3D <&dp_con_in>; + }; +}; + +&gmac0 { + status =3D "okay"; +}; + +&hdptxphy0 { + status =3D "okay"; +}; + +&pinctrl { + edp0 { + edp0_hpd_l: edp0-hpd-l-pin { + rockchip,pins =3D <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&uart2 { + pinctrl-0 =3D <&uart2m2_xfer>; + status =3D "okay"; +}; + +&vop { + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vp2 { + vp2_out_edp0: endpoint@ROCKCHIP_VOP2_EP_EDP0 { + reg =3D ; + remote-endpoint =3D <&edp0_in_vp2>; + }; +}; --=20 2.47.2