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Wed, 23 Jul 2025 09:45:29 -0400 (EDT) From: Michael Zhivich To: , CC: , , , , , Michael Zhivich Subject: [PATCH v3 5.10] x86/bugs: Fix use of possibly uninit value in amd_check_tsa_microcode() Date: Wed, 23 Jul 2025 09:45:28 -0400 Message-ID: <20250723134528.2371704-1-mzhivich@akamai.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <2025072219-mulberry-shallow-da0d@gregkh> References: <2025072219-mulberry-shallow-da0d@gregkh> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-23_02,2025-07-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 malwarescore=0 adultscore=0 phishscore=0 bulkscore=0 mlxscore=0 suspectscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2505160000 definitions=main-2507230116 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzIzMDExNyBTYWx0ZWRfXyMhs4kzGJL9f pwC+x3rZ5uAm0vYUhINGM3UxHBKU7x+JbocJIYRM/ypq1n7CyTE2UVkXfek1SO2GiNfKe+942sj AU06FUaPFIiNp0PXsZQITegMp+PpAPGj4sKC0oFyukDapfOu8ElcQV+RaF7SlmgtqzZLf5QRKk3 ax2Rqx4UFSYdOdbwY/02ZmlyfW3Ml4zn5BulAGWaFtStzVHupvApkD9regTMdWLMBCYQoerM9nM Fh5QCfDRxl9MxicJPaDxytteegVVrMy/dtlX5pB02rnKQath2aX0wJUAFU/DZJjlj3TH+n92ftR tVYbBYMCFuoWWl/9Kc3QWSzVFcFfnv0ghJHxFrJESSpKgTyKWh1hdlCSBjPsLbox+LhKS2hHa/T xKEksvWu4HNris0Z4vuFEj0J76RK8Id8cdnnJDenlMUAJC1c4KJtRT8HledwbWV106wV8M3p X-Authority-Analysis: v=2.4 cv=Q47S452a c=1 sm=1 tr=0 ts=6880e77b cx=c_pps a=YfDTZII5gR69fLX6qI1EXA==:117 a=YfDTZII5gR69fLX6qI1EXA==:17 a=Wb1JkmetP80A:10 a=VwQbUJbxAAAA:8 a=X7Ea-ya5AAAA:8 a=QyML1Wa_BHPz27VLx9cA:9 X-Proofpoint-GUID: Mayf9SbuCWdRorcEN7Zs557DueXlMNKm X-Proofpoint-ORIG-GUID: Mayf9SbuCWdRorcEN7Zs557DueXlMNKm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-23_02,2025-07-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 impostorscore=0 spamscore=0 bulkscore=0 mlxscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 malwarescore=0 mlxlogscore=937 phishscore=0 priorityscore=1501 suspectscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507230117 Content-Type: text/plain; charset="utf-8" For kernels compiled with CONFIG_INIT_STACK_NONE=3Dy, the value of __reserv= ed field in zen_patch_rev union on the stack may be garbage. If so, it will prevent correct microcode check when consulting p.ucode_rev, resulting in incorrect mitigation selection. This is a stable-only fix. Cc: Signed-off-by: Michael Zhivich Fixes: 78192f511f40 ("x86/bugs: Add a Transient Scheduler Attacks mitigatio= n") --- Changes in v3: - separate "fixes" tag for each stable arch/x86/kernel/cpu/amd.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index e67d7603449b..bf07b2c5418a 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -599,6 +599,8 @@ static bool amd_check_tsa_microcode(void) p.model =3D c->x86_model; p.ext_model =3D c->x86_model >> 4; p.stepping =3D c->x86_stepping; + /* reserved bits are expected to be 0 in test below */ + p.__reserved =3D 0; =20 if (c->x86 =3D=3D 0x19) { switch (p.ucode_rev >> 8) { --=20 2.34.1