From nobody Mon Oct 6 10:18:46 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA7D12E62AE for ; Wed, 23 Jul 2025 12:24:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=149.28.215.223 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753273448; cv=none; b=QppjEGC3QDN0G5Ch88BcmEMl/5PVQdptneBpMFWCWEoCGq6cKCuCSvMs6M8m1nUQnCG+bpIjjtsSa5odQx5Qlba+W0afbVx5+VR/HNkIH9j/UrGoixt2Q+oOMswLs0MYYRjswwg3js1JjKzd2iwGu5BeW2wPv8V8OUA/wEYZYII= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753273448; c=relaxed/simple; bh=2Jya7pUfKAWJ/U8l3GPpaZEcvhIGMg4t5jrBtXKZZtU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l+F55/LEwYSUAMPHtXwQxbG77TmzZNhvE8h2GliQSFzZS40ZLhUlZJnPpzfzyYCjzNr4WmfBjoM8y4VGgaPHl52JZwNGTRCObrPh0Cd/dKW5nvsx4epqSb7OFmRsCH5sKjQNEGjYnXmn1M2nOT/CeXwwIWml0zlNJ3o0A+2aUOk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=Jn1fRnSh; arc=none smtp.client-ip=149.28.215.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="Jn1fRnSh" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1753273446; bh=qM2kjDv8yiHdNanOkkqrr4uaRt3f/qugOPAoj2T+6O4=; b=Jn1fRnSh4dC345R50VEfAy2Y30RRFQRS/4uk4XvHExE1ryzKlNVkUyr6U6S5/tRheEAYoj43i qyyHcxIkKjvzjDMQtYH2JRYMcChELKMUdv+9xF36zXl0dcre7VBdWvhSNmXoGtIR6XcReSQbG9t WnDS1vlVTINOsXxpCo1W5q09xtLTZJU1h1dfe4G0vGCZn8M1FWO52bt9z8KUlokV9YD1xmEnUXr 2oESliPBVNRUliUDY0tRHu9Yqgh+Hm2rX9vAiQ5KoX2gCUMfgd7eBSdntVVqbyCgCvZVQsqx1F+ mKZj9kHHB54Kc9OEQRSezmfhOIYBskDpDITpFG93VTZQ== X-Forward-Email-ID: 6880d460cb0ee86f9731a0f5 X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-Forward-Email-Version: 1.1.6 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I Cc: Yao Zi , Chukun Pan , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH 07/11] arm64: dts: rockchip: Add USB nodes for RK3528 Date: Wed, 23 Jul 2025 12:23:05 +0000 Message-ID: <20250723122323.2344916-8-jonas@kwiboo.se> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250723122323.2344916-1-jonas@kwiboo.se> References: <20250723122323.2344916-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rockchip RK3528 has one USB 3.0 DWC3 controller, a USB 2.0 EHCI/OHCI controller and uses a USB2PHY for USB 2.0. The DWC3 controller may also use the Naneng Combo PHY for USB3. Add device tree nodes to describe these USB controllers along with the USB 2.0 PHYs. Signed-off-by: Jonas Karlman --- The DWC3 node does not contain any default phys because out of current and pending supported boards only one board, ROCK 2A, can use USB3. Remaining boards use the Naneng Combo PHY for PCIe instead of USB3. --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 76 ++++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts= /rockchip/rk3528.dtsi index 85bc3f5aa2c7..3e51a3f51e05 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -243,6 +243,29 @@ soc { #address-cells =3D <2>; #size-cells =3D <2>; =20 + usb_host0_xhci: usb@fe500000 { + compatible =3D "rockchip,rk3528-dwc3", "snps,dwc3"; + reg =3D <0x0 0xfe500000 0x0 0x400000>; + clocks =3D <&cru CLK_REF_USB3OTG>, + <&cru CLK_SUSPEND_USB3OTG>, + <&cru ACLK_USB3OTG>; + clock-names =3D "ref_clk", "suspend_clk", "bus_clk"; + interrupts =3D ; + power-domains =3D <&power RK3528_PD_VPU>; + resets =3D <&cru SRST_A_USB3OTG>; + dr_mode =3D "otg"; + phy_type =3D "utmi_wide"; + snps,dis_enblslpm_quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; + status =3D "disabled"; + }; + gic: interrupt-controller@fed01000 { compatible =3D "arm,gic-400"; reg =3D <0x0 0xfed01000 0 0x1000>, @@ -256,6 +279,30 @@ gic: interrupt-controller@fed01000 { #interrupt-cells =3D <3>; }; =20 + usb_host0_ehci: usb@ff100000 { + compatible =3D "generic-ehci"; + reg =3D <0x0 0xff100000 0x0 0x40000>; + clocks =3D <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>, + <&u2phy>; + interrupts =3D ; + phys =3D <&u2phy_host>; + phy-names =3D "usb"; + power-domains =3D <&power RK3528_PD_VO>; + status =3D "disabled"; + }; + + usb_host0_ohci: usb@ff140000 { + compatible =3D "generic-ohci"; + reg =3D <0x0 0xff140000 0x0 0x40000>; + clocks =3D <&cru HCLK_USBHOST>, <&cru HCLK_USBHOST_ARB>, + <&u2phy>; + interrupts =3D ; + phys =3D <&u2phy_host>; + phy-names =3D "usb"; + power-domains =3D <&power RK3528_PD_VO>; + status =3D "disabled"; + }; + qos_crypto_a: qos@ff200000 { compatible =3D "rockchip,rk3528-qos", "syscon"; reg =3D <0x0 0xff200000 0x0 0x20>; @@ -1109,6 +1156,35 @@ dmac: dma-controller@ffd60000 { #dma-cells =3D <1>; arm,pl330-periph-burst; }; + + u2phy: usb2phy@ffdf0000 { + compatible =3D "rockchip,rk3528-usb2phy"; + reg =3D <0x0 0xffdf0000 0x0 0x10000>; + clocks =3D <&cru CLK_REF_USBPHY>, <&cru PCLK_USBPHY>; + clock-names =3D "phyclk", "pclk"; + #clock-cells =3D <0>; + clock-output-names =3D "clk_usbphy_480m"; + power-domains =3D <&power RK3528_PD_VO>; + rockchip,usbgrf =3D <&vo_grf>; + status =3D "disabled"; + + u2phy_otg: otg-port { + interrupts =3D , + , + ; + interrupt-names =3D "otg-bvalid", "otg-id", + "linestate"; + #phy-cells =3D <0>; + status =3D "disabled"; + }; + + u2phy_host: host-port { + interrupts =3D ; + interrupt-names =3D "linestate"; + #phy-cells =3D <0>; + status =3D "disabled"; + }; + }; }; }; =20 --=20 2.50.1