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client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by CY4PEPF0000FCBF.mail.protection.outlook.com (10.167.242.101) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8964.20 via Frontend Transport; Tue, 22 Jul 2025 15:41:27 +0000 Received: from SATLEXMB06.amd.com (10.181.40.147) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 22 Jul 2025 10:41:26 -0500 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB06.amd.com (10.181.40.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 22 Jul 2025 10:41:25 -0500 Received: from xhdvineethc40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Tue, 22 Jul 2025 10:41:22 -0500 From: Vineeth Karumanchi To: , , , , , , CC: , , , Subject: [PATCH net-next 3/6] net: macb: Add IEEE 802.1Qbv TAPRIO REPLACE command offload support Date: Tue, 22 Jul 2025 21:11:08 +0530 Message-ID: <20250722154111.1871292-4-vineeth.karumanchi@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250722154111.1871292-1-vineeth.karumanchi@amd.com> References: <20250722154111.1871292-1-vineeth.karumanchi@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCBF:EE_|DS0PR12MB8245:EE_ X-MS-Office365-Filtering-Correlation-Id: 257b4059-f055-43ca-3ccc-08ddc9363898 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|82310400026|36860700013; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jul 2025 15:41:27.0524 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 257b4059-f055-43ca-3ccc-08ddc9363898 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCBF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8245 Content-Type: text/plain; charset="utf-8" Implement Time-Aware Traffic Scheduling (TAPRIO) hardware offload for "tc qdisc replace" operations, enabling IEEE 802.1Qbv compliant gate scheduling on Cadence MACB/GEM controllers. Parameter validation checks performed: - Queue count bounds checking (1 < queues <=3D MACB_MAX_QUEUES) - TC entry limit validation against available hardware queues - Base time non-negativity enforcement - Speed-adaptive timing constraint verification - Cycle time vs. total gate time consistency checks - Single-queue gate mask enforcement per scheduling entry Hardware programming sequence: - GEM doesn't support changing register values if ENST is running, hence disable ENST before programming - Atomic timing register configuration (START_TIME, ON_TIME, OFF_TIME) - Enable the configured queues via ENST_CONTROL register This implementation ensures deterministic gate scheduling while preventing invalid configurations. Signed-off-by: Vineeth Karumanchi --- drivers/net/ethernet/cadence/macb_main.c | 155 +++++++++++++++++++++++ 1 file changed, 155 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/etherne= t/cadence/macb_main.c index ff87d3e1d8a0..4518b59168d5 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -36,6 +36,7 @@ #include #include #include +#include #include "macb.h" =20 /* This structure is only used for MACB on SiFive FU540 devices */ @@ -4084,6 +4085,160 @@ static void macb_restore_features(struct macb *bp) macb_set_rxflow_feature(bp, features); } =20 +static int macb_taprio_setup_replace(struct net_device *ndev, + struct tc_taprio_qopt_offload *conf) +{ + u64 total_on_time =3D 0, start_time_sec =3D 0, start_time =3D conf->base_= time; + struct queue_enst_configs *enst_queue; + u32 configured_queues =3D 0, speed =3D 0; + struct tc_taprio_sched_entry *entry; + struct macb *bp =3D netdev_priv(ndev); + struct ethtool_link_ksettings kset; + struct macb_queue *queue; + unsigned long flags; + int err =3D 0, i; + + /* Validate queue configuration */ + if (bp->num_queues < 1 || bp->num_queues > MACB_MAX_QUEUES) { + netdev_err(ndev, "Invalid number of queues: %d\n", bp->num_queues); + return -EINVAL; + } + + if (conf->num_entries > bp->num_queues) { + netdev_err(ndev, "Too many TAPRIO entries: %lu > %d queues\n", + conf->num_entries, bp->num_queues); + return -EINVAL; + } + + if (start_time < 0) { + netdev_err(ndev, "Invalid base_time: must be 0 or positive, got %lld\n", + conf->base_time); + return -ERANGE; + } + + /* Get the current link speed */ + err =3D phylink_ethtool_ksettings_get(bp->phylink, &kset); + if (unlikely(err)) { + netdev_err(ndev, "Failed to get link settings: %d\n", err); + return err; + } + + speed =3D kset.base.speed; + if (unlikely(speed <=3D 0)) { + netdev_err(ndev, "Invalid speed: %d\n", speed); + return -EINVAL; + } + + enst_queue =3D kcalloc(conf->num_entries, sizeof(*enst_queue), GFP_KERNEL= ); + if (!enst_queue) + return -ENOMEM; + + /* Pre-validate all entries before making any hardware changes */ + for (i =3D 0; i < conf->num_entries; i++) { + entry =3D &conf->entries[i]; + + if (entry->command !=3D TC_TAPRIO_CMD_SET_GATES) { + netdev_err(ndev, "Entry %d: unsupported command %d\n", + i, entry->command); + err =3D -EOPNOTSUPP; + goto cleanup; + } + + /* Validate gate_mask: must be nonzero, single queue, and within range */ + if (!is_power_of_2(entry->gate_mask)) { + netdev_err(ndev, "Entry %d: gate_mask 0x%x is not a power of 2 (only on= e queue per entry allowed)\n", + i, entry->gate_mask); + err =3D -EINVAL; + goto cleanup; + } + + /* gate_mask must not select queues outside the valid queue_mask */ + if (entry->gate_mask & ~bp->queue_mask) { + netdev_err(ndev, "Entry %d: gate_mask 0x%x exceeds queue range (max_que= ues=3D%d)\n", + i, entry->gate_mask, bp->num_queues); + err =3D -EINVAL; + goto cleanup; + } + + /* Check for start time limits */ + start_time_sec =3D div_u64(start_time, NSEC_PER_SEC); + if (start_time_sec > ENST_MAX_START_TIME_SEC) { + netdev_err(ndev, "Entry %d: Start time %llu s exceeds hardware limit\n", + i, start_time_sec); + err =3D -ERANGE; + goto cleanup; + } + + /* Check for on time limit*/ + if (entry->interval > ENST_MAX_HW_INTERVAL(speed)) { + netdev_err(ndev, "Entry %d: interval %u ns exceeds hardware limit %lu n= s\n", + i, entry->interval, ENST_MAX_HW_INTERVAL(speed)); + err =3D -ERANGE; + goto cleanup; + } + + /* Check for off time limit*/ + if ((conf->cycle_time - entry->interval) > ENST_MAX_HW_INTERVAL(speed)) { + netdev_err(ndev, "Entry %d: off_time %llu ns exceeds hardware limit %lu= ns\n", + i, conf->cycle_time - entry->interval, + ENST_MAX_HW_INTERVAL(speed)); + err =3D -ERANGE; + goto cleanup; + } + + enst_queue[i].queue_id =3D order_base_2(entry->gate_mask); + enst_queue[i].start_time_mask =3D + (start_time_sec << GEM_START_TIME_SEC_OFFSET) | + (start_time % NSEC_PER_SEC); + enst_queue[i].on_time_bytes =3D + ENST_NS_TO_HW_UNITS(entry->interval, speed); + enst_queue[i].off_time_bytes =3D + ENST_NS_TO_HW_UNITS(conf->cycle_time - entry->interval, speed); + + configured_queues |=3D entry->gate_mask; + total_on_time +=3D entry->interval; + start_time +=3D entry->interval; + } + + /* Check total interval doesn't exceed cycle time */ + if (total_on_time > conf->cycle_time) { + netdev_err(ndev, "Total ON %llu ns exceeds cycle time %llu ns\n", + total_on_time, conf->cycle_time); + err =3D -EINVAL; + goto cleanup; + } + + netdev_dbg(ndev, "TAPRIO setup: %lu entries, base_time=3D%lld ns, cycle_t= ime=3D%llu ns\n", + conf->num_entries, conf->base_time, conf->cycle_time); + + /* All validations passed - proceed with hardware configuration */ + spin_lock_irqsave(&bp->lock, flags); + + /* Disable ENST queues if running before configuring */ + if (gem_readl(bp, ENST_CONTROL)) + gem_writel(bp, ENST_CONTROL, + GENMASK(bp->num_queues - 1, 0) << GEM_ENST_DISABLE_QUEUE_OFFSET); + + for (i =3D 0; i < conf->num_entries; i++) { + queue =3D &bp->queues[enst_queue[i].queue_id]; + /* Configure queue timing registers */ + queue_writel(queue, ENST_START_TIME, enst_queue[i].start_time_mask); + queue_writel(queue, ENST_ON_TIME, enst_queue[i].on_time_bytes); + queue_writel(queue, ENST_OFF_TIME, enst_queue[i].off_time_bytes); + } + + /* Enable ENST for all configured queues in one write */ + gem_writel(bp, ENST_CONTROL, configured_queues); + spin_unlock_irqrestore(&bp->lock, flags); + + netdev_info(ndev, "TAPRIO configuration completed successfully: %lu entri= es, %d queues configured\n", + conf->num_entries, hweight32(configured_queues)); + +cleanup: + kfree(enst_queue); + return err; +} + static const struct net_device_ops macb_netdev_ops =3D { .ndo_open =3D macb_open, .ndo_stop =3D macb_close, --=20 2.34.1