From nobody Mon Oct 6 10:16:38 2025 Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D172C2E9EB5; Tue, 22 Jul 2025 12:23:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753187040; cv=none; b=Uod0Jdi7rdEJNh7DDvy6oq+PrBJvDqivXtlwKRmN4y4JDyFEakMGYzCKAumiayYgQ03JuUg+WEBJV+mm1owYCl57ks0pPCcAbl5rIJCAvyt2Y75Pr6A4wy32LkCLzfU32Sk1cr01WMMK1tJDZKC38kmJ1t59KSZvuPRUBa+kF8U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753187040; c=relaxed/simple; bh=FmLmE+8nBafxnmHHI4eeweDp/+UEwWij9y8h0gusMGk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=k03XDVUyqst31Jy2wizLM2Nrl/bv2QYB1y/I0UsWIVuiFlyS6flJ+9RzHl84NVEAKTmEhRj+8+WKfqh6o0ppGWN5aHLsUpaxiIXSuTj2Am18p+n3UIX4wrOEXdrtTgTnB1WXLoBdsPO/LZyNAP3nbFQuFcAGwL6nPl6dFlAmVS0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=fsixmWCa; arc=none smtp.client-ip=209.85.208.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="fsixmWCa" Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-604bff84741so9667715a12.2; Tue, 22 Jul 2025 05:23:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1753187037; x=1753791837; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bb0r5Zm6I8Szf8jWYWHBvZVhi8hKX4btISpujVINzRY=; b=fsixmWCao+2m1RZnkfmyEx1TgNu7/DdIe+Zw9O1qz0U4Ua/X5OqY7CsFjF/zR29K0L NpAYbaxYCCBMSSUtZXcH7ODTxGtYPA2WJ6A4lkyvz6HfdMAM31Nw+FjJtq6V8elQmmVF 86CJ7CNPplUE/KRBPm2FWEhS19eA9C0s2jkrsi6YVybR0pZkZyCV1Sg3csI2CJ5iraac jFXpTXA+FpeUyZxYayTxMzwKzHOsFzqclwXnmfWeKLNRLqBoPc82Wfdfmqe1de3DJtfE rREl+wi7jJc4RotG8vHZuo2e8yqBnQY/RKvtrpiwDp+D8VW0Nua/pN0cmXt4xe2HvyTq 0VkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753187037; x=1753791837; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bb0r5Zm6I8Szf8jWYWHBvZVhi8hKX4btISpujVINzRY=; b=WiXrAXviL+VKMO7Xw84Nh6eeLYC8XoiO3MypRha0/39oTY4/8M64n+8+mbdPAZ50mL YjOx9seoHubuPYlN+eb/KbAWRCgcDI/2BnEL7oVz0Iz06rAE40MN/kfTeIYt5y4gZjn5 HMAqdfzG5xuNuE7cs1W/e8BeoLx5MrLACxSHrFZjd6Wbrwx5Ehj8vUlWwCLVev7jQBnn 7NeS39N02gW3HRwm49s/B7MrBACNJVu8iJN7/yElY2qBwYcEyHqz5xjazojkRYvsnTl+ 1czK4B0yA7DIA4aji9j9mXGaVV7k16zC+cz6E+FPsYkdCytZIoIxEBpnFTCHt79hIoPU WOnA== X-Forwarded-Encrypted: i=1; AJvYcCWN51hY+Y7+NXR1Cl8924J6zocTzTORsPPnplQampH/I1HLhD+2XZggjQTrpIrcD3+2J1PfBqOUqZZaGljK@vger.kernel.org, AJvYcCX836Q9hC7UH083luGq/EXllly4wSby3dsaAs6fWZYh6R4TCNS0KIpWLBfEcLRlQzuL3IaSjyhNIRHb@vger.kernel.org X-Gm-Message-State: AOJu0Yw87LkuAa8PG+ZUduU1Dxrm4vMK0X2p2blN5ZMW6UuawlpFKhK5 KQi+6WMxqDj26+V+Bc1JHoanzwf3454+DrfZ1kfVQ6CMw0WMdY8BZvb2SQJ8WA== X-Gm-Gg: ASbGncup+LNZVl0/U1WT+dWOZ+XVNaS4zYdgAXhw/WI0ruISXRCadMV6rRoLbiCG/vi bPX74Jc3SzdPmW9mhT4FYZZQfGnHvLU7vvRCLhaK8u4rdGMk0q31Ww4V/QqV1CCd3PFL7aIybdp WgazKiPr5say0T2pgCLKneJUE+EGhSEXrFq1pKJ/XecD3MI4MVXRdlsUuHpVnfV9/jL0/HnANVg PMnNQQHNUf2IJ2hgzDQ8QHsDiC92PhpqUbaNZT+fwH2m7WnFBwlbYPPtDkK+N9Y8A6drVA9aMCR IsOnGV63/NW54MHq80YtZ5jXg6Rg1fkMZKCJI0Ikil4BqjV9BfRF8m17kr9FJUxAm6zMYYKUchI j5FJO/bhDNGqIliraKGJS/oXbdT/Zmif2rfCdxpjLlpfIC3w9pYyOtnXGN0upXIFf+ycRVgpZ7A == X-Google-Smtp-Source: AGHT+IF+NKTSzIYSgh6nyT2wXOJlD/Wp8WpRnKhaJeDZaSgHyAa7CqtI6ndxuhg7gUyHY3hN1foHLQ== X-Received: by 2002:a17:906:9f91:b0:ae0:ce90:4b6c with SMTP id a640c23a62f3a-aec6a623c37mr1731618166b.49.1753187036792; Tue, 22 Jul 2025 05:23:56 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aec6c79a056sm861358466b.14.2025.07.22.05.23.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Jul 2025 05:23:56 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/4] arm64: dts: exynos2200: fix typo in hsi2c23 bus pins label Date: Tue, 22 Jul 2025 15:23:47 +0300 Message-ID: <20250722122350.444019-2-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250722122350.444019-1-ivo.ivanov.ivanov1@gmail.com> References: <20250722122350.444019-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The '2' in 'hsi2c23' was missed while making the device tree. Fix that so we can properly reference the node. Signed-off-by: Ivaylo Ivanov --- arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi b/arch/arm6= 4/boot/dts/exynos/exynos2200-pinctrl.dtsi index f618ff290..5877da7ba 100644 --- a/arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos2200-pinctrl.dtsi @@ -1438,7 +1438,7 @@ i3c11_bus: i3c11-bus-pins { samsung,pin-drv =3D ; }; =20 - hsi223_bus: hsi2c23-bus-pins { + hsi2c23_bus: hsi2c23-bus-pins { samsung,pins =3D "gpp11-2", "gpp11-3"; samsung,pin-function =3D ; samsung,pin-pud =3D ; --=20 2.43.0 From nobody Mon Oct 6 10:16:38 2025 Received: from mail-ej1-f41.google.com (mail-ej1-f41.google.com [209.85.218.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68A2E2E9EC4; Tue, 22 Jul 2025 12:24:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753187042; cv=none; b=ZF5/bcJwp2L0r/7k6rG7jhQtEYswLY1oU3D7aaD9FGFQoiNG0OyAg7KclaJ3P9NLxgar2zQa/tXgfBWFDg4oWliiSQkoFkJIWB5CgPewyB5+f68jNfln53fFD5LL7wMfJjh6WcpYchsvxBIefZUQO6UpJFn4jHDPCu3I1pZK63k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753187042; c=relaxed/simple; bh=D6lWi0SFMm3ZeiAM6hICX8hB7Dg05k1FCatK9Zt+nHQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hxD5PYUK+ythyPZrxEi3NPnvzCd4wniSTgdxkb4TcO/+sniehdzw5TannjzbVwkLXEHW93+eTd9THyV7X9WEJ/vjlQKqvGv7HesUAj4FTOU3U8aJnyEEo5XKoIw7yxoXi5GK91waJ7Wjs1vEnWM1gOhKMgLZdVvGY53kwjz9pKk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=G/KmS0uv; arc=none smtp.client-ip=209.85.218.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="G/KmS0uv" Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-ae0dd7ac1f5so981989066b.2; Tue, 22 Jul 2025 05:24:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1753187039; x=1753791839; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=y4/g0FAwfoBc1ZpFJ33DL+FpXxKqFt7haerTzfBfI18=; b=G/KmS0uvgDQEvhqBGgm8rqI+gK0b4mnzfClKlP/z8mjUFtbwQlYPDte3ZaukVjQMSS u+tnuDStS6Sm12Bd72aa86UkIsQLB6q6pwx1+0wX1behU6R5Zgmr3AQdLVzAo5L9oxrE RkoFJ2iO2HfxgUmhEv9nrDVs3Y8d1CGZIVJ8NFs/7np2bI1LZCmUMbTHonBLCMSsn/iR Ytivh8NbqCSXMoeDeOq57hPasRPbzk4ej7MNTM5/WA15tYyW+UJq5E7yld36EzL30wVt qS0KPXP/SgvVlzrLDgqwX52q2A0yWYmUL6D03FjGXFjZy0Vlj8i7/NR+oxk3DAuzsrLY Fumw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753187039; x=1753791839; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=y4/g0FAwfoBc1ZpFJ33DL+FpXxKqFt7haerTzfBfI18=; b=gejkRY0OxUzLzpGdjy8B3oJ7xczDE02aome7kN2vP/jq6u/z2fVA2Emzroh+LgEn+V 4Ol3zqx/lWy5yQi/K0SNLhUyX4NCM7HQ3iPWPx2VYGEv4vQSshbnYZYU+xD3GzBD1rq1 yZ8WQGXyYEe5WV7iUarG54olOB17ZaUHuEDsuJTAthLmKYBwrhvzbNXY8ISXtdpbEyKN i+k5scj8NsMEDftiW6UoJkWFhhwTyPQ1r0cLxw/XH2VJgwiZzV4s8esoFWEoxavPZH/H RIlbiqQc6PjVMt6XhSPthRRT2tDgjP/vmvFFS//0/4qMLBqIRooBsUGBc/op4TEVSq6t m1yA== X-Forwarded-Encrypted: i=1; AJvYcCUSuIVhReyIbAriFkgk8CK2h5XnJfvWfPIqsfoB36xD8bDLGIpVQvoDoEhSpH1xFkT4uLPYYdjf/7ExmP5t@vger.kernel.org, AJvYcCUzMLDV8WQBkfFJ7x78rcNlb3RREdNgX4ui1xf+H8mX+P5/4R846bBT0Q3iN10LIZpkb6YLTYO6xqPY@vger.kernel.org X-Gm-Message-State: AOJu0YxU17rhUPN5497/edUgTO0qE6T2KRifE4v9+z/auwpmt5v9oLcO n+UeK0FcausMArs6RUuF776q4JHUPPUO4P6Hf/lChVvdotCBbpleOcbx X-Gm-Gg: ASbGncspk/eVC3+3oX8Yj6J+qimdV0Lccvgfvoq+y0hA5oKIkHtoc8QzW4jtbf5BVVS xx2EJ3EZwBCeSQHBsH4ZRLesIYvPFE8obd0Er6bM2X+wpPi1SaMuRGDumKYB9M4hmF17KM6sK4C nKTtQmeTkkLv3BAxN3hmW1cP0oxISnGf2rW0pNTv+Q6BtWfy5TyIzXnXjOynt2HRFnNSMxnaw5W LP7eBes6cVCnY4ddhZf02XZj9VzCYZgpKNajR6R2YSB+BFV7FtvDojaqfu7DWS9GEzmhMY9ADCP rORIYVrayt9MkUOA/Vk9ZkC/TaYYizbj4Qgyt/Vlr22NKq1JfstdcOoZB/1r8uWPjHdUxnWfXQW REXJ6uKzN9Ph2ic6WbF+uh1UrnfBXsLGiOCC+9C/rs6Tr6uqbLnqx97UszmYhS7rIr2YEGk8BZQ == X-Google-Smtp-Source: AGHT+IH/0+iq7EeyZ4cfQy0vOAyEo4RQDQZWMuHPMyzOjkIohP5ikawHhzp0OBmAfeBSqYEsgXzC1A== X-Received: by 2002:a17:906:c114:b0:ae3:e378:159e with SMTP id a640c23a62f3a-aec6a528140mr1630162366b.26.1753187038334; Tue, 22 Jul 2025 05:23:58 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aec6c79a056sm861358466b.14.2025.07.22.05.23.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Jul 2025 05:23:58 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/4] arm64: dts: exynos2200: increase peric1 and cmgp syscon sizes Date: Tue, 22 Jul 2025 15:23:48 +0300 Message-ID: <20250722122350.444019-3-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250722122350.444019-1-ivo.ivanov.ivanov1@gmail.com> References: <20250722122350.444019-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some USI instances have swconfig offsets that reside over the currently defined syscon ranges for peric1 and cmgp. Increase their sizes. Signed-off-by: Ivaylo Ivanov --- arch/arm64/boot/dts/exynos/exynos2200.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/d= ts/exynos/exynos2200.dtsi index 6b5ac02d0..3fa183c5d 100644 --- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi @@ -328,7 +328,7 @@ cmu_peric1: clock-controller@10700000 { =20 syscon_peric1: syscon@10720000 { compatible =3D "samsung,exynos2200-peric1-sysreg", "syscon"; - reg =3D <0x0 0x10720000 0x0 0x2000>; + reg =3D <0x0 0x10720000 0x0 0x3000>; }; =20 pinctrl_peric1: pinctrl@10730000 { @@ -471,7 +471,7 @@ cmu_cmgp: clock-controller@14e00000 { =20 syscon_cmgp: syscon@14e20000 { compatible =3D "samsung,exynos2200-cmgp-sysreg", "syscon"; - reg =3D <0x0 0x14e20000 0x0 0x2000>; + reg =3D <0x0 0x14e20000 0x0 0x3000>; }; =20 pinctrl_cmgp: pinctrl@14e30000 { --=20 2.43.0 From nobody Mon Oct 6 10:16:38 2025 Received: from mail-ej1-f41.google.com (mail-ej1-f41.google.com [209.85.218.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C939C2EA147; Tue, 22 Jul 2025 12:24:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753187043; cv=none; b=tZYblnueqM4VwhY2a29Ut2wBq/cH+rK+dQpQgOFsizND/O2AKUVm8RHkK2ozbZdhGUUvu8Rxvq0nyHgZXGkWU3/xDHkimiPvaqqiIx57Eej0wPUJcApVjs7leWLYiuL9TXKML9l3LBF5oMwpAfcZBvwEUHiZo/JPHlC5+HciETs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753187043; c=relaxed/simple; bh=jcO2uNN9bGpZVzxBlo2u9bZgPy43ekCEIHGVTTVj12w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=U4riluunETSF3AXFoWP7ECeiPTy3kitNg5naYV3Xujo/6piVnxcSEpbm3D1qI1qUMXIp2oKqAikyASAVWhFRId86ymiSF9qB2YCzIS4HxCIAJsphz+RF15FTOD48HUoP+fCXhStETbC1RXdkQAK6cfF3Wun7TO2zL0WEZenHNFY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=kK9RyLCi; arc=none smtp.client-ip=209.85.218.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kK9RyLCi" Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-aef575ad59eso320527466b.2; Tue, 22 Jul 2025 05:24:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1753187040; x=1753791840; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BV3A9L+gcYLTgq/m2BBB5zI+0t3BKzwph1D1xLxuYPg=; b=kK9RyLCinT7FLLAg6FToQQqZHpHs2TL1hiq/U7tVJC9cbkghYBNu49BmkpZqLyOmep dBmv8HbRU+TRHU5yNaHUMzum/c+0s2pdOrSPFanB9IAdqYaZGrHK6pavXnCuu+UwEvEa W7R7rACbQfZX2BKDylm/1UYVpDFEUc96DUJt3Kjrxo1vunORjuZBHgEcuaua+muCit2r Ufs7CZaKmqXi4DWGX6qFCbMCjHYHd/TX3bQBcKTPm1Ji7VUTPBGkY/Anb2Vs0By9fIFO kujZDku5gM3WL/AfaXpROTqioWSNnwSBQ9rYZnrEfECE8VwmDjJ9t4sgfVI2UE+8+OSF ++GQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753187040; x=1753791840; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BV3A9L+gcYLTgq/m2BBB5zI+0t3BKzwph1D1xLxuYPg=; b=lkbIzY+1u+DiYpkufpBax7FeUukdE1dsyQQHUu3YmsEw07YOR1O+MZARugx8AJa+PF hqTIs2Iqnl2CytFahS96a/WC0yPl2gFKBm/cNsWmzcN894v0gQgNAQICVl+ccyNqbUfj 0ONSkF51ub7pUko9ypjIoSbM2P6ecrpFV6b7P65fYoTeTc8Tks5MO3Dmxukp/kyOAWWr WRhKcGcMuCfWN43WH9eP+yUJjjwBANg/+15cu3jI6cAgS8YiPgH0l3+h3kSkQS+6z9HC 60tGOT0y1RsBa3kpEZdy+2/rDWHmZ5oqZr0TKtS6zXG5tpFS0oBG8JPz4RLLQBoUlqEf 4pxg== X-Forwarded-Encrypted: i=1; AJvYcCVynwX7gpjMlANh8LzEbTsBulpyEbgzh/eBay8Ef2/7VHB7se4eJt3XkPjPsVppRRodQrS4VWs0oS+f@vger.kernel.org, AJvYcCWahUf1/w+DdNITrS/GxkBwekq9bBoKDxz477mDMFfCmkptF2RMpDNgGOCyYBG45z/mAPmgRAccGaVXddHU@vger.kernel.org X-Gm-Message-State: AOJu0YxfIdJ/y9g/FAk79fuMskzkwFoUyq76OGnFwpGl9uG1VQa9UAcC z4DyIJ5kAMNKS11o+bOM4LU9H9DgDU+81qc3ruuXKGOOxy1P0uZNpdiOe5vQpQ== X-Gm-Gg: ASbGncu6WZ3GndLcj+kU3eONYIWxF3XAzmBZ6xXguFR/evKh+li9ckDSBfRmvf0+Wlt 5Jg/46rVW63jXm3riko01YM0TtJNUjeYZd+c5uQVLfzJwjgU5fKW6uztYek4O4FBVsEbNOiZgZq 7cYwBMx9QV9wRxcc1NF0qIM8kf9KHUOqmx5JkD0sy6P+UxczZr03eNpfElVeTeP9V2H4kQMmcOI 7zLStQZjTlReuJVv/OVpPYS73IIjx6QmrTV25rQYbgPvUyh1yl0Rx3/w36mZaYZWv/jBRHc5Rx8 5XZ29O9YbtR2SLklr1+6CqwXwNhgQcy8TM0yyMd7z7dc4GAePzE5COv7w7KTdvVHSAkZflFIfIc 2/ZD5QZ5mvTOAdfv+LHDzKzoFdl95FJ93Tt9ULr4tjZlXLC8MsK2bcxKyG+387vGDA6tjtyl4YQ == X-Google-Smtp-Source: AGHT+IEt4kn4A0JiyfUGDXpm1ICFF04OjDfTYiHETQRwdAG1iiF22fyhiLVJUDeFKq5N6QtGAEJdaA== X-Received: by 2002:a17:907:72d1:b0:ae9:c849:fae0 with SMTP id a640c23a62f3a-ae9ce1e4d8amr2436788566b.58.1753187039780; Tue, 22 Jul 2025 05:23:59 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aec6c79a056sm861358466b.14.2025.07.22.05.23.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Jul 2025 05:23:59 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/4] arm64: dts: exynos2200: add serial_0/1 nodes Date: Tue, 22 Jul 2025 15:23:49 +0300 Message-ID: <20250722122350.444019-4-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250722122350.444019-1-ivo.ivanov.ivanov1@gmail.com> References: <20250722122350.444019-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add nodes for serial_0 (UART_DBG) and serial_1 (UART_BT), which allows using them. Signed-off-by: Ivaylo Ivanov --- arch/arm64/boot/dts/exynos/exynos2200.dtsi | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/d= ts/exynos/exynos2200.dtsi index 3fa183c5d..f94a5907b 100644 --- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi @@ -336,6 +336,19 @@ pinctrl_peric1: pinctrl@10730000 { reg =3D <0x0 0x10730000 0x0 0x1000>; }; =20 + serial_1: serial@10840000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x10840000 0x0 0x100>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_UART_BT>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart1_bus>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <256>; + status =3D "disabled"; + }; + cmu_hsi0: clock-controller@10a00000 { compatible =3D "samsung,exynos2200-cmu-hsi0"; reg =3D <0x0 0x10a00000 0x0 0x8000>; @@ -458,6 +471,19 @@ pinctrl_peric2: pinctrl@11c30000 { reg =3D <0x0 0x11c30000 0x0 0x1000>; }; =20 + serial_0: serial@11c40000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x11c40000 0x0 0x100>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_UART_DBG>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart0_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <256>; + status =3D "disabled"; + }; + cmu_cmgp: clock-controller@14e00000 { compatible =3D "samsung,exynos2200-cmu-cmgp"; reg =3D <0x0 0x14e00000 0x0 0x8000>; --=20 2.43.0 From nobody Mon Oct 6 10:16:38 2025 Received: from mail-ej1-f46.google.com (mail-ej1-f46.google.com [209.85.218.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB0A12EA17C; Tue, 22 Jul 2025 12:24:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753187047; cv=none; b=TTVs8Jl6qwPGA5E0VREaRDIFeEToTOCdEfgRkvVHT9x1s4NdZlDAdMdcJF4vrZcD1OT4LgzJ7osTvi4SRR3rkquA0VAovk5LnPG4tn4gpFIOA/h/5sO+EyU4SXWrsjDmB7npZbRTxImqtOKcfDYx8LvHGndWDX2a3D9guzO75Zg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753187047; c=relaxed/simple; bh=wVYUMEwRHVHvCX6G2AelEi117z2eZSCPzxHiH5fULw4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=evPi7B3RilZtnZWq0/6A2cDgwFX+WJfpvFyByYshF4UI0VuHlYEt6M31GhS9s7F1xyz1/q+u0I+fIEXbIKOLArjenYxqlr6DThEEkqZuqxdorg7mHHLMAOK00RrF4668PBiPfDl2sh02+Afyp7SgLkVAGcSo3l/TUU04/lwbB/0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=B90sRJ3/; arc=none smtp.client-ip=209.85.218.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="B90sRJ3/" Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-ad56cbc7b07so871024566b.0; Tue, 22 Jul 2025 05:24:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1753187042; x=1753791842; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=77vRMtd0OHZ27NI++bEPDhoweUrPViUO5hqRqwvzQ5M=; b=B90sRJ3/JSBp/8AhSebpHhp8cL+EgUHGRxXv7PumLdFc4G3MOr7QdzM+I4n0H7f4YO RHtPGRG4YGU9UR3Yc+dqcXMWkfKPHox6mAgPbN+G6WHv48y37NSZpXqiVeN8v2WKYM5s yCCcAW0LB4OieFOzv9ZDtwe3UxF7jmq6KW7p6WbyLX3zBAODZLwLcAsaDDynk/wKzddU umdjacmiakSFObq5WeVdJNRSrT4hkefjDRvBLXoN3vMub1fISXEwVXvexL8rKwlqYhcJ nwk8vjRqQD/sXiDR/xbuM+WXUeiTZaPK0Ms8uCO7DoTxuMQ8U5uYt7xp/19LJDS7vaUe Ufew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1753187042; x=1753791842; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=77vRMtd0OHZ27NI++bEPDhoweUrPViUO5hqRqwvzQ5M=; b=GSgkhYy871nBJGwcCIES/1VPFiTt3LYU1MFpvJUtsttG3br6Hm45Uee4+8RR7APulZ XXO4nHLGVIvdjcisbNZ7QS7cxqAG1BqJs+y3R89hAM/o3glOi4QcMDsdgYJk1+DYzBdy v2sHf3z4+szYSUymaTGwkNABTxZOOZZXODhaGEByEksnKKdrBkGKFtZ58KYIeKq89QWu 9ctpy8a5sD9y4LTa6E4v/93d2HfBE6eiihmmdfcA3/I/auofnv/teraW0aglgfz+d1DW VOSo+pcNBTVFUxYVcd/hG1ZEmRxTIJ9aTUx4lTqk/a8T/maKP/ffxMq5T+IWoYFpLlXm LLNQ== X-Forwarded-Encrypted: i=1; AJvYcCUQkZyvw47cZh7YKpAbWIWsjqYzfkQ1rSADUxqdqbiGm9JkhEHXqrAFlP8Sx2ZzrIkGyTXQVkCMNYBN@vger.kernel.org, AJvYcCXQB4YFYptX4WJdoXYIjB26nqo6rGkQOBG1E27z65U+PpXMCM7go7QaAU0uhR9A9SjBi1GdstMyzUVYTcA2@vger.kernel.org X-Gm-Message-State: AOJu0Yw0Z5Znom74+XQadIl10S2xxhtqtY8EZRj87qcpCNuEFeTG4x5j ngmNkP5lY5b7Iq4xLOD1cEUZVGsZ1d/SAqBsu5QeEaBkInmOCNA1kzP9 X-Gm-Gg: ASbGncuI3PQfeoBtSC3QI1LEaF/8rzGoT2G/k7rBp0dewkXoEmazoFBlLtsrzG27ML2 XEmkuQfK54QkjRtKnCBadRds8BjWR3Uv3ca2xbqvNGW+APSis/IaRetDXgBe8Zs6jA4WAuG1yFs VnvC4GHFESZ0+dPRjeLwCfhzP/zzuM9SlAwhGENjuqQr8tT8IgDxatQ92MmdWnplW+W4HJwLH7R 6Q+LibIYFZYsaZDtOmTbaB2UQv/I2+S9m7PmroIalf23XUCVtc2NKiT2rAUkXs9iUbRdJVs/OcE EA+GRIyZTgZKZr5OgNsL0bls8KBR7lg7rtxzbvD2wj2dUAD2pCzkG0MFIMxyuKrS45ELpcL9WFj gYAJ0pKZ1+nWRY9bziu3nZHjfa/5zXOKQNDcdhFw7DEajZBjLMqG7I9He8sloQ08ro498p1focg == X-Google-Smtp-Source: AGHT+IHgz+u4D5deEHOg45n95CrlTRzVpaGwKfbNXWjWguQP+PYi+rgr4VAF63jfKmUaZmzU4mbo9g== X-Received: by 2002:a17:907:6d11:b0:ae7:fc3:919d with SMTP id a640c23a62f3a-ae9cde595a2mr2410798366b.25.1753187041509; Tue, 22 Jul 2025 05:24:01 -0700 (PDT) Received: from ivaylo-T580.. (91-139-201-119.stz.ddns.bulsat.com. [91.139.201.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aec6c79a056sm861358466b.14.2025.07.22.05.24.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Jul 2025 05:24:01 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Alim Akhtar , Rob Herring , Conor Dooley Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 4/4] arm64: dts: exynos2200: define all usi nodes Date: Tue, 22 Jul 2025 15:23:50 +0300 Message-ID: <20250722122350.444019-5-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250722122350.444019-1-ivo.ivanov.ivanov1@gmail.com> References: <20250722122350.444019-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Universal Serial Interface (USI) supports three types of serial interfaces - uart, i2c and spi. Each protocol can work independently and configured using external configuration inputs. As each USI instance has access to 4 pins, there are multiple possible configurations: - the first 2 and the last 2 pins can be i2c (sda/scl) or uart (rx/tx) - the 4 pins can be used for 4 pin uart or spi Such configuration can be achieved by setting the mode property of usiX and usiX_i2c nodes correctly - if usiX is set to take up 2 pins, then usiX_i2c can be set to take the other 2. If usiX is set for 4 pins, then usiX_i2c should be left disabled. Define all the USI nodes from peric0 (usi4), peric1 (usi7-10), peric2 (usi0-6, usi11) and cmgp (usi0-6_cmgp, 2 pin usi7_cmgp) blocks, as well as their respective uart and i2c subnodes. As Samsung, for some reason, has decided to restart the counting of usi instances for cmgp, suffix labels for nodes of such with _cmgp. Spi support will be added later on. Signed-off-by: Ivaylo Ivanov --- arch/arm64/boot/dts/exynos/exynos2200.dtsi | 1361 ++++++++++++++++++++ 1 file changed, 1361 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/d= ts/exynos/exynos2200.dtsi index f94a5907b..afe072342 100644 --- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi @@ -7,6 +7,7 @@ =20 #include #include +#include =20 / { compatible =3D "samsung,exynos2200"; @@ -314,6 +315,76 @@ pinctrl_peric0: pinctrl@10430000 { reg =3D <0x0 0x10430000 0x0 0x1000>; }; =20 + usi4: usi@105000c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x105000c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI04>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric0 0x1024>; + status =3D "disabled"; + + hsi2c_8: i2c@10500000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x10500000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_DOUT_PERIC0_USI04>, + <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c8_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_6: serial@10500000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x10500000 0x0 0xc0>; + clocks =3D <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_USI04>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart6_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi4_i2c: usi@105100c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x105100c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric0 CLK_DOUT_PERIC0_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric0 0x1024>; + status =3D "disabled"; + + hsi2c_9: i2c@10510000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x10510000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric0 CLK_DOUT_PERIC0_I2C>, + <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c9_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + cmu_peric1: clock-controller@10700000 { compatible =3D "samsung,exynos2200-cmu-peric1"; reg =3D <0x0 0x10700000 0x0 0x8000>; @@ -349,6 +420,287 @@ serial_1: serial@10840000 { status =3D "disabled"; }; =20 + usi7: usi@109000c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x109000c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI07>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric1 0x2030>; + status =3D "disabled"; + + hsi2c_14: i2c@10900000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x10900000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_DOUT_PERIC1_USI07>, + <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c14_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_9: serial@10900000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x10900000 0x0 0xc0>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI07>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart9_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi7_i2c: usi@109100c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x109100c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI07_SPI_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric1 0x2034>; + status =3D "disabled"; + + hsi2c_15: i2c@10910000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x10910000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_DOUT_PERIC1_USI07_SPI_I2C>, + <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c15_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi8: usi@109200c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x109200c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI08>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric1 0x2038>; + status =3D "disabled"; + + hsi2c_16: i2c@10920000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x10920000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_DOUT_PERIC1_USI08>, + <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c16_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_10: serial@10920000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x10920000 0x0 0xc0>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI08>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart10_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi8_i2c: usi@109300c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x109300c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI08_SPI_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric1 0x203c>; + status =3D "disabled"; + + hsi2c_17: i2c@10930000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x10930000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_DOUT_PERIC1_USI08_SPI_I2C>, + <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c17_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi9: usi@109400c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x109400c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI09>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric1 0x2040>; + status =3D "disabled"; + + hsi2c_18: i2c@10940000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x10940000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_DOUT_PERIC1_USI09>, + <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c18_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_11: serial@10940000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x10940000 0x0 0xc0>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI09>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart11_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi9_i2c: usi@109500c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x109500c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric1 0x2044>; + status =3D "disabled"; + + hsi2c_19: i2c@10950000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x10950000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_DOUT_PERIC1_I2C>, + <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c19_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi10: usi@109600c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x109600c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI10>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric1 0x2048>; + status =3D "disabled"; + + hsi2c_20: i2c@10960000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x10960000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_DOUT_PERIC1_USI10>, + <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c20_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_12: serial@10960000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x10960000 0x0 0xc0>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_USI10>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart12_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi10_i2c: usi@109700c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x109700c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>, + <&cmu_peric1 CLK_DOUT_PERIC1_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric1 0x204c>; + status =3D "disabled"; + + hsi2c_21: i2c@10970000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x10970000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_DOUT_PERIC1_I2C>, + <&cmu_peric1 CLK_MOUT_PERIC0_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c21_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + }; + cmu_hsi0: clock-controller@10a00000 { compatible =3D "samsung,exynos2200-cmu-hsi0"; reg =3D <0x0 0x10a00000 0x0 0x8000>; @@ -484,6 +836,496 @@ serial_0: serial@11c40000 { status =3D "disabled"; }; =20 + usi0: usi@11d000c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11d000c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI00>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric2 0x2000>; + status =3D "disabled"; + + hsi2c_0: i2c@11d00000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11d00000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_USI00>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c0_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_2: serial@11d00000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x11d00000 0x0 0xc0>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI00>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart2_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi0_i2c: usi@11d100c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11d100c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI00_SPI_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric2 0x2004>; + status =3D "disabled"; + + hsi2c_1: i2c@11d10000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11d10000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_USI00_SPI_I2C>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c1_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi1: usi@11d200c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11d200c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI01>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric2 0x2008>; + status =3D "disabled"; + + hsi2c_2: i2c@11d20000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11d20000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_USI01>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c2_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_3: serial@11d20000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x11d20000 0x0 0xc0>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI01>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart3_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi1_i2c: usi@11d300c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11d300c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI01_SPI_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric2 0x200c>; + status =3D "disabled"; + + hsi2c_3: i2c@11d30000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11d30000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_USI01_SPI_I2C>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c3_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi2: usi@11d400c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11d400c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI02>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric2 0x2010>; + status =3D "disabled"; + + hsi2c_4: i2c@11d40000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11d40000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_USI02>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c4_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_4: serial@11d40000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x11d40000 0x0 0xc0>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI02>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart4_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <256>; + status =3D "disabled"; + }; + }; + + usi2_i2c: usi@11d500c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11d500c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric2 0x2014>; + status =3D "disabled"; + + hsi2c_5: i2c@11d50000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11d50000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_I2C>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c5_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi3: usi@11d600c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11d600c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI03>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric2 0x2018>; + status =3D "disabled"; + + hsi2c_6: i2c@11d60000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11d60000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_USI03>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c6_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_5: serial@11d60000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x11d60000 0x0 0xc0>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI03>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart5_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <256>; + status =3D "disabled"; + }; + }; + + usi3_i2c: usi@11d700c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11d700c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric2 0x201c>; + status =3D "disabled"; + + hsi2c_7: i2c@11d70000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11d70000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_I2C>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c7_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi5_i2c: usi@11d800c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11d800c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric2 0x102c>; + status =3D "disabled"; + + hsi2c_11: i2c@11d80000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11d80000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_I2C>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c11_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi6_i2c: usi@11d900c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11d900c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric2 0x1004>; + status =3D "disabled"; + + hsi2c_13: i2c@11d90000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11d90000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_I2C>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c13_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi11: usi@11da00c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11da00c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI11>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric2 0x1058>; + status =3D "disabled"; + + hsi2c_22: i2c@11da0000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11da0000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_USI11>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c22_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_13: serial@11da0000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x11da0000 0x0 0xc0>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI11>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart13_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi11_i2c: usi@11db00c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11db00c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_peric2 0x105c>; + status =3D "disabled"; + + hsi2c_23: i2c@11db0000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11db0000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_I2C>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c23_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi5: usi@11dd00c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11dd00c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI05>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric2 0x117c>; + status =3D "disabled"; + + hsi2c_10: i2c@11dd0000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11dd0000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_USI05>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c10_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_7: serial@11dd0000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x11dd0000 0x0 0xc0>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI05>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart7_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <256>; + status =3D "disabled"; + }; + }; + + usi6: usi@11de00c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x11de00c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI06>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_peric2 0x1180>; + status =3D "disabled"; + + hsi2c_12: i2c@11de0000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x11de0000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric2 CLK_DOUT_PERIC2_USI06>, + <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c12_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_8: serial@11de0000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x11de0000 0x0 0xc0>; + clocks =3D <&cmu_peric2 CLK_MOUT_PERIC2_NOC_USER>, + <&cmu_peric2 CLK_DOUT_PERIC2_USI06>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart8_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + cmu_cmgp: clock-controller@14e00000 { compatible =3D "samsung,exynos2200-cmu-cmgp"; reg =3D <0x0 0x14e00000 0x0 0x8000>; @@ -511,6 +1353,525 @@ wakeup-interrupt-controller { }; }; =20 + usi0_cmgp: usi@14f000c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14f000c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI0>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_cmgp 0x2000>; + status =3D "disabled"; + + hsi2c_24: i2c@14f00000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14f00000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_USI0>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c24_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_14: serial@14f00000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x14f00000 0x0 0xc0>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI0>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart14_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi0_i2c_cmgp: usi@14f100c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14f100c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C0>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_cmgp 0x2070>; + status =3D "disabled"; + + hsi2c_25: i2c@14f10000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14f10000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C0>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c25_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi1_cmgp: usi@14f200c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14f200c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI1>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_cmgp 0x2010>; + status =3D "disabled"; + + hsi2c_26: i2c@14f20000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14f20000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_USI1>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c26_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_15: serial@14f20000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x14f20000 0x0 0xc0>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI1>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart15_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi1_i2c_cmgp: usi@14f300c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14f300c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C1>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_cmgp 0x2074>; + status =3D "disabled"; + + hsi2c_27: i2c@14f30000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14f30000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_SPI_I2C1>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c27_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi2_cmgp: usi@14f400c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14f400c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI2>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_cmgp 0x2020>; + status =3D "disabled"; + + hsi2c_28: i2c@14f40000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14f40000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_USI2>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c28_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_16: serial@14f40000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x14f40000 0x0 0xc0>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI2>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart16_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi2_i2c_cmgp: usi@14f500c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14f500c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_cmgp 0x2024>; + status =3D "disabled"; + + hsi2c_29: i2c@14f50000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14f50000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_I2C>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c29_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi3_cmgp: usi@14f600c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14f600c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI3>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_cmgp 0x2030>; + status =3D "disabled"; + + hsi2c_30: i2c@14f60000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14f60000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_USI3>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c30_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_17: serial@14f60000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x14f60000 0x0 0xc0>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI3>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart17_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi3_i2c_cmgp: usi@14f700c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14f700c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_cmgp 0x2034>; + status =3D "disabled"; + + hsi2c_31: i2c@14f70000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14f70000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_I2C>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c31_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi4_cmgp: usi@14f800c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14f800c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI4>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_cmgp 0x2040>; + status =3D "disabled"; + + hsi2c_32: i2c@14f80000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14f80000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_USI4>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c32_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_18: serial@14f80000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x14f80000 0x0 0xc0>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI4>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart18_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi4_i2c_cmgp: usi@14f900c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14f900c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_cmgp 0x2044>; + status =3D "disabled"; + + hsi2c_33: i2c@14f90000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14f90000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_I2C>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c33_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi5_cmgp: usi@14fa00c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14fa00c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI5>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_cmgp 0x2050>; + status =3D "disabled"; + + hsi2c_34: i2c@14fa0000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14fa0000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_USI5>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c34_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_19: serial@14fa0000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x14fa0000 0x0 0xc0>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI5>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart19_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi5_i2c_cmgp: usi@14fb00c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14fb00c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_cmgp 0x2054>; + status =3D "disabled"; + + hsi2c_35: i2c@14fb0000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14fb0000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_I2C>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c35_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi6_cmgp: usi@14fc00c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14fc00c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI6>; + clock-names =3D "pclk", "ipclk"; + samsung,sysreg =3D <&syscon_cmgp 0x2060>; + status =3D "disabled"; + + hsi2c_36: i2c@14fc0000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14fc0000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_USI6>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c36_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + serial_20: serial@14fc0000 { + compatible =3D "samsung,exynos2200-uart", "google,gs101-uart"; + reg =3D <0x0 0x14fc0000 0x0 0xc0>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_USI6>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupts =3D ; + pinctrl-0 =3D <&uart20_bus_single>; + pinctrl-names =3D "default"; + samsung,uart-fifosize =3D <64>; + status =3D "disabled"; + }; + }; + + usi6_i2c_cmgp: usi@14fd00c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14fd00c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_cmgp 0x2064>; + status =3D "disabled"; + + hsi2c_37: i2c@14fd0000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14fd0000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_I2C>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c37_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + + usi7_i2c_cmgp: usi@14fe00c0 { + compatible =3D "samsung,exynos2200-usi", "samsung,exynos850-usi"; + reg =3D <0x0 0x14fe00c0 0x0 0x20>; + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + clocks =3D <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>, + <&cmu_cmgp CLK_DOUT_CMGP_I2C>; + clock-names =3D "pclk", "ipclk"; + samsung,mode =3D ; + samsung,sysreg =3D <&syscon_cmgp 0x2080>; + status =3D "disabled"; + + hsi2c_38: i2c@14fe0000 { + compatible =3D "samsung,exynos2200-hsi2c", + "samsung,exynosautov9-hsi2c"; + reg =3D <0x0 0x14fe0000 0x0 0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_cmgp CLK_DOUT_CMGP_I2C>, + <&cmu_cmgp CLK_MOUT_CMGP_CLKALIVE_NOC_USER>; + clock-names =3D "hsi2c", "hsi2c_pclk"; + interrupts =3D ; + pinctrl-0 =3D <&hsi2c38_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + }; + cmu_vts: clock-controller@15300000 { compatible =3D "samsung,exynos2200-cmu-vts"; reg =3D <0x0 0x15300000 0x0 0x8000>; --=20 2.43.0