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Mon, 21 Jul 2025 12:12:43 -0700 From: Nicolin Chen To: , CC: , , , , , Subject: [PATCH v2 1/2] iommu/arm-smmu-v3: Do not bother impl_ops if IOMMU_VIOMMU_TYPE_ARM_SMMUV3 Date: Mon, 21 Jul 2025 12:12:35 -0700 Message-ID: <20250721191236.1739951-2-nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250721191236.1739951-1-nicolinc@nvidia.com> References: <20250721191236.1739951-1-nicolinc@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB55:EE_|SJ2PR12MB8036:EE_ X-MS-Office365-Filtering-Correlation-Id: 3dadd817-303a-47d6-c01f-08ddc88a97b4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|82310400026|7053199007; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?TJmIG/R6HSAZ4DiGMyz/ncow/zqBhbHnnqYYai2TNcyz8IALHU9utBzYQFQ2?= =?us-ascii?Q?ebnISpVw6xYBapMIXickxdf/g8+SGQAThMSoUIe3KslVhAJMjvB1LMKX9Ir4?= =?us-ascii?Q?YGqOMbgq6cN+nWJXObAROLrmXShPHtaGS2W5kw7ZO5BGBRe8dPqJ9xULwQnl?= =?us-ascii?Q?I8UEm8aLUVa0EADkENrgALFDM+d5ftQ4YQYY3od8N4NcxCZeJ3LzmNwlQkHW?= =?us-ascii?Q?PCboxY1BtFul+geDaoiDvbXCRb8Tx5rteuxxbNdJy9LWqR8ZQZ6rEC7ryBe2?= =?us-ascii?Q?5JtofpMdh6riE82odu7e8t/wW5BI/1KJ04OM7uOKwKslBe/B+AfQVZNCp322?= =?us-ascii?Q?xi5FtpIFzVE0C5TvpjN9Pbe52gQ8AauF6msVlPo+ly8YxC69S7/oht0Q3rpd?= =?us-ascii?Q?KkshmBhk5iHmzXzbPIRqR0C2e20tbaGgfibvkv+20AyyNf3o6cz9/VIaSJss?= =?us-ascii?Q?G1gA7TwUSF0B/ri2rVN/hQOxK10+6KkkLN/f8zRAZu+vDnaE9+g2826dcodI?= =?us-ascii?Q?y7a4poRjZBjZw/LElpAE/B01CVzqf8gq7rtl1SywUYbKKNzJIrdYcx34xAss?= =?us-ascii?Q?2NIOyajlMSBm6vSc1Q5ctvo/uV8J12m0V4282NsA+E9WXzrGYpQ1hzoYy7QM?= =?us-ascii?Q?lG7MJWZuG1fod87FfsN9jF79vfCtEne95kIejndq7wPLepFY6nDiiQ53YWM7?= =?us-ascii?Q?d9OeRWcUXIBgVGCWN+vChGI+eZtr718Ul5rTpbi+JSyNYDSXACjBzkVmcVQs?= =?us-ascii?Q?30uA3WoXP0n4hsVQjBlTouvr+3lcp1ITLIEl9DOZ25BrpprkRX1qOZNqdQ/m?= =?us-ascii?Q?av2v/ZF9ec0RJylk2BFz8sSd9r1KEqzngSEuZkws+/OFMyFKuGkjmPGVnN14?= =?us-ascii?Q?WnH48yDjAHb8PSlwRhBRh/qf+luvVDdh5w1CelEpkF1K+FRHGm413DkIS2ek?= =?us-ascii?Q?flLOMSd0bwXkTqery2Dg+/Js+qHe7ggty8nAr5XQ0LS8ZIADRk3mdlolLmFj?= =?us-ascii?Q?7OJmlHEhPKTtnqxn7GIwil1mfyfwOkBnPIkheTx8eurKd0Enth9woulEmiFT?= =?us-ascii?Q?34cVJDqbtFMUbETLtrSQHnsvLiSEysDTLytCD6ISXWaeX6GMi/4oBRhg7wBo?= =?us-ascii?Q?Y8ZLCRVS42EMcgR2czI3TG3n5E0qUmmBNtAZzQjx/fLqQXCV6hHjfhvCibfp?= =?us-ascii?Q?PQzzGqhqLTxc4MzWV0BZF/QJD7N0sqcDMsuqK8LaTuPvG3f/HJPraOxsTRP/?= =?us-ascii?Q?vExwS42R42uuKpSZhq1Y1EbhxFU9layWc41lBvBtq6VWgqm556z/QnH6f9CQ?= =?us-ascii?Q?HzV3NMdRXR48Ome1SVwOe5QUcG/ju7O6lHl9sD4QPqLvRJ2VLOXgOk8NIdUI?= =?us-ascii?Q?BoET4CHuPSAsa8w6SeJwZyxdEXFh4JXysmrotDa9fMETloUbymHau06kYqbx?= =?us-ascii?Q?r9LgvxaGXCGTya7d1hT3Frq6I1Exg/mc5kXmhBbn0jdWHCBBGZMLGz5Ctl4y?= =?us-ascii?Q?xvTzZ4/4+EbVwgGerPa96B53tiwfmxi8P94j?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026)(7053199007);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jul 2025 19:12:53.0972 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3dadd817-303a-47d6-c01f-08ddc88a97b4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB55.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8036 Content-Type: text/plain; charset="utf-8" When viommu type is IOMMU_VIOMMU_TYPE_ARM_SMMUV3, always return or init the standard struct arm_vsmmu, instead of going through impl_ops that must have its own viommu type than the standard IOMMU_VIOMMU_TYPE_ARM_SMMUV3. Given that arm_vsmmu_init() is called after arm_smmu_get_viommu_size(), any unsupported viommu->type must be a corruption. And it must be a driver bug that its vsmmu_size and vsmmu_init ops aren't paired. Warn these two cases. Suggested-by: Will Deacon Signed-off-by: Nicolin Chen Acked-by: Will Deacon --- .../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 24 ++++++++++--------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 14 +++++++++++ 2 files changed, 27 insertions(+), 11 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c b/drivers/= iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c index d9bea8f1f636..c034d6c5468f 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c @@ -420,14 +420,13 @@ size_t arm_smmu_get_viommu_size(struct device *dev, !(smmu->features & ARM_SMMU_FEAT_S2FWB)) return 0; =20 - if (smmu->impl_ops && smmu->impl_ops->vsmmu_size && - viommu_type =3D=3D smmu->impl_ops->vsmmu_type) - return smmu->impl_ops->vsmmu_size; + if (viommu_type =3D=3D IOMMU_VIOMMU_TYPE_ARM_SMMUV3) + return VIOMMU_STRUCT_SIZE(struct arm_vsmmu, core); =20 - if (viommu_type !=3D IOMMU_VIOMMU_TYPE_ARM_SMMUV3) + if (!smmu->impl_ops || !smmu->impl_ops->vsmmu_size || + viommu_type !=3D smmu->impl_ops->vsmmu_type) return 0; - - return VIOMMU_STRUCT_SIZE(struct arm_vsmmu, core); + return smmu->impl_ops->vsmmu_size; } =20 int arm_vsmmu_init(struct iommufd_viommu *viommu, @@ -447,12 +446,15 @@ int arm_vsmmu_init(struct iommufd_viommu *viommu, /* FIXME Move VMID allocation from the S2 domain allocation to here */ vsmmu->vmid =3D s2_parent->s2_cfg.vmid; =20 - if (smmu->impl_ops && smmu->impl_ops->vsmmu_init && - viommu->type =3D=3D smmu->impl_ops->vsmmu_type) - return smmu->impl_ops->vsmmu_init(vsmmu, user_data); + if (viommu->type =3D=3D IOMMU_VIOMMU_TYPE_ARM_SMMUV3) { + viommu->ops =3D &arm_vsmmu_ops; + return 0; + } =20 - viommu->ops =3D &arm_vsmmu_ops; - return 0; + /* Unsupported type was rejected in arm_smmu_get_viommu_size() */ + if (WARN_ON(viommu->type !=3D smmu->impl_ops->vsmmu_type)) + return -EOPNOTSUPP; + return smmu->impl_ops->vsmmu_init(vsmmu, user_data); } =20 int arm_vmaster_report_event(struct arm_smmu_vmaster *vmaster, u64 *evt) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 181d07bc1a9d..dfe7f40fac35 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -4703,6 +4703,7 @@ static void arm_smmu_impl_remove(void *data) static struct arm_smmu_device *arm_smmu_impl_probe(struct arm_smmu_device = *smmu) { struct arm_smmu_device *new_smmu =3D ERR_PTR(-ENODEV); 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X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?+7gVL69WL3kARjsL9y8t44X2XWMz+Cb+Q85lSsxAJ6AvMvzXLhkupv4glfiW?= =?us-ascii?Q?kfhqqVsuJEzNRrFX/j2oGvkk0icLw/a7iK2WRJDSgbhGOy3L1rGVv3lbwZzg?= =?us-ascii?Q?+oWfhl6XXtR4ucABX6QvCXIg6Xu6pEO/gXtuyvm3TZDvcCuree7vdpRiTUPJ?= =?us-ascii?Q?pBUKYDlftJILdtJmSSAV7CbWRiWaUOZM0L3Hb75p0kwIdP5OPr5IPr7KrKpq?= =?us-ascii?Q?9jlCT55b9K3h6r5jTV9roi5eGVotfOOj44J5HajkiaSeY1TQRm5P59h6DcWd?= =?us-ascii?Q?Pj2HGwdxhzGCnzwNlGEmJQpI1ctI3dMe2JMDyGTVZ3/Hxje/IrN+B3t2fZME?= =?us-ascii?Q?/qxuSTyloAUKSadSJ9bLozVqCBjAQcDow5PDJVojVuLHEQQTAyaAg+FwRX+Z?= =?us-ascii?Q?tAujCx25fJD1lQljYZIZ5kUQiO2iL2kVzT+QbmyZvXmktgJ8uzH+ijRhx9yy?= =?us-ascii?Q?bFf/6feNEgmDMsJ0XPMe2NgYcBhp5WPnpq9b8g2CqN2rW89pLC6DOp9VL3jZ?= =?us-ascii?Q?N+NmN/MuAAXNNFaqL8Uh/6vS0LBj/E1Y0/yfyFl/n1tS+gVB1B2732KX0ah4?= =?us-ascii?Q?nnEt+P8X1ba577dBWqrEYEWJd7DpRh9INujzlc/vWddLYizGHfw6NLx/fyQ/?= =?us-ascii?Q?d/QEi9sURbXhi7Ik7xoLkedu3dA65Vj0eF96ZYAocQ89jB9Y/AAWlPGi4IcJ?= =?us-ascii?Q?0lxcvTyggcwqMF/W72Hhgw5MGtO3+NyMBL+VClMp2GZNtwb/4Hvm6i3Vxgu9?= =?us-ascii?Q?iKAngAJtmzUPfaBqOBirG126djplKEDljXZxOpKbdOUVIbS6VUEifcB6Qd/I?= =?us-ascii?Q?S4sjZoqAs51Z6cLSjGfjlYRxTVtKzVjrpTl1EEe95RNr9gYM9ldERlS+b7a7?= =?us-ascii?Q?L/GndX3CqKEfK9aeFX+2oQDs+bZ5reEgzLTzV3xWLq9SzxyZzBFSSBc45R5F?= =?us-ascii?Q?EgRokZL7x17rgx7Oc12WlADTvwonBUWGv9CiRQ7JPTzhwRftac1yBLtLm400?= =?us-ascii?Q?8q3MhhzAAJAg3wIkEFnG2EWrXEbzkybPFwNomYCaDBDbGQsGyTE64howuBzn?= =?us-ascii?Q?KxlcmRfh19UgT3jB2qI9/LcgDM2FwzdwMKKoxgE5Su3QGlkITkiQRO6NGI3a?= =?us-ascii?Q?+XEWkUv+OYg+/PpEL1TJHRPBN61IW2l60v1qapk49FdwpQkhig76Sks62alt?= =?us-ascii?Q?pUQOk1Gs4hq7pUeJ2nKP9OyPmPrwy3ORreeFUGc4dYKPQptuSByeXGxRr/E/?= =?us-ascii?Q?7zcyX5eWq288AHsZPeASsIdaWT7uZ7TTDR3V3lh2HOfu1bj/Qk1IVR9gS6l7?= =?us-ascii?Q?jpDOruvenKnmEPrE3HppPvGciEQ4iNtp0pMX/kSFIuuUeiZy3gvgy9zMsVCD?= =?us-ascii?Q?9Td6BG426d+bVlE57NAVrsaKeaSyfKTVSNUVx7l7R9xV+suiz6S4f3nZIStP?= =?us-ascii?Q?rBmVA/XBpwpfpaFxHfX3vVlE+SqTof1q+lgBf5XQ/7UVRKv8yddvKLCguO99?= =?us-ascii?Q?wkAh58gIn1mPWN0JKQ64Dvq0ksBHKbuBCZKp?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013)(7053199007);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jul 2025 19:12:55.0555 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d48919f4-af57-47e7-f29b-08ddc88a98de X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB55.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN6PR12MB8492 Content-Type: text/plain; charset="utf-8" It's more flexible to have a get_viommu_size op. Replace static vsmmu_size and vsmmu_type with that. Suggested-by: Will Deacon Acked-by: Will Deacon Signed-off-by: Nicolin Chen --- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 8 ++------ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 4 ++-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 +-- drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c | 14 ++++++++++++-- 4 files changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c b/drivers/= iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c index c034d6c5468f..8cd8929bbfdf 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c @@ -423,10 +423,9 @@ size_t arm_smmu_get_viommu_size(struct device *dev, if (viommu_type =3D=3D IOMMU_VIOMMU_TYPE_ARM_SMMUV3) return VIOMMU_STRUCT_SIZE(struct arm_vsmmu, core); =20 - if (!smmu->impl_ops || !smmu->impl_ops->vsmmu_size || - viommu_type !=3D smmu->impl_ops->vsmmu_type) + if (!smmu->impl_ops || !smmu->impl_ops->get_viommu_size) return 0; - return smmu->impl_ops->vsmmu_size; + return smmu->impl_ops->get_viommu_size(viommu_type); } =20 int arm_vsmmu_init(struct iommufd_viommu *viommu, @@ -451,9 +450,6 @@ int arm_vsmmu_init(struct iommufd_viommu *viommu, return 0; } =20 - /* Unsupported type was rejected in arm_smmu_get_viommu_size() */ - if (WARN_ON(viommu->type !=3D smmu->impl_ops->vsmmu_type)) - return -EOPNOTSUPP; return smmu->impl_ops->vsmmu_init(vsmmu, user_data); } =20 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index dfe7f40fac35..b593617446b4 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -4716,8 +4716,8 @@ static struct arm_smmu_device *arm_smmu_impl_probe(st= ruct arm_smmu_device *smmu) =20 ops =3D new_smmu->impl_ops; if (ops) { - /* vsmmu_size and vsmmu_init ops must be paired */ - if (WARN_ON(!ops->vsmmu_size ^ !ops->vsmmu_init)) { + /* get_viommu_size and vsmmu_init ops must be paired */ + if (WARN_ON(!ops->get_viommu_size ^ !ops->vsmmu_init)) { ret =3D -EINVAL; goto err_remove; } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index 3fa02c51df9f..e332f5ba2f8a 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -728,8 +728,7 @@ struct arm_smmu_impl_ops { */ void *(*hw_info)(struct arm_smmu_device *smmu, u32 *length, enum iommu_hw_info_type *type); - const size_t vsmmu_size; - const enum iommu_viommu_type vsmmu_type; + size_t (*get_viommu_size)(enum iommu_viommu_type viommu_type); int (*vsmmu_init)(struct arm_vsmmu *vsmmu, const struct iommu_user_data *user_data); }; diff --git a/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c b/drivers/iommu= /arm/arm-smmu-v3/tegra241-cmdqv.c index 4c86eacd36b1..46005ed52bc2 100644 --- a/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c +++ b/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c @@ -832,6 +832,13 @@ static void *tegra241_cmdqv_hw_info(struct arm_smmu_de= vice *smmu, u32 *length, return info; } =20 +static size_t tegra241_cmdqv_get_vintf_size(enum iommu_viommu_type viommu_= type) +{ + if (viommu_type !=3D IOMMU_VIOMMU_TYPE_TEGRA241_CMDQV) + return 0; + return VIOMMU_STRUCT_SIZE(struct tegra241_vintf, vsmmu.core); +} + static struct arm_smmu_impl_ops tegra241_cmdqv_impl_ops =3D { /* For in-kernel use */ .get_secondary_cmdq =3D tegra241_cmdqv_get_cmdq, @@ -839,8 +846,7 @@ static struct arm_smmu_impl_ops tegra241_cmdqv_impl_ops= =3D { .device_remove =3D tegra241_cmdqv_remove, /* For user-space use */ .hw_info =3D tegra241_cmdqv_hw_info, - .vsmmu_size =3D VIOMMU_STRUCT_SIZE(struct tegra241_vintf, vsmmu.core), - .vsmmu_type =3D IOMMU_VIOMMU_TYPE_TEGRA241_CMDQV, + .get_viommu_size =3D tegra241_cmdqv_get_vintf_size, .vsmmu_init =3D tegra241_cmdqv_init_vintf_user, }; =20 @@ -1273,6 +1279,10 @@ tegra241_cmdqv_init_vintf_user(struct arm_vsmmu *vsm= mu, phys_addr_t page0_base; int ret; =20 + /* Unsupported type was rejected in tegra241_cmdqv_get_vintf_size() */ + if (WARN_ON(vsmmu->core.type !=3D IOMMU_VIOMMU_TYPE_TEGRA241_CMDQV)) + return -EOPNOTSUPP; + if (!user_data) return -EINVAL; =20 --=20 2.43.0