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charset="utf-8" From: Nikunj Kela SA8255p platform abstracts resources such as clocks, interconnect configuration in Firmware. Add DT bindings for the QUP Wrapper on sa8255p platform. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Nikunj Kela Co-developed-by: Praveen Talari Signed-off-by: Praveen Talari --- v5 -> v6 - added Reviewed-by tag in commit v3 -> v4 - reordered required: after properties and patternproperties - added version log after --- v2 -> v3 - reordered required option v1 -> v2 - reorder sequence of tags in commit text - resolved waring errors while encountered in dt binding and dtb check. --- .../soc/qcom/qcom,sa8255p-geni-se-qup.yaml | 107 ++++++++++++++++++ 1 file changed, 107 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p= -geni-se-qup.yaml diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-s= e-qup.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-s= e-qup.yaml new file mode 100644 index 000000000000..352af3426d34 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.y= aml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,sa8255p-geni-se-qup.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GENI Serial Engine QUP Wrapper Controller + +maintainers: + - Praveen Talari + +description: + Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapp= er + is a programmable module for supporting a wide range of serial interfaces + like UART, SPI, I2C, I3C, etc. A single QUP module can provide up to 8 S= erial + Interfaces, using its internal Serial Engines. The GENI Serial Engine QUP + Wrapper controller is modeled as a node with zero or more child nodes ea= ch + representing a serial engine. + +properties: + compatible: + const: qcom,sa8255p-geni-se-qup + + reg: + description: QUP wrapper common register address and length. + maxItems: 1 + + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + ranges: true + + iommus: + maxItems: 1 + + dma-coherent: true + +patternProperties: + "spi@[0-9a-f]+$": + type: object + description: GENI serial engine based SPI controller. SPI in master mo= de + supports up to 50MHz, up to four chip selects, programmab= le + data path from 4 bits to 32 bits and numerous protocol + variants. + additionalProperties: true + + properties: + compatible: + const: qcom,sa8255p-geni-spi + + "i2c@[0-9a-f]+$": + type: object + description: GENI serial engine based I2C controller. + additionalProperties: true + + properties: + compatible: + const: qcom,sa8255p-geni-i2c + + "serial@[0-9a-f]+$": + type: object + description: GENI Serial Engine based UART Controller. + additionalProperties: true + + properties: + compatible: + enum: + - qcom,sa8255p-geni-uart + - qcom,sa8255p-geni-debug-uart + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: false + +examples: + - | + #include + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + geniqup@9c0000 { + compatible =3D "qcom,sa8255p-geni-se-qup"; + reg =3D <0 0x9c0000 0 0x6000>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + serial@990000 { + compatible =3D "qcom,sa8255p-geni-uart"; + reg =3D <0 0x990000 0 0x4000>; + interrupts =3D ; + power-domains =3D <&scmi0_pd 0>, <&scmi0_dvfs 0>; + power-domain-names =3D "power", "perf"; + }; + }; + }; +... --=20 2.17.1