From nobody Mon Oct 6 17:09:08 2025 Received: from srv01.abscue.de (abscue.de [89.58.28.240]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0BA9226CEB; Sat, 19 Jul 2025 12:11:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=89.58.28.240 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752927102; cv=none; b=YDrpO+V2sMDN9q1HI8TgKrIgkCbolcQLQ4gEE2HGGBqRuWJBYdpe7GwhwCUzWiNR6sBpc5lTREKWdFxbSrDljm7KzFaSMHdyT9SSP2orA6rsJKpQOExauvJc5DvOvnFR/FcPLPYRZQMvOMq2LugH2d2oIlPaU4EWdm5nFzw0viU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752927102; c=relaxed/simple; bh=NcDT63SYeHWCMr3OEf9L0NA2IEyzjCSsdO8vGRpDFkU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DslqxQxWEP78tGUrsvUa9/rCeIlyfuVn2YAsq8+Bm6c1kFdjgT3Kd9zNdiGE0juvAySI4jF7lSf1UJ2xL3L8/OA0lP9mPtvOgpl5UyWXg79IX6O8oD3D8Xed2RdVpAUO21/bHBwv22mrKlXYnBh5BKtZ5HFUgZparXiDkyTi1v8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=abscue.de; spf=pass smtp.mailfrom=abscue.de; arc=none smtp.client-ip=89.58.28.240 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=abscue.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=abscue.de Received: from srv01.abscue.de (localhost [127.0.0.1]) by spamfilter.srv.local (Postfix) with ESMTP id 3BC511C233A; Sat, 19 Jul 2025 14:11:33 +0200 (CEST) X-Spam-Level: Received: from fluffy-mammal.metal.fwg-cag.de (unknown [IPv6:2001:9e8:cdf7:4000:ceae:3606:9020:cd4f]) by srv01.abscue.de (Postfix) with ESMTPSA id 9C7581C07FA; Sat, 19 Jul 2025 14:11:32 +0200 (CEST) From: =?utf-8?q?Otto_Pfl=C3=BCger?= Date: Sat, 19 Jul 2025 14:09:44 +0200 Subject: [PATCH 08/12] drm: sprd: add gate clock support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250719-ums9230-drm-v1-8-e4344a05eb3d@abscue.de> References: <20250719-ums9230-drm-v1-0-e4344a05eb3d@abscue.de> In-Reply-To: <20250719-ums9230-drm-v1-0-e4344a05eb3d@abscue.de> To: David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Orson Zhai , Baolin Wang , Chunyan Zhang , Kevin Tang Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Otto_Pfl=C3=BCger?= X-Mailer: b4 0.14.2 Enable the DPU and DSI gate clocks specified in the device tree. Disable the DSI clock when it is not needed. Signed-off-by: Otto Pfl=C3=BCger --- drivers/gpu/drm/sprd/sprd_dpu.c | 7 +++++++ drivers/gpu/drm/sprd/sprd_dpu.h | 1 + drivers/gpu/drm/sprd/sprd_dsi.c | 10 ++++++++++ drivers/gpu/drm/sprd/sprd_dsi.h | 4 +++- 4 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sprd/sprd_dpu.c b/drivers/gpu/drm/sprd/sprd_dp= u.c index 0d9eb778794d92418b39f8535d94abde3566de43..575bcdb0e0bb30055ac5c3d0e65= 178cc9f6611f3 100644 --- a/drivers/gpu/drm/sprd/sprd_dpu.c +++ b/drivers/gpu/drm/sprd/sprd_dpu.c @@ -3,6 +3,7 @@ * Copyright (C) 2020 Unisoc Inc. */ =20 +#include #include #include #include @@ -794,6 +795,12 @@ static int sprd_dpu_context_init(struct sprd_dpu *dpu, if (ctx->irq < 0) return ctx->irq; =20 + ctx->clk =3D devm_clk_get_optional_enabled(dev, "enable"); + if (IS_ERR(ctx->clk)) { + dev_err(dev, "failed to get dpu enable clock\n"); + return PTR_ERR(ctx->clk); + } + /* disable and clear interrupts before register dpu IRQ. */ writel(0x00, ctx->base + REG_DPU_INT_EN); writel(0xff, ctx->base + REG_DPU_INT_CLR); diff --git a/drivers/gpu/drm/sprd/sprd_dpu.h b/drivers/gpu/drm/sprd/sprd_dp= u.h index 157a78f24dc18b071602552ea9d005af66525263..d48b922de580a8a4bf07c4610c4= 31d3321f7b810 100644 --- a/drivers/gpu/drm/sprd/sprd_dpu.h +++ b/drivers/gpu/drm/sprd/sprd_dpu.h @@ -44,6 +44,7 @@ enum { */ struct dpu_context { void __iomem *base; + struct clk *clk; int irq; u8 if_type; struct videomode vm; diff --git a/drivers/gpu/drm/sprd/sprd_dsi.c b/drivers/gpu/drm/sprd/sprd_ds= i.c index e01d1d28fe579644ec2e0c83ec9170269932adfe..e781e6c84860402f37352e76824= 4d88ca6ffd4c9 100644 --- a/drivers/gpu/drm/sprd/sprd_dsi.c +++ b/drivers/gpu/drm/sprd/sprd_dsi.c @@ -828,6 +828,8 @@ static void sprd_dsi_bridge_pre_enable(struct drm_bridg= e *bridge) struct sprd_dsi *dsi =3D bridge_to_dsi(bridge); struct dsi_context *ctx =3D &dsi->ctx; =20 + clk_prepare_enable(ctx->clk); + if (ctx->enabled) { drm_warn(dsi->drm, "dsi is initialized\n"); return; @@ -875,6 +877,8 @@ static void sprd_dsi_bridge_post_disable(struct drm_bri= dge *bridge) sprd_dphy_fini(ctx); sprd_dsi_fini(ctx); =20 + clk_disable_unprepare(ctx->clk); + ctx->enabled =3D false; } =20 @@ -1098,6 +1102,12 @@ static int sprd_dsi_probe(struct platform_device *pd= ev) if (!dsi->ctx.pll.platform) return -EINVAL; =20 + dsi->ctx.clk =3D devm_clk_get_optional(dev, "enable"); + if (IS_ERR(dsi->ctx.clk)) { + dev_err(dev, "failed to get dsi enable clock\n"); + return PTR_ERR(dsi->ctx.clk); + } + return mipi_dsi_host_register(&dsi->host); } =20 diff --git a/drivers/gpu/drm/sprd/sprd_dsi.h b/drivers/gpu/drm/sprd/sprd_ds= i.h index 0b9f1cabe71570743cbc68a8061e95a249f27191..15e57f3f49f8e5c4f856fb496a0= c88f1b0414ced 100644 --- a/drivers/gpu/drm/sprd/sprd_dsi.h +++ b/drivers/gpu/drm/sprd/sprd_dsi.h @@ -6,8 +6,9 @@ #ifndef __SPRD_DSI_H__ #define __SPRD_DSI_H__ =20 -#include +#include #include +#include #include #include