From nobody Mon Oct 6 21:00:43 2025 Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DBCE021ABB1 for ; Fri, 18 Jul 2025 07:01:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.190 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752822091; cv=none; b=HFVILnDr/W3YVNX4qa8qzY1TZkXk7cobOlqHFEfMiNzJIAiJfGmnf88lbtRBBJzy/vltD2l+JCgwo7SWLNTlibRsrNqMbPFakAwH3TFXRikuN5monC70yUv+Xw6p3o3wcKCP+OzXZBCgK4uJC209oGrtbOSYHYZJsiqLETgubBo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752822091; c=relaxed/simple; bh=NB/R6FfpGSSrjbWfvpEbofTnyAXmCPxGh1OKedYUwrA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=mjcw6k2Kbtx7w3CoXjxwPFveENMNez56/7S66T/bMhDYg/PpDo2FFYJ8YJ/xznK0u+4BzH0r4K9Hoj3A4mgiwgJWMPBPMd7FH0Dj9NFG9bHchy0entMg8t7M+Z4Cja/ZIAWnV3N87Xu61BASRXrkLWA/7lGRKnYdZOrWd9Lx7TQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.190 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.88.163]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4bk0wH55Q0z2Cfvh; Fri, 18 Jul 2025 14:57:19 +0800 (CST) Received: from dggemv705-chm.china.huawei.com (unknown [10.3.19.32]) by mail.maildlp.com (Postfix) with ESMTPS id 8C6A018005F; Fri, 18 Jul 2025 15:01:27 +0800 (CST) Received: from kwepemq100007.china.huawei.com (7.202.195.175) by dggemv705-chm.china.huawei.com (10.3.19.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 18 Jul 2025 15:01:27 +0800 Received: from localhost.huawei.com (10.169.71.169) by kwepemq100007.china.huawei.com (7.202.195.175) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 18 Jul 2025 15:01:26 +0800 From: Yongbang Shi To: , , , , , , , , CC: , , , , , , , , , Subject: [PATCH v3 drm-dp 11/11] drm/hisilicon/hibmc: modification for the former commit Date: Fri, 18 Jul 2025 14:51:25 +0800 Message-ID: <20250718065125.2892404-12-shiyongbang@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20250718065125.2892404-1-shiyongbang@huawei.com> References: <20250718065125.2892404-1-shiyongbang@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To kwepemq100007.china.huawei.com (7.202.195.175) Content-Type: text/plain; charset="utf-8" From: Baihan Li The DP reset was adding in the former commit, and move HDCP cfg after DP controller deresets, so that configuration takes effect. Fixes: 3c7623fb5bb6 ("drm/hisilicon/hibmc: Enable this hot plug detect of i= rq feature") Signed-off-by: Baihan Li Signed-off-by: Yongbang Shi --- ChangeLog: v2 -> v3: - split into 2 commits, suggested by Dmitry Baryshkov. --- drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c b/drivers/gpu/drm/h= isilicon/hibmc/dp/dp_hw.c index 85499f1ace8b..7ba01e7901d3 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c @@ -175,8 +175,6 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp) dp_dev->link.cap.lanes =3D 0x2; dp_dev->link.cap.link_rate =3D DP_LINK_BW_8_1; =20 - /* hdcp data */ - writel(HIBMC_DP_HDCP, dp_dev->base + HIBMC_DP_HDCP_CFG); /* int init */ writel(0, dp_dev->base + HIBMC_DP_INTR_ENABLE); writel(HIBMC_DP_INT_RST, dp_dev->base + HIBMC_DP_INTR_ORIGINAL_STATUS); @@ -186,6 +184,8 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp) writel(0, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL); usleep_range(30, 50); writel(HIBMC_DP_DPTX_RST, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL); + /* hdcp data */ + writel(HIBMC_DP_HDCP, dp_dev->base + HIBMC_DP_HDCP_CFG); /* clock enable */ writel(HIBMC_DP_CLK_EN, dp_dev->base + HIBMC_DP_DPTX_CLK_CTRL); =20 --=20 2.33.0