From nobody Mon Oct 6 21:02:04 2025 Received: from smtp.forwardemail.net (smtp.forwardemail.net [149.28.215.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C26E8299A85 for ; Thu, 17 Jul 2025 10:38:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=149.28.215.223 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752748683; cv=none; b=Kn4+HLQMnmWJpI9+eFyE0vCJ9dQO2uTY6Y+WHuu01TsWEq9qkQcZcIUXu6/xHtgY4MYkW16gPfPZLHfxuJv/KQj2g4OTWrxY23VuGzVuyO//pyAB72Ezb2dT52dvASrW0E7de8Lkp4E9LXY84bKqk2WQKH/zXB/d/CgKohL0DQU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752748683; c=relaxed/simple; bh=UZS/8V1zjkHfDWL5YBI7Fjj2nw//G0EeRpIEFp3oSAg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fkNN1pUW1qpC564H0sFNTHit8AJAmb9uj0z1jCwLBnn5oywHZZbneUes8lHDAgjwTePBCWxVYxvi5q1XgtqtE/7J33Esu1y+dQ6UrzPqQfMNdlF/tJJEJIq1kN80+qHd1gskmeRrJyc790lW68JqgI7UlVc1vDQDy849pzsaXFo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b=cHw0v0lO; arc=none smtp.client-ip=149.28.215.223 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=kwiboo.se Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fe-bounces.kwiboo.se Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kwiboo.se header.i=@kwiboo.se header.b="cHw0v0lO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1752748681; bh=KBzfM5pbLtk9nETtg9LmAuTF3wNpe0ChRxZFPRe1dds=; b=cHw0v0lOBkcMJMjm+xugYCsMYAx2RgUCsezYna6BycNhwhTjHlRFlOGr3SZeuguFMHxo5NMyf kEGWOWYcdWgGP/xE3W00oANpyAw9dFU6tnctWkISdVVU2DevmzcLe58YREQXHgIJb8aLLrnEl7O EWnZ+kMdXmYqRl4B+f4ye9Ahd+vk8b6wapH+OW3bIyqFew77kYIyM5wHGI7WgHvDRX+2qd0HM5A Ld4SuWf2XQKyyGOKIfnZ4dGWWTAwoiqjwypOBTVqgC6I2A2zOYyJejJYnDGhwwPCjTAidA146Xt NgbGMSrdVptJclH8W5aqbbLRWdJL6d5z0jeM7fHJqIZA== X-Forward-Email-ID: 6878d2815e51505848fe609d X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-Forward-Email-Version: 1.1.6 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yao Zi , Chukun Pan , Nicolas Frattaroli , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH v4 6/6] arm64: dts: rockchip: Add FriendlyElec NanoPi Zero2 Date: Thu, 17 Jul 2025 10:37:08 +0000 Message-ID: <20250717103720.2853031-7-jonas@kwiboo.se> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20250717103720.2853031-1-jonas@kwiboo.se> References: <20250717103720.2853031-1-jonas@kwiboo.se> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The NanoPi Zero2 is a small single board computer developed by FriendlyElec, based on the Rockchip RK3528A SoC. Add initial device tree for the FriendlyElec NanoPi Zero2 board. Signed-off-by: Jonas Karlman Tested-by: Yao Zi --- Changes in v4: - No change Changes in v3: - Rename led nodes to led-0/led-1 (Chukun Pan) Changes in v2: - Drop clock-output-names prop from rtc node (Chukun Pan) - Collect t-b tag Schematics: https://wiki.friendlyelec.com/wiki/images/3/37/NanoPi_Zero2_240= 7_SCH.pdf --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3528-nanopi-zero2.dts | 340 ++++++++++++++++++ 2 files changed, 341 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 206fb8572cf7..0662fcf00628 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -90,6 +90,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-armsom-sige1.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-nanopi-zero2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-radxa-e20c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-rock-2a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-rock-2f.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts b/arch/ar= m64/boot/dts/rockchip/rk3528-nanopi-zero2.dts new file mode 100644 index 000000000000..9f683033c5f3 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-zero2.dts @@ -0,0 +1,340 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include "rk3528.dtsi" + +/ { + model =3D "FriendlyElec NanoPi Zero2"; + compatible =3D "friendlyarm,nanopi-zero2", "rockchip,rk3528"; + + aliases { + ethernet0 =3D &gmac1; + i2c1 =3D &i2c1; + mmc0 =3D &sdhci; + mmc1 =3D &sdmmc; + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:1500000n8"; + }; + + adc-keys-0 { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 0>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-maskrom { + label =3D "MASK"; + linux,code =3D ; + press-threshold-microvolt =3D <0>; + }; + }; + + adc-keys-1 { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 1>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-recovery { + label =3D "RECOVERY"; + linux,code =3D ; + press-threshold-microvolt =3D <0>; + }; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&led1>, <&led_sys>; + + led-0 { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_HEARTBEAT; + gpios =3D <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + + led-1 { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_STATUS; + gpios =3D <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "default-on"; + }; + }; + + vcc0v6_ddr: regulator-0v6-vcc-ddr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc0v6_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <600000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vdd_0v9: regulator-0v9-vdd { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_ddr: regulator-1v1-vcc-ddr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc_1v8: regulator-1v8-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_3v3>; + }; + + vcc_3v3: regulator-3v3-vcc { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc3v3_sd: regulator-3v3-vcc-sd { + compatible =3D "regulator-fixed"; + gpios =3D <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_pwren_l>; + regulator-name =3D "vcc3v3_sd"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_3v3>; + }; + + vcc5v0_sys: regulator-5v0-vcc-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; + + usb2_host_5v: regulator-5v0-usb2-host { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb20_host1_pwren>; + regulator-name =3D "usb2_host_5v"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vccio_sd: regulator-vccio-sd { + compatible =3D "regulator-gpio"; + gpios =3D <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_vol_ctrl_h>; + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + states =3D <1800000 0x0>, <3300000 0x1>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vdd_arm: regulator-vdd-arm { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm1 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_arm"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <746000>; + regulator-max-microvolt =3D <1201000>; + regulator-settling-time-up-us =3D <250>; + }; + + vdd_logic: regulator-vdd-logic { + compatible =3D "pwm-regulator"; + pwms =3D <&pwm2 0 5000 PWM_POLARITY_INVERTED>; + pwm-supply =3D <&vcc5v0_sys>; + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <705000>; + regulator-max-microvolt =3D <1006000>; + regulator-settling-time-up-us =3D <250>; + }; +}; + +&cpu0 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_arm>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_arm>; +}; + +&gmac1 { + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy>; + phy-mode =3D "rgmii-id"; + phy-supply =3D <&vcc_3v3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>, + <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_logic>; + status =3D "okay"; +}; + +&i2c1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1m0_xfer>; + status =3D "okay"; + + hym8563: rtc@51 { + compatible =3D "haoyu,hym8563"; + reg =3D <0x51>; + #clock-cells =3D <0>; + interrupt-parent =3D <&gpio4>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rtc_int_l>; + wakeup-source; + }; +}; + +&mdio1 { + rgmii_phy: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1_rstn_l>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + ethernet { + gmac1_rstn_l: gmac1-rstn-l { + rockchip,pins =3D <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + led1: led1 { + rockchip,pins =3D <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led_sys: led-sys { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtc { + rtc_int_l: rtc-int-l { + rockchip,pins =3D <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdmmc { + sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { + rockchip,pins =3D <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + sdmmc_pwren_l: sdmmc-pwren-l { + rockchip,pins =3D <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + usb20_host1_pwren: usb20-host1-pwren { + rockchip,pins =3D <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm1m0_pins>; + status =3D "okay"; +}; + +&pwm2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm2m0_pins>; + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdhci { + bus-width =3D <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + no-sd; + no-sdio; + non-removable; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sdmmc { + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc3v3_sd>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; +}; + +&uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0m0_xfer>; + status =3D "okay"; +}; --=20 2.50.1