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Thu, 17 Jul 2025 02:52:14 -0700 Received: from willie-obmc-builder.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.6) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Thu, 17 Jul 2025 02:52:13 -0700 From: Willie Thai Date: Thu, 17 Jul 2025 09:52:10 +0000 Subject: [PATCH v3 1/4] ARM: dts: aspeed: nvidia: gb200nvl: Add VCC Supply Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20250717-update-gb200nvl-dts-for-new-hardware-v3-1-f28145c55c98@nvidia.com> References: <20250717-update-gb200nvl-dts-for-new-hardware-v3-0-f28145c55c98@nvidia.com> In-Reply-To: <20250717-update-gb200nvl-dts-for-new-hardware-v3-0-f28145c55c98@nvidia.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , "Andrew Jeffery" , CC: , , , , "Deepak Kodihalli" , Ed Tanous , Leo Huang , Willie Thai X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jul 2025 09:52:30.6240 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 997bd9d7-9080-455f-2e75-08ddc517a582 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6198 Add Vcc supply to avoid probing the devices before they have power. Signed-off-by: Deepak Kodihalli Signed-off-by: Ed Tanous Signed-off-by: Willie Thai --- Changes v1 -> v2: - Fix unevaluated vcc-supply properties [Rob Herring] --- --- .../dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts | 26 ++++++++++++++++++= ++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts b/= arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts index 41e3e9dd85f571254a08d40e68c0d8f8f049256b..bd9395a194137ea70d184665ad6= cb659541ef175 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-gb200nvl-bmc.dts @@ -126,6 +126,17 @@ button-uid { gpio =3D <&sgpiom0 154 GPIO_ACTIVE_LOW>; }; }; + + standby_power_regulator: standby-power-regulator { + status =3D "okay"; + compatible =3D "regulator-fixed"; + regulator-name =3D "standby_power"; + gpio =3D <&gpio0 ASPEED_GPIO(M, 3) GPIO_ACTIVE_HIGH>; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + enable-active-high; + regulator-always-on; + }; }; =20 // Enable Primary flash on FMC for bring up activity @@ -431,6 +442,7 @@ exp4: gpio@21 { #interrupt-cells =3D <2>; interrupt-parent =3D <&gpio1>; interrupts =3D ; + vcc-supply =3D <&standby_power_regulator>; gpio-line-names =3D "RTC_MUX_SEL-O", "PCI_MUX_SEL-O", @@ -464,6 +476,7 @@ i2c-mux@71 { #size-cells =3D <0>; reg =3D <0x71>; i2c-mux-idle-disconnect; + vdd-supply =3D <&standby_power_regulator>; =20 imux16: i2c@0 { #address-cells =3D <1>; @@ -528,6 +541,7 @@ i2c-mux@72 { #size-cells =3D <0>; reg =3D <0x72>; i2c-mux-idle-disconnect; + vdd-supply =3D <&standby_power_regulator>; =20 imux20: i2c@0 { #address-cells =3D <1>; @@ -545,6 +559,7 @@ gpio@21 { reg =3D <0x21>; gpio-controller; #gpio-cells =3D <2>; + vcc-supply =3D <&standby_power_regulator>; gpio-line-names =3D "RST_CX_0_L-O", "RST_CX_1_L-O", @@ -584,6 +599,7 @@ i2c-mux@73 { #size-cells =3D <0>; reg =3D <0x73>; i2c-mux-idle-disconnect; + vdd-supply =3D <&standby_power_regulator>; =20 imux24: i2c@0 { #address-cells =3D <1>; @@ -602,6 +618,7 @@ i2c-mux@70 { #size-cells =3D <0>; reg =3D <0x70>; i2c-mux-idle-disconnect; + vdd-supply =3D <&standby_power_regulator>; =20 i2c25mux0: i2c@0 { #address-cells =3D <1>; @@ -648,6 +665,7 @@ i2c-mux@75 { #size-cells =3D <0>; reg =3D <0x75>; i2c-mux-idle-disconnect; + vdd-supply =3D <&standby_power_regulator>; =20 imux28: i2c@0 { #address-cells =3D <1>; @@ -712,6 +730,7 @@ i2c-mux@76 { #size-cells =3D <0>; reg =3D <0x76>; i2c-mux-idle-disconnect; + vdd-supply =3D <&standby_power_regulator>; =20 imux32: i2c@0 { #address-cells =3D <1>; @@ -729,6 +748,7 @@ gpio@21 { reg =3D <0x21>; gpio-controller; #gpio-cells =3D <2>; + vcc-supply =3D <&standby_power_regulator>; gpio-line-names =3D "SEC_RST_CX_0_L-O", "SEC_RST_CX_1_L-O", @@ -768,6 +788,7 @@ i2c-mux@77 { #size-cells =3D <0>; reg =3D <0x77>; i2c-mux-idle-disconnect; + vdd-supply =3D <&standby_power_regulator>; =20 imux36: i2c@0 { #address-cells =3D <1>; @@ -862,6 +883,7 @@ exp0: gpio@20 { #interrupt-cells =3D <2>; interrupt-parent =3D <&gpio1>; interrupts =3D ; + vcc-supply =3D <&standby_power_regulator>; gpio-line-names =3D "FPGA_THERM_OVERT_L-I", "FPGA_READY_BMC-I", @@ -891,6 +913,7 @@ exp1: gpio@21 { #interrupt-cells =3D <2>; interrupt-parent =3D <&gpio1>; interrupts =3D ; + vcc-supply =3D <&standby_power_regulator>; gpio-line-names =3D "SEC_FPGA_THERM_OVERT_L-I", "SEC_FPGA_READY_BMC-I", @@ -949,6 +972,7 @@ exp3: gpio@74 { #interrupt-cells =3D <2>; interrupt-parent =3D <&gpio1>; interrupts =3D ; + vcc-supply =3D <&standby_power_regulator>; gpio-line-names =3D "IOB_PRSNT_L", "IOB_DP_HPD", @@ -1014,6 +1038,7 @@ i2c-mux@77 { #size-cells =3D <0>; reg =3D <0x77>; i2c-mux-idle-disconnect; + vdd-supply =3D <&standby_power_regulator>; =20 e1si2c0: i2c@0 { #address-cells =3D <1>; @@ -1054,6 +1079,7 @@ i2c-mux@77 { #size-cells =3D <0>; reg =3D <0x77>; i2c-mux-idle-disconnect; + vdd-supply =3D <&standby_power_regulator>; =20 e1si2c4: i2c@0 { #address-cells =3D <1>; --=20 2.25.1