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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23e3b5e3cb7sm2002195ad.17.2025.07.17.16.28.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Jul 2025 16:28:56 -0700 (PDT) From: Jessica Zhang Date: Thu, 17 Jul 2025 16:28:45 -0700 Subject: [PATCH v3 3/5] dt-bindings: display/msm: drop assigned-clock-parents for dp controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250717-dp_mst_bindings-v3-3-72ce08285703@oss.qualcomm.com> References: <20250717-dp_mst_bindings-v3-0-72ce08285703@oss.qualcomm.com> In-Reply-To: <20250717-dp_mst_bindings-v3-0-72ce08285703@oss.qualcomm.com> To: Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kuogee Hsieh , Abel Vesa , Bjorn Andersson , Michael Turquette , Stephen Boyd , Mahadevan , Krishna Manikandan , Konrad Dybcio , Rob Clark , Abhinav Kumar , Jessica Zhang , Danila Tikhonov , cros-qcom-dts-watchers@chromium.org, Rob Clark Cc: Abhinav Kumar , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Krzysztof Kozlowski , Yongxing Mou X-Mailer: b4 0.15-dev-a9b2a X-Developer-Signature: v=1; a=ed25519-sha256; t=1752794927; l=7576; i=jessica.zhang@oss.qualcomm.com; s=20230329; h=from:subject:message-id; bh=Z7Q5MhFNW++3sg2l+MY10L8IMh9EAArq7s0Yr3E5sqQ=; b=bXvkMgRG/fOCiubHjM5Jn0LKe5/Q9lqISkXucJ1CRsxFEN778kZWlM3xXVklsfaaCbVIwiSFB ycoZ/YlAjoBCOiAORpn6mMaJdtIv28Sf0ik3WqYNt6hPeRhc20TpUZb X-Developer-Key: i=jessica.zhang@oss.qualcomm.com; a=ed25519; pk=gAUCgHZ6wTJOzQa3U0GfeCDH7iZLlqIEPo4rrjfDpWE= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzE3MDIwNiBTYWx0ZWRfXwrrZjX37D7aU 3pvXGO7JfANZdbensnFcznZ9WdeaCHYBifGdXIgAwVaFnWQBh0JUX1FkzuZ2RloVF0zBVIXboBP H+mLMxM5tQBwpLv7QKm366bGmPahr3Sg0z8kcWtP9Z/j3kr0MBBzL6OM7ctyYebM2noLaryi634 7pm4YT6NOVtaPh7Fe56lJmSapZP5ko3hKehBg++ucPJZH4IW/Qur0YRF54mGUPTU+sTrXvdI5q+ 1xJazbjHsrBxR0JsTdnwHHOBdnc21ncxGX6y/1I15hEZaK3/VfTjiaXBpQ4VDAt5DYJn4g8RKJT xfg7D0iuSDGLPoFco9TnOuj7gcXOwOWthwyN7SAP+8IphnnqnDTUKKyn04IPo1/cmGcBfm8pYQo yyIGhDyz4pD0hgWE6Uitj+40BVWUPUeiQl1YrJPANj722gVl4WDSEsQpHi8inVTyOmlmAOPG X-Proofpoint-GUID: p_pn2UIyzZ0rdJm5Zz9IkK94z3_73V5z X-Proofpoint-ORIG-GUID: p_pn2UIyzZ0rdJm5Zz9IkK94z3_73V5z X-Authority-Analysis: v=2.4 cv=Y+r4sgeN c=1 sm=1 tr=0 ts=6879873a cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=y-iibUknMj623qMt5boA:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-17_04,2025-07-17_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=987 phishscore=0 malwarescore=0 priorityscore=1501 adultscore=0 impostorscore=0 mlxscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507170206 From: Abhinav Kumar Current documentation of assigned-clock-parents for dp controller does not describe its functionality correctly making it harder to extend it for adding multiple streams. Instead of fixing up the documentation, drop the assigned-clock-parents and assigned-clocks along with the usages in the chipset specific MDSS yaml files. Signed-off-by: Abhinav Kumar Signed-off-by: Jessica Zhang --- .../devicetree/bindings/display/msm/dp-controller.yaml | 15 -----------= ---- .../bindings/display/msm/qcom,sa8775p-mdss.yaml | 4 ---- .../bindings/display/msm/qcom,sar2130p-mdss.yaml | 5 ----- .../devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml | 3 --- .../devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml | 6 ------ .../devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml | 5 ----- .../devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml | 5 ----- 7 files changed, 43 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.ya= ml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 4676aa8db2f4..d8d94f62c102 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -73,16 +73,6 @@ properties: - const: ctrl_link_iface - const: stream_pixel =20 - assigned-clocks: - items: - - description: link clock source - - description: pixel clock source - - assigned-clock-parents: - items: - - description: phy 0 parent - - description: phy 1 parent - phys: maxItems: 1 =20 @@ -209,11 +199,6 @@ examples: "ctrl_link", "ctrl_link_iface", "stream_pixel"; =20 - assigned-clocks =3D <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; - - assigned-clock-parents =3D <&dp_phy 0>, <&dp_phy 1>; - phys =3D <&dp_phy>; phy-names =3D "dp"; =20 diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mds= s.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.ya= ml index 1053b3bc4908..2dc76a074da1 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml @@ -391,10 +391,6 @@ examples: "ctrl_link_iface", "stream_pixel"; =20 - assigned-clocks =3D <&dispcc_mdss_dptx0_link_clk_src>, - <&dispcc_mdss_dptx0_pixel0_clk_src>; - assigned-clock-parents =3D <&mdss0_dp0_phy 0>, <&mdss0_dp0_phy= 1>; - phys =3D <&mdss0_dp0_phy>; phy-names =3D "dp"; =20 diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-md= ss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.= yaml index 870144b53cec..eef5627133db 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml @@ -214,11 +214,6 @@ examples: "ctrl_link_iface", "stream_pixel"; =20 - assigned-clocks =3D <&dispcc_disp_cc_mdss_dptx0_link_clk_src>, - <&dispcc_disp_cc_mdss_dptx0_pixel0_clk_src>; - assigned-clock-parents =3D <&usb_dp_qmpphy_QMP_USB43DP_DP_LINK= _CLK>, - <&usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DI= V_CLK>; - phys =3D <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>; phy-names =3D "dp"; =20 diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss= .yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml index 7a0555b15ddf..a2b71b476357 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml @@ -267,9 +267,6 @@ examples: <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>; clock-names =3D "core_iface", "core_aux", "ctrl_link", "ctrl_link_iface", "stream_pixel"; - assigned-clocks =3D <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; - assigned-clock-parents =3D <&dp_phy 0>, <&dp_phy 1>; phys =3D <&dp_phy>; phy-names =3D "dp"; =20 diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss= .yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml index 2947f27e0585..9e52ac9c0eb4 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml @@ -296,9 +296,6 @@ examples: "ctrl_link", "ctrl_link_iface", "stream_pixel"; - assigned-clocks =3D <&dispcc DISP_CC_MDSS_EDP_LINK_CLK_SRC>, - <&dispcc DISP_CC_MDSS_EDP_PIXEL_CLK_SRC>; - assigned-clock-parents =3D <&mdss_edp_phy 0>, <&mdss_edp_phy 1= >; =20 phys =3D <&mdss_edp_phy>; phy-names =3D "dp"; @@ -387,9 +384,6 @@ examples: "ctrl_link", "ctrl_link_iface", "stream_pixel"; - assigned-clocks =3D <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>, - <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>; - assigned-clock-parents =3D <&dp_phy 0>, <&dp_phy 1>; phys =3D <&dp_phy>; phy-names =3D "dp"; =20 diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss= .yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml index 13c5d5ffabde..eafea2fe1c95 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-mdss.yaml @@ -399,11 +399,6 @@ examples: "ctrl_link_iface", "stream_pixel"; =20 - assigned-clocks =3D <&dispcc_mdss_dp_link_clk_src>, - <&dispcc_mdss_dp_pixel_clk_src>; - assigned-clock-parents =3D <&dp_phy 0>, - <&dp_phy 1>; - operating-points-v2 =3D <&dp_opp_table>; power-domains =3D <&rpmhpd RPMHPD_CX>; =20 diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss= .yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml index 72c70edc1fb0..0858dd61fb0f 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml @@ -408,11 +408,6 @@ examples: "ctrl_link_iface", "stream_pixel"; =20 - assigned-clocks =3D <&disp_cc_mdss_dptx0_link_clk_src>, - <&disp_cc_mdss_dptx0_pixel0_clk_src>; - assigned-clock-parents =3D <&usb_dp_qmpphy QMP_USB43DP_DP_= LINK_CLK>, - <&usb_dp_qmpphy QMP_USB43DP_DP_VC= O_DIV_CLK>; - operating-points-v2 =3D <&dp_opp_table>; =20 power-domains =3D <&rpmhpd RPMHPD_MMCX>; --=20 2.50.1