From nobody Mon Oct 6 22:54:00 2025 Received: from mx.denx.de (mx.denx.de [89.58.32.78]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4357A2EE967; Wed, 16 Jul 2025 21:48:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=89.58.32.78 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752702494; cv=none; b=Y0gzq4kvbjW/X8vX2BHpuCalj7X4hepbwDCsY+o+pG6Ozw76lVzPTVmMw4BiuqiRA6LQ19Y/jp0KFkjlt7Z48O3K5PHOuBpFZp9LOvmmHdhI7DzKK32WPA7n+eaXU9mnjLLCHDHRUSPqU1xEoBaB9NaFNxcSPVduptK5cFPEvBY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752702494; c=relaxed/simple; bh=hJ+yl2w6p4DWPhNymbiW/Z7jxxUxDqPuktOALX3RR24=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Br42EZHQuEUP1TvDLKLbJgpL9BeIkCFuwNAZhJ1i93+RTtyvmeGi/NpjbOsOMGl9CkmTPjhBM6oNCHtsBNjqTgJIiwK0nRPo2r1UnTlqS3yBAuv8U0OO1fZcI07r2KTA591AX8He+wh/LXpGO2DvT2NBA9aWhZmL7CCbszuOnCM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=denx.de; spf=pass smtp.mailfrom=denx.de; dkim=pass (2048-bit key) header.d=denx.de header.i=@denx.de header.b=KdT1u/0i; arc=none smtp.client-ip=89.58.32.78 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=denx.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=denx.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=denx.de header.i=@denx.de header.b="KdT1u/0i" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 41E9610271A39; Wed, 16 Jul 2025 23:48:08 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=mx-20241105; t=1752702490; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=7Vz54bOiFc5vHYPuaKbpyds6vU+Xl305PQkp0TILMSo=; b=KdT1u/0i3AVO3r+qjtqeChGTws+uhE5mdanh5cxWAB23EzS6alVCak7owLsraCb2ZLUDbr WOdJMyFU/6aDLeyxWONpvlNPuLZyuXazdBj4OpUH+bnOeURaq6edzG+T86AlREiqonO7+j wwA3OhL6WTuX/RY64chriBU7WtUe9GwmTBvixI2b3cqQqUZoF37aBl8utUnad7yUcbotLm B7rUEupLK0wPllp5EtMX9WYKaxExHcwGzamY2LmuBD7T/yhbExdnMRIUnQ012wedEkVUm4 G1z95eQi/xmMEbECUPjEI30QMTCYVI2lynce+t8/6HmFeK42uDgxg6VY335Y4w== From: Lukasz Majewski To: Andrew Lunn , davem@davemloft.net, Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo Cc: Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Richard Cochran , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Stefan Wahren , Simon Horman , Lukasz Majewski Subject: [net-next v15 06/12] net: mtip: Add net_device_ops functions to the L2 switch driver Date: Wed, 16 Jul 2025 23:47:25 +0200 Message-Id: <20250716214731.3384273-7-lukma@denx.de> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250716214731.3384273-1-lukma@denx.de> References: <20250716214731.3384273-1-lukma@denx.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" This patch provides callbacks for struct net_device_ops for MTIP L2 switch. Signed-off-by: Lukasz Majewski --- Changes for v13: - New patch - created by excluding some code from large (i.e. v12 and earlier) MTIP driver Changes for v14: - Add read memory barier (rmb) before reading current descriptor - Use proper locking primitives Changes for v15: - None --- .../net/ethernet/freescale/mtipsw/mtipl2sw.c | 277 ++++++++++++++++++ 1 file changed, 277 insertions(+) diff --git a/drivers/net/ethernet/freescale/mtipsw/mtipl2sw.c b/drivers/net= /ethernet/freescale/mtipsw/mtipl2sw.c index b7e9f73fe4fa..3ec76b06f1f1 100644 --- a/drivers/net/ethernet/freescale/mtipsw/mtipl2sw.c +++ b/drivers/net/ethernet/freescale/mtipsw/mtipl2sw.c @@ -43,6 +43,15 @@ =20 #include "mtipl2sw.h" =20 +static void swap_buffer(void *bufaddr, int len) +{ + int i; + unsigned int *buf =3D bufaddr; + + for (i =3D 0; i < len; i +=3D 4, buf++) + swab32s(buf); +} + /* Set the last buffer to wrap */ static void mtip_set_last_buf_to_wrap(struct cbd_t *bdp) { @@ -444,6 +453,130 @@ static void mtip_config_switch(struct switch_enet_pri= vate *fep) fep->hwp + ESW_IMR); } =20 +static netdev_tx_t mtip_start_xmit_port(struct sk_buff *skb, + struct net_device *dev, int port) +{ + struct mtip_ndev_priv *priv =3D netdev_priv(dev); + struct switch_enet_private *fep =3D priv->fep; + unsigned short status; + struct cbd_t *bdp; + void *bufaddr; + + spin_lock(&fep->hw_lock); + + if (!fep->link[0] && !fep->link[1]) { + /* Link is down or autonegotiation is in progress. */ + netif_stop_queue(dev); + spin_unlock(&fep->hw_lock); + return NETDEV_TX_BUSY; + } + + /* Fill in a Tx ring entry */ + bdp =3D fep->cur_tx; + + /* Force read memory barier on the current transmit description */ + rmb(); + status =3D bdp->cbd_sc; + + if (status & BD_ENET_TX_READY) { + /* All transmit buffers are full. Bail out. + * This should not happen, since dev->tbusy should be set. + */ + netif_stop_queue(dev); + dev_err(&fep->pdev->dev, "%s: tx queue full!.\n", dev->name); + spin_unlock(&fep->hw_lock); + return NETDEV_TX_BUSY; + } + + /* Clear all of the status flags */ + status &=3D ~BD_ENET_TX_STATS; + + /* Set buffer length and buffer pointer */ + bufaddr =3D skb->data; + bdp->cbd_datlen =3D skb->len; + + /* On some FEC implementations data must be aligned on + * 4-byte boundaries. Use bounce buffers to copy data + * and get it aligned.spin + */ + if ((unsigned long)bufaddr & MTIP_ALIGNMENT) { + unsigned int index; + + index =3D bdp - fep->tx_bd_base; + memcpy(fep->tx_bounce[index], + (void *)skb->data, skb->len); + bufaddr =3D fep->tx_bounce[index]; + } + + if (fep->quirks & FEC_QUIRK_SWAP_FRAME) + swap_buffer(bufaddr, skb->len); + + /* Save skb pointer. */ + fep->tx_skbuff[fep->skb_cur] =3D skb; + + fep->skb_cur =3D (fep->skb_cur + 1) & TX_RING_MOD_MASK; + + /* Push the data cache so the CPM does not get stale memory + * data. + */ + bdp->cbd_bufaddr =3D dma_map_single(&fep->pdev->dev, bufaddr, + MTIP_SWITCH_TX_FRSIZE, + DMA_TO_DEVICE); + if (unlikely(dma_mapping_error(&fep->pdev->dev, bdp->cbd_bufaddr))) { + dev_err(&fep->pdev->dev, + "Failed to map descriptor tx buffer\n"); + dev->stats.tx_errors++; + dev->stats.tx_dropped++; + dev_kfree_skb_any(skb); + goto err; + } + + /* Send it on its way. Tell FEC it's ready, interrupt when done, + * it's the last BD of the frame, and to put the CRC on the end. + */ + + status |=3D (BD_ENET_TX_READY | BD_ENET_TX_INTR + | BD_ENET_TX_LAST | BD_ENET_TX_TC); + + /* Synchronize all descriptor writes */ + wmb(); + bdp->cbd_sc =3D status; + + netif_trans_update(dev); + skb_tx_timestamp(skb); + + /* Trigger transmission start */ + writel(MCF_ESW_TDAR_X_DES_ACTIVE, fep->hwp + ESW_TDAR); + + dev->stats.tx_bytes +=3D skb->len; + /* If this was the last BD in the ring, + * start at the beginning again. + */ + if (status & BD_ENET_TX_WRAP) + bdp =3D fep->tx_bd_base; + else + bdp++; + + if (bdp =3D=3D fep->dirty_tx) { + fep->tx_full =3D 1; + netif_stop_queue(dev); + } + + fep->cur_tx =3D bdp; + err: + spin_unlock(&fep->hw_lock); + + return NETDEV_TX_OK; +} + +static netdev_tx_t mtip_start_xmit(struct sk_buff *skb, + struct net_device *dev) +{ + struct mtip_ndev_priv *priv =3D netdev_priv(dev); + + return mtip_start_xmit_port(skb, dev, priv->portnum); +} + static void mtip_configure_enet_mii(struct switch_enet_private *fep, int p= ort) { struct phy_device *phydev =3D fep->phy_dev[port - 1]; @@ -601,6 +734,70 @@ static void mtip_switch_restart(struct net_device *dev= , int duplex0, mtip_config_switch(fep); } =20 +static void mtip_timeout(struct net_device *dev, unsigned int txqueue) +{ + struct mtip_ndev_priv *priv =3D netdev_priv(dev); + struct switch_enet_private *fep =3D priv->fep; + struct cbd_t *bdp; + int i; + + dev->stats.tx_errors++; + + if (IS_ENABLED(CONFIG_SWITCH_DEBUG)) { + spin_lock(&fep->hw_lock); + dev_info(&dev->dev, "%s: transmit timed out.\n", dev->name); + dev_info(&dev->dev, + "Ring data: cur_tx %lx%s, dirty_tx %lx cur_rx: %lx\n", + (unsigned long)fep->cur_tx, + fep->tx_full ? " (full)" : "", + (unsigned long)fep->dirty_tx, + (unsigned long)fep->cur_rx); + + bdp =3D fep->tx_bd_base; + dev_info(&dev->dev, " tx: %u buffers\n", TX_RING_SIZE); + for (i =3D 0; i < TX_RING_SIZE; i++) { + dev_info(&dev->dev, " %08lx: %04x %04x %08x\n", + (kernel_ulong_t)bdp, bdp->cbd_sc, + bdp->cbd_datlen, (int)bdp->cbd_bufaddr); + bdp++; + } + + bdp =3D fep->rx_bd_base; + dev_info(&dev->dev, " rx: %lu buffers\n", + (unsigned long)RX_RING_SIZE); + for (i =3D 0 ; i < RX_RING_SIZE; i++) { + dev_info(&dev->dev, " %08lx: %04x %04x %08x\n", + (kernel_ulong_t)bdp, + bdp->cbd_sc, bdp->cbd_datlen, + (int)bdp->cbd_bufaddr); + bdp++; + } + spin_unlock(&fep->hw_lock); + } + + schedule_work(&priv->tx_timeout_work); +} + +static void mtip_timeout_work(struct work_struct *work) +{ + struct mtip_ndev_priv *priv =3D + container_of(work, struct mtip_ndev_priv, tx_timeout_work); + struct switch_enet_private *fep =3D priv->fep; + struct net_device *dev =3D priv->dev; + + rtnl_lock(); + if (netif_device_present(dev) || netif_running(dev)) { + napi_disable(&fep->napi); + netif_tx_lock_bh(dev); + mtip_switch_restart(dev, fep->full_duplex[0], + fep->full_duplex[1]); + netif_tx_wake_all_queues(dev); + netif_tx_unlock_bh(dev); + napi_enable(&fep->napi); + } + rtnl_unlock(); +} + static irqreturn_t mtip_interrupt(int irq, void *ptr_fep) { struct switch_enet_private *fep =3D ptr_fep; @@ -1079,6 +1276,80 @@ static int mtip_close(struct net_device *dev) return 0; } =20 +#define FEC_HASH_BITS 6 /* #bits in hash */ +static void mtip_set_multicast_list(struct net_device *dev) +{ + struct mtip_ndev_priv *priv =3D netdev_priv(dev); + unsigned int hash_high =3D 0, hash_low =3D 0, crc; + struct switch_enet_private *fep =3D priv->fep; + void __iomem *enet_addr =3D fep->enet_addr; + struct netdev_hw_addr *ha; + unsigned char hash; + + if (priv->portnum =3D=3D 2) + enet_addr +=3D MCF_ESW_ENET_PORT_OFFSET; + + if (dev->flags & IFF_PROMISC) { + /* Promisc mode is required for switch - it is + * already enabled during driver's probe. + */ + dev_dbg(&dev->dev, "%s: IFF_PROMISC\n", __func__); + return; + } + + if (dev->flags & IFF_ALLMULTI) { + dev_dbg(&dev->dev, "%s: IFF_ALLMULTI\n", __func__); + + /* Allow all multicast addresses */ + writel(0xFFFFFFFF, enet_addr + MCF_FEC_GRP_HASH_TABLE_HIGH); + writel(0xFFFFFFFF, enet_addr + MCF_FEC_GRP_HASH_TABLE_LOW); + + return; + } + + netdev_for_each_mc_addr(ha, dev) { + /* Calculate crc32 value of mac address */ + crc =3D ether_crc_le(dev->addr_len, ha->addr); + + /* Only upper 6 bits (FEC_HASH_BITS) are used + * which point to specific bit in the hash registers + */ + hash =3D (crc >> (32 - FEC_HASH_BITS)) & 0x3F; + + if (hash > 31) + hash_high |=3D 1 << (hash - 32); + else + hash_low |=3D 1 << hash; + } + + writel(hash_high, enet_addr + MCF_FEC_GRP_HASH_TABLE_HIGH); + writel(hash_low, enet_addr + MCF_FEC_GRP_HASH_TABLE_LOW); +} + +static int mtip_set_mac_address(struct net_device *dev, void *p) +{ + struct mtip_ndev_priv *priv =3D netdev_priv(dev); + struct switch_enet_private *fep =3D priv->fep; + void __iomem *enet_addr =3D fep->enet_addr; + struct sockaddr *addr =3D p; + + if (!is_valid_ether_addr(addr->sa_data)) + return -EADDRNOTAVAIL; + eth_hw_addr_set(dev, addr->sa_data); + + if (priv->portnum =3D=3D 2) + enet_addr +=3D MCF_ESW_ENET_PORT_OFFSET; + + writel(dev->dev_addr[3] | (dev->dev_addr[2] << 8) | + (dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24), + enet_addr + MCF_FEC_PALR); + writel((dev->dev_addr[5] << 16) | (dev->dev_addr[4] << 24), + enet_addr + MCF_FEC_PAUR); + + return mtip_update_atable_static((unsigned char *)dev->dev_addr, + 7, 7, fep); +} + static const struct ethtool_ops mtip_ethtool_ops =3D { .get_link_ksettings =3D phy_ethtool_get_link_ksettings, .set_link_ksettings =3D phy_ethtool_set_link_ksettings, @@ -1090,6 +1361,10 @@ static const struct ethtool_ops mtip_ethtool_ops =3D= { static const struct net_device_ops mtip_netdev_ops =3D { .ndo_open =3D mtip_open, .ndo_stop =3D mtip_close, + .ndo_start_xmit =3D mtip_start_xmit, + .ndo_set_rx_mode =3D mtip_set_multicast_list, + .ndo_tx_timeout =3D mtip_timeout, + .ndo_set_mac_address =3D mtip_set_mac_address, }; =20 bool mtip_is_switch_netdev_port(const struct net_device *ndev) @@ -1191,6 +1466,8 @@ static int mtip_ndev_init(struct switch_enet_private = *fep, break; } =20 + INIT_WORK(&priv->tx_timeout_work, mtip_timeout_work); + dev_dbg(&fep->ndev[i]->dev, "%s: MTIP eth L2 switch %pM\n", fep->ndev[i]->name, fep->ndev[i]->dev_addr); } --=20 2.39.5