From nobody Tue Oct 7 01:56:31 2025 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 323642E9757; Wed, 16 Jul 2025 06:01:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.235 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752645691; cv=none; b=dMxv40M+dbeFhc2bIV0VOxhUPTy3jJXcPvhNh0gOUgqciD41/llvZzqEB2Ey4yMmZpCWbluuI8sT1WCs0MGa6Z+ymLQ1Dw9BWXaJMOl3or9rSHT6KMweIkjGfIlh07X51OOg3LzKYPKDXQI9OSubEG9w4sYHKEyY3BqbMbntbwY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752645691; c=relaxed/simple; bh=JDlsnb4qOLQxtm4TKybZFmQ2iVxN2lUXzr9DjhHey/c=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=a58UAyh0bRiUFGdkZ67t18pPC7hc068FFHwIhItldYtpLtlG+u2P3cZmgElrANnNlHSjUYnLkpNGjRw58rb0cAJ2kophS8v/t7pDAaocPbnKBvsv9T2OEQ5YEC1yj1MqeRfb0KlAUBu4+9N2Qsv7oyKhYq3EtbNGC2Mh77Z60CE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=sYMQE+OM; arc=none smtp.client-ip=198.47.23.235 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="sYMQE+OM" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by lelvem-ot02.ext.ti.com (8.15.2/8.15.2) with ESMTP id 56G61PQR181247; Wed, 16 Jul 2025 01:01:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1752645685; bh=EGbb2VVDXkVq9Mk+LArLTy57IGz2Nbzi9/lfpoM+65o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=sYMQE+OMnE8FJsGcGYroBtJy6QBUrOVn+3VMO0TuxBpxO5EBw3zb6EmY6qHY8sB2e oLlkicdqoje0t9UICLMtusziclDwzk+vouBCrwqu+bmCWvtCl79htWvvidCiK4J6Qv q2zzeJigpFwrFfYqRjbxhthQzPxDCNd04a7JCyns= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 56G61PXt1145918 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 16 Jul 2025 01:01:25 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 16 Jul 2025 01:01:25 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 16 Jul 2025 01:01:25 -0500 Received: from localhost (jayesh-hp-z2-tower-g5-workstation.dhcp.ti.com [172.24.227.166]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 56G61OoK3833060; Wed, 16 Jul 2025 01:01:24 -0500 From: Jayesh Choudhary To: , CC: , , , , , , , , , Subject: [PATCH v3 5/7] arm64: dts: ti: k3-j721s2-som-p0: add DSI to eDP Date: Wed, 16 Jul 2025 11:31:12 +0530 Message-ID: <20250716060114.52122-6-j-choudhary@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250716060114.52122-1-j-choudhary@ti.com> References: <20250716060114.52122-1-j-choudhary@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" From: Rahul T R Add DT nodes for DSI to eDP bridge. The DSI to eDP bridge used is SN65DSI86 on SOM. Signed-off-by: Rahul T R Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 51 ++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot= /dts/ti/k3-j721s2-som-p0.dtsi index 54fc5c4f8c3f..194f34cb08d2 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -152,6 +152,30 @@ transceiver0: can-phy0 { #phy-cells =3D <0>; max-bitrate =3D <5000000>; }; + + vsys_io_1v8: regulator-vsys-io-1v8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vsys_io_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + vsys_io_1v2: regulator-vsys-io-1v2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vsys_io_1v2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + edp1_refclk: clock-edp1-refclk { + #clock-cells =3D <0>; + compatible =3D "fixed-clock"; + clock-frequency =3D <19200000>; + }; }; =20 &wkup_pmx0 { @@ -630,3 +654,30 @@ &c71_1 { memory-region =3D <&c71_1_dma_memory_region>, <&c71_1_memory_region>; }; + +&main_i2c4 { + bridge_dsi_edp: bridge-dsi-edp@2c { + compatible =3D "ti,sn65dsi86"; + reg =3D <0x2c>; + clock-names =3D "refclk"; + clocks =3D <&edp1_refclk>; + enable-gpios =3D <&exp_som 5 0>; + vpll-supply =3D <&vsys_io_1v8>; + vccio-supply =3D <&vsys_io_1v8>; + vcca-supply =3D <&vsys_io_1v2>; + vcc-supply =3D <&vsys_io_1v2>; + + dsi_edp_bridge_ports: ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + }; + + port@1 { + reg =3D <1>; + }; + }; + }; +}; --=20 2.34.1