From nobody Tue Oct 7 01:56:33 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 204492E8E04; Wed, 16 Jul 2025 06:01:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752645688; cv=none; b=dlEZ0S4JfVdXXwadWNUYs6QK9vA3PwiLjhzxjj7CBQySfhF10MxUd51XNIGo47IcCudPqwrSL/3Vs5/l3lOm+UhaKCrxDEX4dQk4xIzbHugvSjyljJAugA99Xiex+7hnA8QbmMN3EL33IxHNcfNbcUd7NtDLiZWVJYnl8VSh47c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752645688; c=relaxed/simple; bh=zQt8S3CLXfWkf+M5qQ6BLGEDAWOk6LiBrYHizyFAKFA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QOUzBI+nq+gCvQ6Ab8IHHDNPEPim/atwIu9VldVzlbJL+fNMCCRS0651StI7Okd7odIFQgbM+hyJiBwX/eiWUH29/ZSuYf/f4i051C1apwV8XN/mG88SiLFSfoIPga324G62fT9QZ6RzDykN1fyjX3tfCeYZd7v8bsPDsbJRNc4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=CQF9n9Jq; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="CQF9n9Jq" Received: from fllvem-sh03.itg.ti.com ([10.64.41.86]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTP id 56G61M25178212; Wed, 16 Jul 2025 01:01:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1752645682; bh=Xb3iRxXvGk20O23xKEKRuA+Ow7dsmLleFKY4SD/OGQI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=CQF9n9Jqt0ntEZwcO0O9PC7MlFTDlkT/j3psYaltP2A7nqmMlA55xYkO5MCzRh1uH WPslolGg9EFQSzL5O9zsSROHivUMKRoi/eOLrfHVKH7b3uZZPL1iTHmQ73eiEd4Apu QvUZ8LqpQPemEbj/xgIUGvDNZHrxkfdh3IpS+ZE0= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllvem-sh03.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 56G61Li1622895 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 16 Jul 2025 01:01:22 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 16 Jul 2025 01:01:21 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 16 Jul 2025 01:01:21 -0500 Received: from localhost (jayesh-hp-z2-tower-g5-workstation.dhcp.ti.com [172.24.227.166]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 56G61K583833010; Wed, 16 Jul 2025 01:01:20 -0500 From: Jayesh Choudhary To: , CC: , , , , , , , , , Subject: [PATCH v3 3/7] arm64: dts: ti: k3-j721s2-main: add DSI & DSI PHY Date: Wed, 16 Jul 2025 11:31:10 +0530 Message-ID: <20250716060114.52122-4-j-choudhary@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250716060114.52122-1-j-choudhary@ti.com> References: <20250716060114.52122-1-j-choudhary@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" From: Rahul T R Add DT nodes for DPI to DSI Bridge and DSI Phy. The DSI bridge is Cadence DSI and the PHY is a Cadence DPHY with TI wrapper. Signed-off-by: Rahul T R [j-choudhary@ti.com: disable dsi and dphy nodes, rename dphy node] Signed-off-by: Jayesh Choudhary --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index 62f45377a2c9..c31d7f3eab28 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -1795,6 +1795,45 @@ main_spi7: spi@2170000 { status =3D "disabled"; }; =20 + dphy_tx0: phy@4480000 { + compatible =3D "ti,j721e-dphy"; + reg =3D <0x00 0x04480000 0x00 0x00001000>; + clocks =3D <&k3_clks 363 8>, <&k3_clks 363 14>; + clock-names =3D "psm", "pll_ref"; + #phy-cells =3D <0>; + power-domains =3D <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 363 14>; + assigned-clock-parents =3D <&k3_clks 363 15>; + assigned-clock-rates =3D <19200000>; + status =3D "disabled"; + }; + + dsi0: dsi@4800000 { + compatible =3D "ti,j721e-dsi"; + reg =3D <0x00 0x04800000 0x00 0x00100000>, + <0x00 0x04710000 0x00 0x00000100>; + clocks =3D <&k3_clks 154 4>, <&k3_clks 154 1>; + clock-names =3D "dsi_p_clk", "dsi_sys_clk"; + power-domains =3D <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + interrupts =3D ; + phys =3D <&dphy_tx0>; + phy-names =3D "dphy"; + status =3D "disabled"; + + dsi0_ports: ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + }; + + port@1 { + reg =3D <1>; + }; + }; + }; + dss: dss@4a00000 { compatible =3D "ti,j721e-dss"; reg =3D <0x00 0x04a00000 0x00 0x10000>, /* common_m */ --=20 2.34.1