From nobody Tue Oct 7 01:56:33 2025 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 773132E36E1; Wed, 16 Jul 2025 06:01:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752645685; cv=none; b=pPg+0hNbE0SJRVOndfYpFhilQy3mglmNjwkoHYo2ouPlCpK62C8B/mlPUWO0ToRFCAu1DdbWQevyWZXGa/UvVWr7vkGvxpri+LdtptTOmVAU2wy6tqO93ILvtStYxQQFKKePbq8hIbDAyUsZDe/fjhU1X5/Ri7HxrI5QKJQTJ1w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752645685; c=relaxed/simple; bh=1fCStZX3mt915rvbulJ87SbYb7H/Cy4thel9HGPGw/g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=c5JHeRvXBGvcBnmivgYY582HyMt7Fe/Nr9Y3Jp48TP1PZ545N/TZW7XA8QO86AWbSwvQHGsHFeB1JLI5wNQ9C+oI7/UbCFLzhU3t5yeALpZ1ie6+r2fWgzVJT4EplaQUT0OtLsWuPfELhpMXyIIs7c+uhwqNEY2Zc4ov2BPIr9E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=URcwswEW; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="URcwswEW" Received: from fllvem-sh03.itg.ti.com ([10.64.41.86]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 56G61IHg2432886; Wed, 16 Jul 2025 01:01:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1752645678; bh=7w+S7GFgr0YHVfJ4iWbaw2/Qd8QSI91jR74dH7GPb4k=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=URcwswEWjv26/eP3Olbh3S8QLQYD5n0qd4TthfHjwA+BZFHqeLX1rhmC5v/5rOydm 40onyYOED1q7NgRL8pEiVEl5GWfIj6QGx0eEmxQs54NLH5BKIPBUfXFJg9jq2ikesd bpjNN7HzPLGsAzksLJq8V0jQl4merqvv7JpoP39Y= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by fllvem-sh03.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 56G61HUD622808 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=FAIL); Wed, 16 Jul 2025 01:01:18 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55; Wed, 16 Jul 2025 01:01:17 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.55 via Frontend Transport; Wed, 16 Jul 2025 01:01:17 -0500 Received: from localhost (jayesh-hp-z2-tower-g5-workstation.dhcp.ti.com [172.24.227.166]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 56G61GRe3832848; Wed, 16 Jul 2025 01:01:17 -0500 From: Jayesh Choudhary To: , CC: , , , , , , , , , Subject: [PATCH v3 1/7] arm64: dts: ti: k3-j784s4-j742s2-main-common: add DSI & DSI PHY Date: Wed, 16 Jul 2025 11:31:08 +0530 Message-ID: <20250716060114.52122-2-j-choudhary@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250716060114.52122-1-j-choudhary@ti.com> References: <20250716060114.52122-1-j-choudhary@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Add DT nodes for DPI to DSI Bridge and DSI Phy. The DSI bridge is Cadence DSI and the PHY is a Cadence DPHY with TI wrapper. Signed-off-by: Jayesh Choudhary --- .../dts/ti/k3-j784s4-j742s2-main-common.dtsi | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arc= h/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi index 7c5b0c69897d..79d97d46b4c6 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi @@ -2522,6 +2522,45 @@ watchdog18: watchdog@2550000 { status =3D "reserved"; }; =20 + dphy_tx0: phy@4480000 { + compatible =3D "ti,j721e-dphy"; + reg =3D <0x00 0x04480000 0x00 0x00001000>; + clocks =3D <&k3_clks 402 20>, <&k3_clks 402 3>; + clock-names =3D "psm", "pll_ref"; + #phy-cells =3D <0>; + power-domains =3D <&k3_pds 402 TI_SCI_PD_EXCLUSIVE>; + assigned-clocks =3D <&k3_clks 402 3>; + assigned-clock-parents =3D <&k3_clks 402 4>; + assigned-clock-rates =3D <19200000>; + status =3D "disabled"; + }; + + dsi0: dsi@4800000 { + compatible =3D "ti,j721e-dsi"; + reg =3D <0x00 0x04800000 0x00 0x00100000>, + <0x00 0x04710000 0x00 0x00000100>; + clocks =3D <&k3_clks 215 2>, <&k3_clks 215 5>; + clock-names =3D "dsi_p_clk", "dsi_sys_clk"; + power-domains =3D <&k3_pds 215 TI_SCI_PD_EXCLUSIVE>; + interrupts =3D ; + phys =3D <&dphy_tx0>; + phy-names =3D "dphy"; + status =3D "disabled"; + + dsi0_ports: ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + }; + + port@1 { + reg =3D <1>; + }; + }; + }; + mhdp: bridge@a000000 { compatible =3D "ti,j721e-mhdp8546"; reg =3D <0x0 0xa000000 0x0 0x30a00>, --=20 2.34.1