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De Francesco" , Terry Bowman , Robert Richter Subject: [PATCH v1 16/20] cxl/region: Introduce @hpa_range to struct cxl_region Date: Tue, 15 Jul 2025 21:11:39 +0200 Message-ID: <20250715191143.1023512-17-rrichter@amd.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250715191143.1023512-1-rrichter@amd.com> References: <20250715191143.1023512-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E3:EE_|DM4PR12MB6592:EE_ X-MS-Office365-Filtering-Correlation-Id: 768133f5-d53b-4ddf-088f-08ddc3d3a40a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|36860700013|7416014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?exwerZaCsvu+zX45ey2EM5TrGour4Q5PUKmU6np9IzUPfBlaTey9LmuYkdjK?= =?us-ascii?Q?Pj1X2+bq7s+717ngy07yx+Rctzf2Dko4iiXREWFs3E+v5CsCgYOkkznF/TpS?= =?us-ascii?Q?GqEXo4vJJ/nL4JLaPF8RSyNvI6AxHXn2QCEBBIBiuNo09CClZhBeejYfIZ//?= =?us-ascii?Q?5D3Yvd/54ib5OVJpEWSv1AYeNLkSwuIm4bwiNbYizTGxO0CIwNSSi6Q7WZDS?= =?us-ascii?Q?k4GWPcr+5Ac1TiASFyVHHx1b3+EwctcFWrJh6LjLhc+Y4xpt/DAA2cYpGZlp?= =?us-ascii?Q?eeakc8FoLmmOl9PFt3ZOPkD209P8Sp1L5w6yfISK7G6afElOuXPpLhgX6w6C?= =?us-ascii?Q?LcNgZAJkTxNbxni8hF9wLzeIgHzMfvUSyua6onbqHTpugDpPQG5j7Ilvv0ET?= =?us-ascii?Q?jcY/7BTgNj9PCNo3P8l3+jPqyE6MzBXD0/PbpNMxPQECnRKBi2eZix3pAizU?= =?us-ascii?Q?7CjpdsiE/xbC+8b0xBO4uGMJZ1T99rBuHjM1DgVnkgg9uhLb2r87VQHrey3o?= =?us-ascii?Q?NOUbd5FFvmTFR2pdu9L7fIMmVgLxqEx5ZPUxCJKq2X1igbjBdavcWxS3t7tl?= =?us-ascii?Q?2HpLj9+aW2beZBPxzXM8inhv4q7I/SLFEAn5PCAqnGUECv0BCrOqX3pFoFEF?= =?us-ascii?Q?E9lGZBODOYaWNcM1ou5Gq/Gtj6E7RY5k7/wz538c1SCdxqEbb/puuVV8Otas?= =?us-ascii?Q?UAGCv7YSGp4deumSygehUs2axUhiXS/iORZcMHwCq2yklbQZW0qwLbTMjxuQ?= =?us-ascii?Q?2nKdj33gIicoqs6Ze3xdeg3/hTDgUzY3suOBBjjPQRzJRdUr1rNOc/D5UYHH?= =?us-ascii?Q?ttkILXJc0NilWnT8vg6hPYaTK6ofMsgaZ9FO2I5/FCNIN0qOsr38Zf62BsyV?= =?us-ascii?Q?M6i+szMfWSqMCQbGkwPmHYMXS0VUgEOi3EMUoICUY/hkXUQfU5BJHPGVNrrU?= =?us-ascii?Q?zXtEhS1P9g66sK0T1dJ7gq2YWIOxxMkBQO+rVcWqJCTy7Klwg7rIBjDpSGV7?= =?us-ascii?Q?G3zfSPti7Vh30Fm7VZS8fXO07xpT50IlfzR39ttJ2W5IibP7u+9N7uFPJ7hn?= =?us-ascii?Q?WyWHd43I30deVV5XzF9PUdwR1kiyT8Bbx1Ep3Iz8BJ8Ps7nEtmnO7PhzvKVf?= =?us-ascii?Q?ytS5XA6jDyuGgX5w/mDi9TuBWG7q7qc6O6IHQIMXzxrocNzPBwBaN9f7jEKe?= =?us-ascii?Q?Rsxx8eX9MgzhVWajZsoXNpURfIj2Ogc3HCPsQ9fMSF8DpJMQWkA6jNmZ0ER7?= =?us-ascii?Q?yivVwPnzYGgJ58vD9VKbRYKhj8mQxbM24lq/e7oaBDQJIfFH/n0SpYxjMQgz?= =?us-ascii?Q?4ypIl347BhfBOl8sYzBK2i1bKim0NmzS7u1FWGrzmaLJTtgMG4TcAk5enh3O?= =?us-ascii?Q?NTQUbRDPHBmgv8JBwYGsoZxF+DZGbOGJij4oKdBySBMf6AuSN7HzVJ+oKJPd?= =?us-ascii?Q?ZdY22zwt08oFGwSJ0DhWVqwvbslwftfaIFxQOIYdwrvrlpMMtVvKKp1SGvON?= =?us-ascii?Q?by/MGi5q+4wT3Ab2voDkLR1ip3SBotDS4o/H?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(376014)(36860700013)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jul 2025 19:13:11.3672 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 768133f5-d53b-4ddf-088f-08ddc3d3a40a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E3.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6592 Content-Type: text/plain; charset="utf-8" Each region has a known host physical address (HPA) range it is assigned to. All assigned ports to that region share the same hpa range. The region's address range is the system's physical address (SPA) range. That is, for regions there is hpa =3D=3D spa. As systems with address translation have hpa !=3D spa, track the region's spa range and introduce @hpa_range to struct cxl_region. The introduction of @hpa_range also helps further reworking construct_region() in order to move the create_region() call out of the function and remove @cxled from the parameter list. Signed-off-by: Robert Richter --- drivers/cxl/core/region.c | 18 ++++++++++++++++++ drivers/cxl/cxl.h | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 81ff9956a128..7e21946072a5 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -653,6 +653,11 @@ static int alloc_hpa(struct cxl_region *cxlr, resource= _size_t size) return PTR_ERR(res); } =20 + cxlr->hpa_range =3D (struct range) { + .start =3D res->start, + .end =3D res->end, + }; + p->res =3D res; p->state =3D CXL_CONFIG_INTERLEAVE_ACTIVE; =20 @@ -689,8 +694,14 @@ static int free_hpa(struct cxl_region *cxlr) if (p->state >=3D CXL_CONFIG_ACTIVE) return -EBUSY; =20 + cxlr->hpa_range =3D (struct range) { + .start =3D 0, + .end =3D -1, + }; + cxl_region_iomem_release(cxlr); p->state =3D CXL_CONFIG_IDLE; + return 0; } =20 @@ -2496,6 +2507,11 @@ static void unregister_region(void *_cxlr) for (i =3D 0; i < p->interleave_ways; i++) detach_target(cxlr, i); =20 + cxlr->hpa_range =3D (struct range) { + .start =3D 0, + .end =3D -1, + }; + cxl_region_iomem_release(cxlr); put_device(&cxlr->dev); } @@ -3354,6 +3370,7 @@ static struct cxl_region *create_region(struct cxl_ro= ot_decoder *cxlrd, struct cxl_dev_state *cxlds =3D cxlmd->cxlds; int part =3D READ_ONCE(cxled->part); enum cxl_partition_mode mode =3D cxlds->part[part].mode; + struct range *hpa =3D &cxled->cxld.hpa_range; struct cxl_region *cxlr; struct cxl_region_params *p; =20 @@ -3381,6 +3398,7 @@ static struct cxl_region *create_region(struct cxl_ro= ot_decoder *cxlrd, cxlr->mode =3D mode; cxlr->type =3D CXL_DECODER_HOSTONLYMEM; set_bit(CXL_REGION_F_AUTO, &cxlr->flags); + cxlr->hpa_range =3D *hpa; =20 p =3D &cxlr->params; p->interleave_ways =3D cxled->cxld.interleave_ways; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 58c9db0bfb93..cdca44556039 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -509,6 +509,7 @@ enum cxl_partition_mode { * @dev: This region's device * @id: This region's id. Id is globally unique across all regions * @cxlrd: Region's root decoder + * @hpa_range: Address range occupied by the region * @mode: Operational mode of the mapped capacity * @type: Endpoint decoder target type * @cxl_nvb: nvdimm bridge for coordinating @cxlr_pmem setup / shutdown @@ -523,6 +524,7 @@ struct cxl_region { struct device dev; int id; struct cxl_root_decoder *cxlrd; + struct range hpa_range; enum cxl_partition_mode mode; enum cxl_decoder_type type; struct cxl_nvdimm_bridge *cxl_nvb; --=20 2.39.5