From nobody Tue Oct 7 03:46:25 2025 Received: from out-178.mta0.migadu.com (out-178.mta0.migadu.com [91.218.175.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A9CD1553A3 for ; Tue, 15 Jul 2025 00:31:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752539472; cv=none; b=a00zkNSM+G/1+9D3CTeQJs1kFBOzetBThWr7VpGF1DGdYkNMs0iu/PSfTYeC1A4ic4SAc0FGMU0+Kj8Xa1/BkSJOAlmS9JsR5kfVXu/zKN3KKPmLLDUwDQC4ShMRjtKKbALr/vV+N9TM5dZMyAX1i2ezbvLWW5fatCvlrOIrG1I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752539472; c=relaxed/simple; bh=KHBShwx13Brlud17Z84sprTSDgu/vR45VEn53e6CKaQ=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version:Content-Type; b=mEXqQK4mJPfCVc97aUgXqHv7CR9Z1LvplD/5YuoQCFhWdUsTg1JVtzMLD3feL/OkwG414bErIBblIE2H2b2j4xTBcLuAlBN09d/u8lfrAApkSPAfkU33yFn7Orh/+fSP7+PlexRZz95L+CqrTBkrdDQgBYNSSM1eD9ODYQ1Xwow= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=MI77X64Q; arc=none smtp.client-ip=91.218.175.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="MI77X64Q" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1752539467; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=STz3NT6y6RagnMrWHCWQVdhmEkfEks/Zf/QqC5h+S6I=; b=MI77X64Qk12m0jlXaX1oaaVF57JMt0SPnnWdfBwKx21W3OGkYlad02xZbas7370vNOuoKm wI2DgPZ/K3H+XspGMc96jx89bdm/iqLhCIrQ36SdL6/kSNLr/tMdrDd/EkZUlQPiTSQpJ3 h2WdTAQ+M2KTf2DHuJTR7/4NdB97+kg= From: Sean Anderson To: Anand Ashok Dumbre , Jonathan Cameron , linux-iio@vger.kernel.org Cc: Andy Shevchenko , linux-kernel@vger.kernel.org, Michal Simek , linux-arm-kernel@lists.infradead.org, David Lechner , Manish Narani , =?UTF-8?q?Nuno=20S=C3=A1?= , Sean Anderson Subject: [PATCH] iio: xilinx-ams: Fix AMS_ALARM_THR_DIRECT_MASK Date: Mon, 14 Jul 2025 20:30:58 -0400 Message-Id: <20250715003058.2035656-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" AMS_ALARM_THR_DIRECT_MASK should be bit 0, not bit 1. This would cause hysteresis to be enabled with a lower threshold of -28C. The temperature alarm would never deassert even if the temperature dropped below the upper threshold. Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver") Signed-off-by: Sean Anderson --- drivers/iio/adc/xilinx-ams.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c index 76dd0343f5f7..552190dd0e6e 100644 --- a/drivers/iio/adc/xilinx-ams.c +++ b/drivers/iio/adc/xilinx-ams.c @@ -118,7 +118,7 @@ #define AMS_ALARM_THRESHOLD_OFF_10 0x10 #define AMS_ALARM_THRESHOLD_OFF_20 0x20 =20 -#define AMS_ALARM_THR_DIRECT_MASK BIT(1) +#define AMS_ALARM_THR_DIRECT_MASK BIT(0) #define AMS_ALARM_THR_MIN 0x0000 #define AMS_ALARM_THR_MAX (BIT(16) - 1) =20 --=20 2.35.1.1320.gc452695387.dirty