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Tue, 15 Jul 2025 01:00:25 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEGJPmUVXgZeF5AcyIX9Qqrf+IeLmaw1JN/eZ33zIxqduI0v4jQ3JZp+JsOcJoFG7UWh9aXHw== X-Received: by 2002:a05:622a:1927:b0:4ab:66f8:7792 with SMTP id d75a77b69052e-4ab66f87cd5mr147318561cf.50.1752566424935; Tue, 15 Jul 2025 01:00:24 -0700 (PDT) Received: from [192.168.1.17] ([120.60.140.219]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-4ab3f1c9a2csm37792461cf.67.2025.07.15.01.00.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jul 2025 01:00:24 -0700 (PDT) From: Manivannan Sadhasivam Date: Tue, 15 Jul 2025 13:29:19 +0530 Subject: [PATCH v5 2/4] PCI: host-common: Add link down handling for Root Ports Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250715-pci-port-reset-v5-2-26a5d278db40@oss.qualcomm.com> References: <20250715-pci-port-reset-v5-0-26a5d278db40@oss.qualcomm.com> In-Reply-To: <20250715-pci-port-reset-v5-0-26a5d278db40@oss.qualcomm.com> To: Bjorn Helgaas , Mahesh J Salgaonkar , Oliver O'Halloran , Will Deacon , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Heiko Stuebner , Philipp Zabel Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-rockchip@lists.infradead.org, Niklas Cassel , Wilfred Mallawa , Krishna Chaitanya Chundru , mani@kernel.org, Manivannan Sadhasivam , Manivannan Sadhasivam X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4883; i=manivannan.sadhasivam@oss.qualcomm.com; h=from:subject:message-id; bh=bQfWv3vYCXDQc/owgN3CgX4ivA+tRgVs06LKIPOsp4c=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBodgqB2xPasi/oXJF5fD1eJ7ErEJqtZ8c+4Cg8H jvKCy+In32JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCaHYKgQAKCRBVnxHm/pHO 9e7vB/0bdWfb3I/vAbI48oVnp2STavW4KBFmPK9O6UMoMuNKz+0WHn0wwQjy/MZPsbd79DMHo0+ RwNXTjRVVIMz7gPMPo+GEVVIAFSb2C0sGeupmWPiQjEJ0ytJ5hypEzOol6IUini3JLdLZnBo7zt c1dxgLb2aPlxagby3h/o912ipm5XtZz27KATzIFDZrVJG6dIZ2kC506n8CbtODN8pIaYMCFQZ+Q zfU5PCKNWdObaL62B1n/Ja1e6BM+EONVws53xZykzeVMhg1h2PAc9WlXc8Ez22epwzVkSDpIWYo j9PzTRtwu5SKxo0WY3+cQYLmucA8fBJOKidKSyGfxH/Ff24t X-Developer-Key: i=manivannan.sadhasivam@oss.qualcomm.com; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzE1MDA3MiBTYWx0ZWRfX4GPGuJCJcRzd qgTu3HeKUvoULVvo+mf4pQ1S9TfD4nHQY++lvoZGtYvfciUeSs+gy18nAvpaz0DklqJNsKNqWfK yHwOAAkx+sxFWPcsEwC+j3r4NgMH6EAOvY+WGLDTIH4/2HKEmH9YPoTHE5DM18EUriT3h31RZk8 HrIdAbEnj/YI4g/cZjHAAGN15UT8bgWYXvzsqFxUxYduFLawdgp6oMEsyBzV8MGwPOJ4YJ60apX 2Z+52JmrKHWpU91KQRKOPDizldMSYUyaNbBqGJ35VrEc9MUBb1hP8zy7pR/7usJQG7SSxpSfi8N HDImkhmGl+hDdgN70dL8W55GvowuO4hJDMVqkEHTtTQbAkPxUkzUy6xOD/+OzxSMLQoyY9pfWdH 7vawKd6Re1e6aBL5U+Yx12YvBFCKNaJoLcPCM+EkiYcbcnIOGKPheMjf00x3NzqjfrnW1oY6 X-Proofpoint-GUID: X0yzyAMMEBOTXdvXkL5C0XIV2-orFe5N X-Authority-Analysis: v=2.4 cv=SeX3duRu c=1 sm=1 tr=0 ts=68760a9a cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=HOswsyiB/7FCIMMjk980kA==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=i5L6chZpdpk7mGOnbloA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: X0yzyAMMEBOTXdvXkL5C0XIV2-orFe5N X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-07-14_03,2025-07-14_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 mlxscore=0 priorityscore=1501 bulkscore=0 phishscore=0 lowpriorityscore=0 mlxlogscore=999 impostorscore=0 clxscore=1015 adultscore=0 suspectscore=0 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507150072 From: Manivannan Sadhasivam The PCI link, when down, needs to be recovered to bring it back. But on some platforms, that cannot be done in a generic way as link recovery procedure is platform specific. So add a new API pci_host_handle_link_down() that could be called by the host bridge drivers for a specific Root Port when the link goes down. The API accepts the 'pci_dev' corresponding to the Root Port which observed the link down event. If CONFIG_PCIEAER is enabled, the API calls pcie_do_recovery() function with 'pci_channel_io_frozen' as the state. This will result in the execution of the AER Fatal error handling code. Since the link down recovery is pretty much the same as AER Fatal error handling, pcie_do_recovery() helper is reused here. First, the AER error_detected() callback will be triggered for the bridge and then for the downstream devices. Finally, pci_host_reset_root_port() will be called for the Root Port, which will reset the Root Port using 'reset_root_port' callback to recover the link. Once that's done, resume message will be broadcasted to the bridge and the downstream devices, indicating successful link recovery. But if CONFIG_PCIEAER is not enabled in the kernel, only pci_host_reset_root_port() API will be called, which will in turn call pci_bus_error_reset() to just reset the Root Port as there is no way we could inform the drivers about link recovery. Signed-off-by: Manivannan Sadhasivam Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/pci-host-common.c | 33 ++++++++++++++++++++++++++++= ++++ drivers/pci/controller/pci-host-common.h | 1 + drivers/pci/pci.c | 1 + drivers/pci/pcie/err.c | 1 + 4 files changed, 36 insertions(+) diff --git a/drivers/pci/controller/pci-host-common.c b/drivers/pci/control= ler/pci-host-common.c index b0992325dd65f0da8e216ec8a2153af365225d1d..51eacb6cb57443338e995f17afd= 3b2564bbd1f83 100644 --- a/drivers/pci/controller/pci-host-common.c +++ b/drivers/pci/controller/pci-host-common.c @@ -12,9 +12,11 @@ #include #include #include +#include #include #include =20 +#include "../pci.h" #include "pci-host-common.h" =20 static void gen_pci_unmap_cfg(void *ptr) @@ -104,5 +106,36 @@ void pci_host_common_remove(struct platform_device *pd= ev) } EXPORT_SYMBOL_GPL(pci_host_common_remove); =20 +static pci_ers_result_t pci_host_reset_root_port(struct pci_dev *dev) +{ + int ret; + + ret =3D pci_bus_error_reset(dev); + if (ret) { + pci_err(dev, "Failed to reset Root Port: %d\n", ret); + return PCI_ERS_RESULT_DISCONNECT; + } + + pci_info(dev, "Root Port has been reset\n"); + + return PCI_ERS_RESULT_RECOVERED; +} + +static void pci_host_recover_root_port(struct pci_dev *port) +{ +#if IS_ENABLED(CONFIG_PCIEAER) + pcie_do_recovery(port, pci_channel_io_frozen, pci_host_reset_root_port); +#else + pci_host_reset_root_port(port); +#endif +} + +void pci_host_handle_link_down(struct pci_dev *port) +{ + pci_info(port, "Recovering Root Port due to Link Down\n"); + pci_host_recover_root_port(port); +} +EXPORT_SYMBOL_GPL(pci_host_handle_link_down); + MODULE_DESCRIPTION("Common library for PCI host controller drivers"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/pci/controller/pci-host-common.h b/drivers/pci/control= ler/pci-host-common.h index 65bd9e032353827221a6af59858c46fdbe5916bf..cb0a07c8773ec87838164e994b3= 4a62d2c8118be 100644 --- a/drivers/pci/controller/pci-host-common.h +++ b/drivers/pci/controller/pci-host-common.h @@ -16,5 +16,6 @@ int pci_host_common_probe(struct platform_device *pdev); int pci_host_common_init(struct platform_device *pdev, const struct pci_ecam_ops *ops); void pci_host_common_remove(struct platform_device *pdev); +void pci_host_handle_link_down(struct pci_dev *port); =20 #endif diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 82c56fbd58ca4aaafac4f1638e7e0225c07958cb..2353342beb9e535cf1291cfa7a6= 0c3e6c8f5bf86 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5760,6 +5760,7 @@ int pci_bus_error_reset(struct pci_dev *bridge) mutex_unlock(&pci_slot_mutex); return pci_bus_reset(bridge->subordinate, PCI_RESET_DO_RESET); } +EXPORT_SYMBOL_GPL(pci_bus_error_reset); =20 /** * pci_probe_reset_bus - probe whether a PCI bus can be reset diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index b834fc0d705938540d3d7d3d8739770c09fe7cf1..3e3084bb7cb7fa06b526e6fab60= e77927aba0ad0 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -270,3 +270,4 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, =20 return status; } +EXPORT_SYMBOL_GPL(pcie_do_recovery); --=20 2.45.2