From nobody Tue Oct 7 05:45:28 2025 Received: from mailout1.samsung.com (mailout1.samsung.com [203.254.224.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6BBC9211489 for ; Mon, 14 Jul 2025 05:59:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.24 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752472744; cv=none; b=W5l/VL6ehoodzYXyjs5VG00VnAH5ErrWu5cIuvL1w5Hgzd3TBlUFo93xYCxFn4nI+fbHH/ZBfn/dJo7tuo4bqIylher8zMNiJTULA7+OkcbfpPZjDn1Hky4jSmtMCleHNcS2WK105BD0GHsHoTxPWovgkgVL0foUwR2R5Jzmu34= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752472744; c=relaxed/simple; bh=eA8fW0D4S9/fahe/LSdY6vP0wbZlz0Lx4LhA/cw+8XM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:MIME-Version: Content-Type:References; b=rVxSqSJ0FANloy8MAhwU/NqSxLYutLeU9S8CN59cF3BRhtg+jZAGeXhy06XTmi5ZAVG3B7/7JQRGf2oi0Eqw7G2zWj30kbiNHq6RQULyxOkqdQavPm0BfMvoB0c5LTnjq9v9Mt811xNbHKo18zP8p8tBLJKDRLXo3bppGCrmiP4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=qvSnWaCw; arc=none smtp.client-ip=203.254.224.24 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="qvSnWaCw" Received: from epcas2p1.samsung.com (unknown [182.195.41.53]) by mailout1.samsung.com (KnoxPortal) with ESMTP id 20250714055855epoutp01a6f66dda1939e7511f3a58951aaa62a8~SCKrjzzsP0769207692epoutp01Q for ; Mon, 14 Jul 2025 05:58:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout1.samsung.com 20250714055855epoutp01a6f66dda1939e7511f3a58951aaa62a8~SCKrjzzsP0769207692epoutp01Q DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1752472735; bh=DEE4uWjAAvqGbGNHuZIiAusKYEx36zda62ZjOAcwkGI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qvSnWaCw4mtPSN1I6zh82H/gfllGlf5eEwLhF0c+cOoi6vfsVoOK56aSD5oCz3k8W 4TsXspk5i4zMey6rYOd4oZ3FJo4Hl+QbLUoSB0N+Apq5BbJOHXU3vUv0K+KkPurNSC /P3sx2C7Y/UxgC4JLYCAfmU1L9C1mlWHDC7Ah4Ds= Received: from epsnrtp04.localdomain (unknown [182.195.42.156]) by epcas2p2.samsung.com (KnoxPortal) with ESMTPS id 20250714055854epcas2p2e7f656b05ffb32038de95175d9c4017f~SCKrQ0r0m1945019450epcas2p27; Mon, 14 Jul 2025 05:58:54 +0000 (GMT) Received: from epcas2p3.samsung.com (unknown [182.195.36.90]) by epsnrtp04.localdomain (Postfix) with ESMTP id 4bgWpk1994z6B9mH; Mon, 14 Jul 2025 05:58:54 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas2p1.samsung.com (KnoxPortal) with ESMTPA id 20250714055853epcas2p1c8a30bbc61045c6a359d32989cfaf2f9~SCKqPDzbx1936819368epcas2p1H; Mon, 14 Jul 2025 05:58:53 +0000 (GMT) Received: from localhost.localdomain (unknown [10.229.9.126]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250714055853epsmtip19fb52d10a7006a5d55c0744d4b862c49~SCKqJ1vbW0366003660epsmtip1M; Mon, 14 Jul 2025 05:58:53 +0000 (GMT) From: Sangwook Shin To: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, linux@roeck-us.net Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Sangwook Shin Subject: [PATCH v3 RESEND 1/5] watchdog: s3c2410_wdt: Replace hardcoded values with macro definitions Date: Mon, 14 Jul 2025 14:54:36 +0900 Message-Id: <20250714055440.3138135-2-sw617.shin@samsung.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250714055440.3138135-1-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250714055853epcas2p1c8a30bbc61045c6a359d32989cfaf2f9 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,N X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250714055853epcas2p1c8a30bbc61045c6a359d32989cfaf2f9 References: <20250714055440.3138135-1-sw617.shin@samsung.com> Modify the code to utilize macro-defined values instead of hardcoded values. The value 0x100 in the s3c2410wdt_set_heartbeat function represents S3C2410_WTCON_PRESCALE_MAX + 1, but it is hardcoded, making its meaning difficult to understand and reducing code readability. Signed-off-by: Sangwook Shin Reviewed-by: Alim Akhtar Reviewed-by: Sam Protsenko --- drivers/watchdog/s3c2410_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 40901bdac426..95f7207e390a 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -587,7 +587,7 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_dev= ice *wdd, if (count >=3D 0x10000) { divisor =3D DIV_ROUND_UP(count, 0xffff); =20 - if (divisor > 0x100) { + if (divisor > S3C2410_WTCON_PRESCALE_MAX + 1) { dev_err(wdt->dev, "timeout %d too big\n", timeout); return -EINVAL; } --=20 2.25.1 From nobody Tue Oct 7 05:45:28 2025 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D2A2720D4FF for ; Mon, 14 Jul 2025 05:59:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 14 Jul 2025 05:58:58 +0000 (GMT) Received: from epcas2p4.samsung.com (unknown [182.195.36.88]) by epsnrtp02.localdomain (Postfix) with ESMTP id 4bgWpp1MZxz2SSKs; Mon, 14 Jul 2025 05:58:58 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas2p1.samsung.com (KnoxPortal) with ESMTPA id 20250714055857epcas2p18cb516424b84f972970eed1ac5726c54~SCKt5qB8F3217032170epcas2p1W; Mon, 14 Jul 2025 05:58:57 +0000 (GMT) Received: from localhost.localdomain (unknown [10.229.9.126]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250714055857epsmtip14b84532306385aa5f10258f158f9da0f~SCKt0fYvC0355503555epsmtip1Y; Mon, 14 Jul 2025 05:58:57 +0000 (GMT) From: Sangwook Shin To: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, linux@roeck-us.net Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Sangwook Shin Subject: [PATCH v3 RESEND 2/5] watchdog: s3c2410_wdt: Fix max_timeout being calculated larger Date: Mon, 14 Jul 2025 14:54:37 +0900 Message-Id: <20250714055440.3138135-3-sw617.shin@samsung.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250714055440.3138135-1-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250714055857epcas2p18cb516424b84f972970eed1ac5726c54 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,N X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250714055857epcas2p18cb516424b84f972970eed1ac5726c54 References: <20250714055440.3138135-1-sw617.shin@samsung.com> Fix the issue of max_timeout being calculated larger than actual value. The calculation result of freq / (S3C2410_WTCON_PRESCALE_MAX + 1) / S3C2410_WTCON_MAXDIV is smaller than the actual value because the remainder is discarded during the calculation process. This leads to a larger calculated value for max_timeout compared to the actual settable value. A ceiling operation is applied in the calculation process to resolve this. Signed-off-by: Sangwook Shin Reviewed-by: Alim Akhtar --- drivers/watchdog/s3c2410_wdt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 95f7207e390a..31f7e1ec779e 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -411,8 +411,8 @@ static inline unsigned int s3c2410wdt_max_timeout(struc= t s3c2410_wdt *wdt) { const unsigned long freq =3D s3c2410wdt_get_freq(wdt); =20 - return S3C2410_WTCNT_MAXCNT / (freq / (S3C2410_WTCON_PRESCALE_MAX + 1) - / S3C2410_WTCON_MAXDIV); + return S3C2410_WTCNT_MAXCNT / DIV_ROUND_UP(freq, + (S3C2410_WTCON_PRESCALE_MAX + 1) * S3C2410_WTCON_MAXDIV); } =20 static int s3c2410wdt_disable_wdt_reset(struct s3c2410_wdt *wdt, bool mask) --=20 2.25.1 From nobody Tue Oct 7 05:45:28 2025 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50AF120E717 for ; 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Mon, 14 Jul 2025 05:59:00 +0000 (GMT) Received: from epcas2p1.samsung.com (unknown [182.195.36.101]) by epsnrtp01.localdomain (Postfix) with ESMTP id 4bgWpq2mRwz6B9mG; Mon, 14 Jul 2025 05:58:59 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas2p4.samsung.com (KnoxPortal) with ESMTPA id 20250714055858epcas2p47b849c0141fdb556288333f7abe00372~SCKvAbH620123201232epcas2p4D; Mon, 14 Jul 2025 05:58:58 +0000 (GMT) Received: from localhost.localdomain (unknown [10.229.9.126]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250714055858epsmtip17b1932c6280004c6182095f89fc50a92~SCKu9SZ440363003630epsmtip1o; Mon, 14 Jul 2025 05:58:58 +0000 (GMT) From: Sangwook Shin To: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, linux@roeck-us.net Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Sangwook Shin Subject: [PATCH v3 RESEND 3/5] watchdog: s3c2410_wdt: Increase max timeout value of watchdog Date: Mon, 14 Jul 2025 14:54:38 +0900 Message-Id: <20250714055440.3138135-4-sw617.shin@samsung.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250714055440.3138135-1-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250714055858epcas2p47b849c0141fdb556288333f7abe00372 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,N X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250714055858epcas2p47b849c0141fdb556288333f7abe00372 References: <20250714055440.3138135-1-sw617.shin@samsung.com> Increase max_timeout value from 55s to 3664647s (1017h 57min 27s) with 38400000 frequency system if the system has 32-bit WTCNT register. cat /sys/devices/platform/10060000.watchdog_cl0/watchdog/watchdog0/max_time= out 3664647 [ 0.302473] s3c2410-wdt 10060000.watchdog_cl0: Heartbeat: count=3D109939= 4100000, timeout=3D3664647, freq=3D300000 [ 0.302479] s3c2410-wdt 10060000.watchdog_cl0: Heartbeat: timeout=3D3664= 647, divisor=3D256, count=3D1099394100000 (fff8feac) [ 0.302510] s3c2410-wdt 10060000.watchdog_cl0: starting watchdog timer [ 0.302722] s3c2410-wdt 10060000.watchdog_cl0: watchdog active, reset en= abled, irq disabled If system has 32-bit WTCNT, add QUIRK_HAS_32BIT_MAXCNT to its quirk flags, = then it will operation with 32-bit counter. If not, with 16-bit counter like pre= vious. Signed-off-by: Sangwook Shin Reviewed-by: Alim Akhtar --- drivers/watchdog/s3c2410_wdt.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 31f7e1ec779e..090b78717cd2 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -34,6 +34,7 @@ #define S3C2410_WTCLRINT 0x0c =20 #define S3C2410_WTCNT_MAXCNT 0xffff +#define S3C2410_WTCNT_MAXCNT_32 0xffffffff =20 #define S3C2410_WTCON_RSTEN BIT(0) #define S3C2410_WTCON_INTEN BIT(2) @@ -123,6 +124,10 @@ * %QUIRK_HAS_DBGACK_BIT: WTCON register has DBGACK_MASK bit. Setting the * DBGACK_MASK bit disables the watchdog outputs when the SoC is in debug = mode. * Debug mode is determined by the DBGACK CPU signal. + * + * %QUIRK_HAS_32BIT_MAXCNT: WTDAT and WTCNT are 32-bit registers. With the= se + * 32-bit registers, larger values to be set, which means that larger time= outs + * value can be set. */ #define QUIRK_HAS_WTCLRINT_REG BIT(0) #define QUIRK_HAS_PMU_MASK_RESET BIT(1) @@ -130,6 +135,7 @@ #define QUIRK_HAS_PMU_AUTO_DISABLE BIT(3) #define QUIRK_HAS_PMU_CNT_EN BIT(4) #define QUIRK_HAS_DBGACK_BIT BIT(5) +#define QUIRK_HAS_32BIT_MAXCNT BIT(6) =20 /* These quirks require that we have a PMU register map */ #define QUIRKS_HAVE_PMUREG \ @@ -198,6 +204,7 @@ struct s3c2410_wdt { struct notifier_block freq_transition; const struct s3c2410_wdt_variant *drv_data; struct regmap *pmureg; + unsigned int max_cnt; }; =20 static const struct s3c2410_wdt_variant drv_data_s3c2410 =3D { @@ -411,7 +418,7 @@ static inline unsigned int s3c2410wdt_max_timeout(struc= t s3c2410_wdt *wdt) { const unsigned long freq =3D s3c2410wdt_get_freq(wdt); =20 - return S3C2410_WTCNT_MAXCNT / DIV_ROUND_UP(freq, + return wdt->max_cnt / DIV_ROUND_UP(freq, (S3C2410_WTCON_PRESCALE_MAX + 1) * S3C2410_WTCON_MAXDIV); } =20 @@ -566,7 +573,7 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_dev= ice *wdd, { struct s3c2410_wdt *wdt =3D watchdog_get_drvdata(wdd); unsigned long freq =3D s3c2410wdt_get_freq(wdt); - unsigned int count; + unsigned long count; unsigned int divisor =3D 1; unsigned long wtcon; =20 @@ -576,7 +583,7 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_dev= ice *wdd, freq =3D DIV_ROUND_UP(freq, 128); count =3D timeout * freq; =20 - dev_dbg(wdt->dev, "Heartbeat: count=3D%d, timeout=3D%d, freq=3D%lu\n", + dev_dbg(wdt->dev, "Heartbeat: count=3D%lu, timeout=3D%d, freq=3D%lu\n", count, timeout, freq); =20 /* if the count is bigger than the watchdog register, @@ -584,8 +591,8 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_dev= ice *wdd, actually make this value */ =20 - if (count >=3D 0x10000) { - divisor =3D DIV_ROUND_UP(count, 0xffff); + if (count > wdt->max_cnt) { + divisor =3D DIV_ROUND_UP(count, wdt->max_cnt); =20 if (divisor > S3C2410_WTCON_PRESCALE_MAX + 1) { dev_err(wdt->dev, "timeout %d too big\n", timeout); @@ -593,7 +600,7 @@ static int s3c2410wdt_set_heartbeat(struct watchdog_dev= ice *wdd, } } =20 - dev_dbg(wdt->dev, "Heartbeat: timeout=3D%d, divisor=3D%d, count=3D%d (%08= x)\n", + dev_dbg(wdt->dev, "Heartbeat: timeout=3D%d, divisor=3D%d, count=3D%lu (%0= 8lx)\n", timeout, divisor, count, DIV_ROUND_UP(count, divisor)); =20 count =3D DIV_ROUND_UP(count, divisor); @@ -801,6 +808,10 @@ static int s3c2410wdt_probe(struct platform_device *pd= ev) if (IS_ERR(wdt->src_clk)) return dev_err_probe(dev, PTR_ERR(wdt->src_clk), "failed to get source c= lock\n"); =20 + wdt->max_cnt =3D S3C2410_WTCNT_MAXCNT; + if ((wdt->drv_data->quirks & QUIRK_HAS_32BIT_MAXCNT)) + wdt->max_cnt =3D S3C2410_WTCNT_MAXCNT_32; + wdt->wdt_device.min_timeout =3D 1; wdt->wdt_device.max_timeout =3D s3c2410wdt_max_timeout(wdt); =20 --=20 2.25.1 From nobody Tue Oct 7 05:45:28 2025 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 34D70220F4F for ; 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charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,N X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250714055859epcas2p256ce350e05d8812ca2900823a1e4913d References: <20250714055440.3138135-1-sw617.shin@samsung.com> Enable QUIRK_HAS_32BIT_MAXCNT to ExynosAutov920 SoC which has 32-bit WTCNT. Signed-off-by: Sangwook Shin --- drivers/watchdog/s3c2410_wdt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 090b78717cd2..184b1ad46ca6 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -356,7 +356,7 @@ static const struct s3c2410_wdt_variant drv_data_exynos= autov920_cl0 =3D { .cnt_en_bit =3D 8, .quirks =3D QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | - QUIRK_HAS_DBGACK_BIT, + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_MAXCNT, }; =20 static const struct s3c2410_wdt_variant drv_data_exynosautov920_cl1 =3D { @@ -369,7 +369,7 @@ static const struct s3c2410_wdt_variant drv_data_exynos= autov920_cl1 =3D { .cnt_en_bit =3D 8, .quirks =3D QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | - QUIRK_HAS_DBGACK_BIT, + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_MAXCNT, }; =20 static const struct of_device_id s3c2410_wdt_match[] =3D { --=20 2.25.1 From nobody Tue Oct 7 05:45:28 2025 Received: from mailout4.samsung.com (mailout4.samsung.com [203.254.224.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D49C218596 for ; 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Mon, 14 Jul 2025 05:59:01 +0000 (GMT) Received: from epcas2p1.samsung.com (unknown [182.195.36.68]) by epsnrtp03.localdomain (Postfix) with ESMTP id 4bgWps212Qz3hhTD; Mon, 14 Jul 2025 05:59:01 +0000 (GMT) Received: from epsmtip1.samsung.com (unknown [182.195.34.30]) by epcas2p1.samsung.com (KnoxPortal) with ESMTPA id 20250714055900epcas2p1f082e73f1f30f7b3ec8e38c6f6501d61~SCKw32m5B1936819368epcas2p1d; Mon, 14 Jul 2025 05:59:00 +0000 (GMT) Received: from localhost.localdomain (unknown [10.229.9.126]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250714055900epsmtip107e682ee25a4c2ff4ca80ff03fe1ce7a~SCKw0lmzG0355503555epsmtip1g; Mon, 14 Jul 2025 05:59:00 +0000 (GMT) From: Sangwook Shin To: krzk@kernel.org, alim.akhtar@samsung.com, wim@linux-watchdog.org, linux@roeck-us.net Cc: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Sangwook Shin Subject: [PATCH v3 RESEND 5/5] watchdog: s3c2410_wdt: exynosautov9: Enable supported features Date: Mon, 14 Jul 2025 14:54:40 +0900 Message-Id: <20250714055440.3138135-6-sw617.shin@samsung.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250714055440.3138135-1-sw617.shin@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CMS-MailID: 20250714055900epcas2p1f082e73f1f30f7b3ec8e38c6f6501d61 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P cpgsPolicy: CPGSC10-234,N X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250714055900epcas2p1f082e73f1f30f7b3ec8e38c6f6501d61 References: <20250714055440.3138135-1-sw617.shin@samsung.com> Enable supported features for ExynosAutov9 SoC. - QUIRK_HAS_DBGACK_BIT - QUIRK_HAS_32BIT_MAXCNT Signed-off-by: Sangwook Shin Reviewed-by: Alim Akhtar --- drivers/watchdog/s3c2410_wdt.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 184b1ad46ca6..16a845f41e74 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -305,7 +305,8 @@ static const struct s3c2410_wdt_variant drv_data_exynos= autov9_cl0 =3D { .cnt_en_reg =3D EXYNOS850_CLUSTER0_NONCPU_OUT, .cnt_en_bit =3D 7, .quirks =3D QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | - QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN, + QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_MAXCNT, }; =20 static const struct s3c2410_wdt_variant drv_data_exynosautov9_cl1 =3D { @@ -317,7 +318,8 @@ static const struct s3c2410_wdt_variant drv_data_exynos= autov9_cl1 =3D { .cnt_en_reg =3D EXYNOSAUTOV9_CLUSTER1_NONCPU_OUT, .cnt_en_bit =3D 7, .quirks =3D QUIRK_HAS_WTCLRINT_REG | QUIRK_HAS_PMU_MASK_RESET | - QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN, + QUIRK_HAS_PMU_RST_STAT | QUIRK_HAS_PMU_CNT_EN | + QUIRK_HAS_DBGACK_BIT | QUIRK_HAS_32BIT_MAXCNT, }; =20 static const struct s3c2410_wdt_variant drv_data_gs101_cl0 =3D { --=20 2.25.1