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It proved to be useful for devices already powered on by the bootloader as it allowed devices to enter ASPM without user intervention. However, it could not enable ASPM for the hotplug capable devices i.e., devices enumerated *after* the controller driver probe. This limitation mostly went unnoticed as the Qcom PCI controllers are not hotplug capable and also the bootloader has been enabling the PCI devices before Linux Kernel boots (mostly on the Qcom compute platforms which users use on a daily basis). But with the advent of the commit b458ff7e8176 ("PCI/pwrctl: Ensure that pwrctl drivers are probed before PCI client drivers"), the pwrctrl driver started to block the PCI device enumeration until it had been probed. Though, the intention of the commit was to avoid race between the pwrctrl driver and PCI client driver, it also meant that the pwrctrl controlled PCI devices may get probed after the controller driver and will no longer have ASPM enabled. So users started noticing high runtime power consumption with WLAN chipsets on Qcom compute platforms like Thinkpad X13s, and Thinkpad T14s, etc... Obviously, it is the pwrctrl change that caused regression, but it ultimately uncovered a flaw in the ASPM enablement logic of the controller driver. So to address the actual issue, switch to the bus notifier for enabling ASPM of the PCI devices. The notifier will notify the controller driver when a PCI device is attached to the bus, thereby allowing it to enable ASPM more reliably. It should be noted that the 'pci_dev::link_state', which is required for enabling ASPM by the pci_enable_link_state_locked() API, is only set by the time of BUS_NOTIFY_BIND_DRIVER stage of the notification. So we cannot enable ASPM during BUS_NOTIFY_ADD_DEVICE stage. So with this, we can also get rid of the controller driver specific 'qcom_pcie_ops::host_post_init' callback. Cc: stable@vger.kernel.org # v6.7 Fixes: 9f4f3dfad8cf ("PCI: qcom: Enable ASPM for platforms supporting 1.9.0= ops") Reported-by: Johan Hovold Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom.c | 70 ++++++++++++++++++------------= ---- 1 file changed, 37 insertions(+), 33 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controlle= r/dwc/pcie-qcom.c index 620ac7cf09472b84c37e83ee3ce40e94a1d9d878..b4993642ed90915299e825e47d2= 82b8175a78346 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -247,7 +248,6 @@ struct qcom_pcie_ops { int (*get_resources)(struct qcom_pcie *pcie); int (*init)(struct qcom_pcie *pcie); int (*post_init)(struct qcom_pcie *pcie); - void (*host_post_init)(struct qcom_pcie *pcie); void (*deinit)(struct qcom_pcie *pcie); void (*ltssm_enable)(struct qcom_pcie *pcie); int (*config_sid)(struct qcom_pcie *pcie); @@ -286,6 +286,7 @@ struct qcom_pcie { const struct qcom_pcie_cfg *cfg; struct dentry *debugfs; struct list_head ports; + struct notifier_block nb; bool suspended; bool use_pm_opp; }; @@ -1040,25 +1041,6 @@ static int qcom_pcie_post_init_2_7_0(struct qcom_pci= e *pcie) return 0; } =20 -static int qcom_pcie_enable_aspm(struct pci_dev *pdev, void *userdata) -{ - /* - * Downstream devices need to be in D0 state before enabling PCI PM - * substates. - */ - pci_set_power_state_locked(pdev, PCI_D0); - pci_enable_link_state_locked(pdev, PCIE_LINK_STATE_ALL); - - return 0; -} - -static void qcom_pcie_host_post_init_2_7_0(struct qcom_pcie *pcie) -{ - struct dw_pcie_rp *pp =3D &pcie->pci->pp; - - pci_walk_bus(pp->bridge->bus, qcom_pcie_enable_aspm, NULL); -} - static void qcom_pcie_deinit_2_7_0(struct qcom_pcie *pcie) { struct qcom_pcie_resources_2_7_0 *res =3D &pcie->res.v2_7_0; @@ -1358,19 +1340,9 @@ static void qcom_pcie_host_deinit(struct dw_pcie_rp = *pp) pcie->cfg->ops->deinit(pcie); } =20 -static void qcom_pcie_host_post_init(struct dw_pcie_rp *pp) -{ - struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); - struct qcom_pcie *pcie =3D to_qcom_pcie(pci); - - if (pcie->cfg->ops->host_post_init) - pcie->cfg->ops->host_post_init(pcie); -} - static const struct dw_pcie_host_ops qcom_pcie_dw_ops =3D { .init =3D qcom_pcie_host_init, .deinit =3D qcom_pcie_host_deinit, - .post_init =3D qcom_pcie_host_post_init, }; =20 /* Qcom IP rev.: 2.1.0 Synopsys IP rev.: 4.01a */ @@ -1432,7 +1404,6 @@ static const struct qcom_pcie_ops ops_1_9_0 =3D { .get_resources =3D qcom_pcie_get_resources_2_7_0, .init =3D qcom_pcie_init_2_7_0, .post_init =3D qcom_pcie_post_init_2_7_0, - .host_post_init =3D qcom_pcie_host_post_init_2_7_0, .deinit =3D qcom_pcie_deinit_2_7_0, .ltssm_enable =3D qcom_pcie_2_3_2_ltssm_enable, .config_sid =3D qcom_pcie_config_sid_1_9_0, @@ -1443,7 +1414,6 @@ static const struct qcom_pcie_ops ops_1_21_0 =3D { .get_resources =3D qcom_pcie_get_resources_2_7_0, .init =3D qcom_pcie_init_2_7_0, .post_init =3D qcom_pcie_post_init_2_7_0, - .host_post_init =3D qcom_pcie_host_post_init_2_7_0, .deinit =3D qcom_pcie_deinit_2_7_0, .ltssm_enable =3D qcom_pcie_2_3_2_ltssm_enable, }; @@ -1773,6 +1743,33 @@ static int qcom_pcie_parse_legacy_binding(struct qco= m_pcie *pcie) return 0; } =20 +static int qcom_pcie_enable_aspm(struct pci_dev *pdev) +{ + /* + * Downstream devices need to be in D0 state before enabling PCI PM + * substates. + */ + pci_set_power_state_locked(pdev, PCI_D0); + pci_enable_link_state_locked(pdev, PCIE_LINK_STATE_ALL); + + return 0; +} + +static int pcie_qcom_notify(struct notifier_block *nb, unsigned long actio= n, + void *data) +{ + struct qcom_pcie *pcie =3D container_of(nb, struct qcom_pcie, nb); + struct device *dev =3D data; + struct pci_dev *pdev =3D to_pci_dev(dev); + + switch (action) { + case BUS_NOTIFY_BIND_DRIVER: + qcom_pcie_enable_aspm(pdev); + break; + } + + return NOTIFY_DONE; +} static int qcom_pcie_probe(struct platform_device *pdev) { const struct qcom_pcie_cfg *pcie_cfg; @@ -1946,10 +1943,15 @@ static int qcom_pcie_probe(struct platform_device *= pdev) if (irq > 0) pp->use_linkup_irq =3D true; =20 + pcie->nb.notifier_call =3D pcie_qcom_notify; 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Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controlle= r/dwc/pcie-qcom.c index b4993642ed90915299e825e47d282b8175a78346..b364977d78a2c659f65f0f12ce4= 274601d20eaa6 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1616,8 +1616,6 @@ static irqreturn_t qcom_pcie_global_irq_thread(int ir= q, void *data) pci_lock_rescan_remove(); pci_rescan_bus(pp->bridge->bus); pci_unlock_rescan_remove(); - - qcom_pcie_icc_opp_update(pcie); } else { dev_WARN_ONCE(dev, 1, "Received unknown event. INT_STATUS: 0x%08x\n", status); @@ -1765,6 +1763,7 @@ static int pcie_qcom_notify(struct notifier_block *nb= , unsigned long action, switch (action) { case BUS_NOTIFY_BIND_DRIVER: qcom_pcie_enable_aspm(pdev); + qcom_pcie_icc_opp_update(pcie); break; } =20 --=20 2.45.2