From nobody Tue Oct 7 08:36:30 2025 Received: from mx4.wp.pl (mx4.wp.pl [212.77.101.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94067275B1A for ; Sat, 12 Jul 2025 19:59:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=212.77.101.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752350359; cv=none; b=RPb9/5kx3bY19zdA4oyCY/avpzC/R2fp86SM5irCAy168jTu4BFX1NLH+FRMYJWUlPe+292oVzvhkhQdyAQGtFY4rEE/gsnGOgMmZLnl5vp3keGhanMJktxlcMo+KY7uICBFaiV8BXgux/USaK7ifEAPvluX5VvvNRZ27FQJ3Tk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752350359; c=relaxed/simple; bh=Nvvb3b/gGfyOjhKPQN7T7eI9idEiaO/M3PTjidpAikE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=q1FleEMePg5GWBf0iSJs1LODy56cd+xCb6jDAy+GbXWp9DZITJgsB9rwcdVQsRifWoBXMfqgqht7M6lGZujGKm/l158oRC+VDoadVLGyUjcLU/Y88VJs2Q6GRwVh1j9b+Fi8BO4Hl7VFXEw6zQ69O+FvmQXXkbWFHNuSBQROzRc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=wp.pl; spf=pass smtp.mailfrom=wp.pl; dkim=pass (2048-bit key) header.d=wp.pl header.i=@wp.pl header.b=l8HgJ3oG; arc=none smtp.client-ip=212.77.101.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=wp.pl Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wp.pl Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wp.pl header.i=@wp.pl header.b="l8HgJ3oG" Received: (wp-smtpd smtp.wp.pl 41100 invoked from network); 12 Jul 2025 21:59:10 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=wp.pl; s=20241105; t=1752350350; bh=p0DP/yEP8mz0tV12G5LR9PQ4AN9dj0wNDnAmLxZaMVk=; h=From:To:Cc:Subject; b=l8HgJ3oGq5I76iPLDEalRiTO/bbuU4Pbbq7j8jZtYKknJwAFg2ui4FvabL/J2dF4P iFtozEjGspr7qj+QLd+F09gaCzV/ZmsSwP0NzbjvIIcNFAgZo4g214USrr1HCpJYuF Y8jJHvGOwRTyGJlQkz/aPwUFs5krnLNZyWLWdLoRrRYxItZBnCJWSOR4bw42dVANFR DcUbeZDe5un6cBtdvhb84hMZrsqcg4fnQC/27yQvJOuRiIn0RNS7t6LqQTlLI7eEZL DU/aIp2PCHQBYiZkdiKF4seRCG/61xJU3ANYbbRywup7vlISc1wSjhzcXFHjkVfQJ4 WR3YTNOrcKSKA== Received: from 83.24.150.40.ipv4.supernova.orange.pl (HELO laptop-olek.lan) (olek2@wp.pl@[83.24.150.40]) (envelope-sender ) by smtp.wp.pl (WP-SMTPD) with ECDHE-RSA-AES256-GCM-SHA384 encrypted SMTP for ; 12 Jul 2025 21:59:10 +0200 From: Aleksander Jan Bajkowski To: rafael@kernel.org, daniel.lezcano@linaro.org, rui.zhang@intel.com, lukasz.luba@arm.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, s.hauer@pengutronix.de, rafal@milecki.pl, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Cc: Aleksander Jan Bajkowski Subject: [PATCH v4 2/2] arm64: dts: mediatek: add thermal sensor support on mt7981 Date: Sat, 12 Jul 2025 21:59:04 +0200 Message-Id: <20250712195904.6988-3-olek2@wp.pl> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250712195904.6988-1-olek2@wp.pl> References: <20250712195904.6988-1-olek2@wp.pl> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-WP-DKIM-Status: good (id: wp.pl) X-WP-MailID: d9f1ddb601d50011e751422665f94ebe X-WP-AV: skaner antywirusowy Poczty Wirtualnej Polski X-WP-SPAM: NO 0000000 [wRMx] Content-Type: text/plain; charset="utf-8" The temperature sensor in the MT7981 is same as in the MT7986. Signed-off-by: Aleksander Jan Bajkowski --- arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 31 ++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dt= s/mediatek/mt7981b.dtsi index 5cbea9cd411f..277c11247c13 100644 --- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi @@ -76,7 +76,7 @@ watchdog: watchdog@1001c000 { #reset-cells =3D <1>; }; =20 - clock-controller@1001e000 { + apmixedsys: clock-controller@1001e000 { compatible =3D "mediatek,mt7981-apmixedsys"; reg =3D <0 0x1001e000 0 0x1000>; #clock-cells =3D <1>; @@ -184,6 +184,31 @@ spi@1100b000 { status =3D "disabled"; }; =20 + thermal@1100c800 { + compatible =3D "mediatek,mt7981-thermal", + "mediatek,mt7986-thermal"; + reg =3D <0 0x1100c800 0 0x800>; + interrupts =3D ; + clocks =3D <&infracfg CLK_INFRA_THERM_CK>, + <&infracfg CLK_INFRA_ADC_26M_CK>; + clock-names =3D "therm", "auxadc"; + nvmem-cells =3D <&thermal_calibration>; + nvmem-cell-names =3D "calibration-data"; + #thermal-sensor-cells =3D <1>; + mediatek,auxadc =3D <&auxadc>; + mediatek,apmixedsys =3D <&apmixedsys>; + }; + + auxadc: adc@1100d000 { + compatible =3D "mediatek,mt7981-auxadc", + "mediatek,mt7986-auxadc"; + reg =3D <0 0x1100d000 0 0x1000>; + clocks =3D <&infracfg CLK_INFRA_ADC_26M_CK>; + clock-names =3D "main"; + #io-channel-cells =3D <1>; + status =3D "disabled"; + }; + pio: pinctrl@11d00000 { compatible =3D "mediatek,mt7981-pinctrl"; reg =3D <0 0x11d00000 0 0x1000>, @@ -211,6 +236,10 @@ efuse@11f20000 { reg =3D <0 0x11f20000 0 0x1000>; #address-cells =3D <1>; #size-cells =3D <1>; + + thermal_calibration: thermal-calib@274 { + reg =3D <0x274 0xc>; + }; }; =20 clock-controller@15000000 { --=20 2.39.5