From nobody Sat Feb 7 13:56:13 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53AA022A4CC; Sat, 12 Jul 2025 07:40:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752306048; cv=none; b=rmNvZCKwhFddL4O9xZOxNeNmkkfg5/rtW6MtFlGalVaIZIMUEy5G02YqihLS56eJO2gDqLqbhJpB4H8ebRNd/R9zmBaN2HoK9PvN4n6vPLJt2XrTlwU4DRCLKmjlutUDjOCqr6QNpsESdEKdhHvwdRWrzOYXqYl/tGYcbde/Pe8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752306048; c=relaxed/simple; bh=BnVNBCmaGD8QKefYif7ONwqBQvBpS1QUbrNhxe9uuik=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=R16V5+nLYBpxjTYCHWf/hJXRengaIENDsZcZiq5VRduC9ljJAURqYGYVZaxKti8GX8TlHKHNd8Pcr0TlahZ/lcqGvgKWx+XNDJLeoSW7Gbc7zbmcujXuwcpLwRVKBC7vm0I5aFv2q3Ofh25f5bvDAEox2HkCzjOUH5XQTzgay8s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=vIS1XkB+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="vIS1XkB+" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C7F01C4CEF4; Sat, 12 Jul 2025 07:40:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1752306047; bh=BnVNBCmaGD8QKefYif7ONwqBQvBpS1QUbrNhxe9uuik=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vIS1XkB+tIS1q6MQDWPYVYScsNdG2z77DV9w8N8KxXTvLXA9YHLvi60ba+oFPXWcY +r3z0elC2niosw3oU7y4doGzoYq1FsiPCkMYHvhfElysMhNcFmkY5tq53tJ0SBL+3I bCB1pb0Qbrc/2QWK+GpiGpbOHsXwxzcmzWXYq7U3cJFtk1BLuNz5uF/pA8+L41iNNV 7fOk8kwSy4csNkTvX/ct0WHC0en/IyEfOmABzqJz9c3f3kWvxEoSQrriSG20+xixTa o2i6/qEayA9qH7JESWDcB4+9VS5eKb1Pc80vd9N3Hby1cMa9sokeXg1+FeI4VZ21gg M//C9KshEDeXA== Received: by wens.tw (Postfix, from userid 1000) id C36FA5FF44; Sat, 12 Jul 2025 15:40:42 +0800 (CST) From: Chen-Yu Tsai To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Andre Przywara , linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v3 1/5] dt-bindings: power: Add A523 PPU and PCK600 power controllers Date: Sat, 12 Jul 2025 15:40:17 +0800 Message-Id: <20250712074021.805953-2-wens@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250712074021.805953-1-wens@kernel.org> References: <20250712074021.805953-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen-Yu Tsai The A523 PPU is likely the same kind of hardware seen on previous SoCs. The A523 PCK600, as the name suggests, is likely a customized version of ARM's PCK-600 power controller. Comparing the BSP driver against ARM's PPU datasheet shows that the basic registers line up, but Allwinner's hardware has some additional delay controls in the reserved register range. As such it is likely not fully compatible with the standard ARM version. Document A523 PPU and PCK600 compatibles. Also reorder the compatible string entries so they are grouped and ordered by family first, then by SoC model. Reviewed-by: Andre Przywara Reviewed-by: Rob Herring (Arm) Signed-off-by: Chen-Yu Tsai --- Changes since v1: - Re-order compatible string entries - Fix name of header file to match compatible string --- .../bindings/power/allwinner,sun20i-d1-ppu.yaml | 4 +++- .../power/allwinner,sun55i-a523-pck-600.h | 15 +++++++++++++++ .../dt-bindings/power/allwinner,sun55i-a523-ppu.h | 12 ++++++++++++ 3 files changed, 30 insertions(+), 1 deletion(-) create mode 100644 include/dt-bindings/power/allwinner,sun55i-a523-pck-600= .h create mode 100644 include/dt-bindings/power/allwinner,sun55i-a523-ppu.h diff --git a/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-pp= u.yaml b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.ya= ml index f578be6a3bc8..a28e75a9cb6a 100644 --- a/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml +++ b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml @@ -16,8 +16,10 @@ description: properties: compatible: enum: - - allwinner,sun20i-d1-ppu - allwinner,sun8i-v853-ppu + - allwinner,sun20i-d1-ppu + - allwinner,sun55i-a523-pck-600 + - allwinner,sun55i-a523-ppu =20 reg: maxItems: 1 diff --git a/include/dt-bindings/power/allwinner,sun55i-a523-pck-600.h b/in= clude/dt-bindings/power/allwinner,sun55i-a523-pck-600.h new file mode 100644 index 000000000000..6b3d8ea7bb69 --- /dev/null +++ b/include/dt-bindings/power/allwinner,sun55i-a523-pck-600.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef _DT_BINDINGS_POWER_SUN55I_A523_PCK600_H_ +#define _DT_BINDINGS_POWER_SUN55I_A523_PCK600_H_ + +#define PD_VE 0 +#define PD_GPU 1 +#define PD_VI 2 +#define PD_VO0 3 +#define PD_VO1 4 +#define PD_DE 5 +#define PD_NAND 6 +#define PD_PCIE 7 + +#endif /* _DT_BINDINGS_POWER_SUN55I_A523_PCK600_H_ */ diff --git a/include/dt-bindings/power/allwinner,sun55i-a523-ppu.h b/includ= e/dt-bindings/power/allwinner,sun55i-a523-ppu.h new file mode 100644 index 000000000000..bc9aba73c19a --- /dev/null +++ b/include/dt-bindings/power/allwinner,sun55i-a523-ppu.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef _DT_BINDINGS_POWER_SUN55I_A523_PPU_H_ +#define _DT_BINDINGS_POWER_SUN55I_A523_PPU_H_ + +#define PD_DSP 0 +#define PD_NPU 1 +#define PD_AUDIO 2 +#define PD_SRAM 3 +#define PD_RISCV 4 + +#endif /* _DT_BINDINGS_POWER_SUN55I_A523_PPU_H_ */ --=20 2.39.5 From nobody Sat Feb 7 13:56:13 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13170219A9B; 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charset="utf-8" From: Chen-Yu Tsai A523 has a PPU like the one in the Allwinner D1 SoC. Add a compatible entry and a list of power domain names for it. Reviewed-by: Andre Przywara Signed-off-by: Chen-Yu Tsai --- drivers/pmdomain/sunxi/sun20i-ppu.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/pmdomain/sunxi/sun20i-ppu.c b/drivers/pmdomain/sunxi/s= un20i-ppu.c index 9f002748d224..b65876a68cc1 100644 --- a/drivers/pmdomain/sunxi/sun20i-ppu.c +++ b/drivers/pmdomain/sunxi/sun20i-ppu.c @@ -193,6 +193,19 @@ static const struct sun20i_ppu_desc sun8i_v853_ppu_des= c =3D { .num_domains =3D ARRAY_SIZE(sun8i_v853_ppu_pd_names), }; =20 +static const char *const sun55i_a523_ppu_pd_names[] =3D { + "DSP", + "NPU", + "AUDIO", + "SRAM", + "RISCV", +}; + +static const struct sun20i_ppu_desc sun55i_a523_ppu_desc =3D { + .names =3D sun55i_a523_ppu_pd_names, + .num_domains =3D ARRAY_SIZE(sun55i_a523_ppu_pd_names), +}; + static const struct of_device_id sun20i_ppu_of_match[] =3D { { .compatible =3D "allwinner,sun20i-d1-ppu", @@ -202,6 +215,10 @@ static const struct of_device_id sun20i_ppu_of_match[]= =3D { .compatible =3D "allwinner,sun8i-v853-ppu", .data =3D &sun8i_v853_ppu_desc, }, + { + .compatible =3D "allwinner,sun55i-a523-ppu", + .data =3D &sun55i_a523_ppu_desc, + }, { } }; MODULE_DEVICE_TABLE(of, sun20i_ppu_of_match); --=20 2.39.5 From nobody Sat Feb 7 13:56:13 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E96732F5B; Sat, 12 Jul 2025 07:40:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752306046; cv=none; b=Gf4i3Vb8VfWXMKHUlJjY1IKH/oJa6m6OPasjUmQXu+8P+rFYDK2H7lXxpJl0uQDhQNYVPApJONSHDpqIR7u3D5Iu42lAH9+wSxA/lToJTvPWun2vMJF792z/mikxE3JC0xij2DBt+KTYM7HkezjGkEwbv8WQN4wX+b39+sxfBaM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752306046; c=relaxed/simple; bh=RYWUgGRqFS9sarDXCDokhJZmRsKnFc7OwpkggH1fV9A=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=OJT/j8xv4ausze9xZk4ctJGwvv7EHVgWdr14HA+bGBjZl/yKDFKz6jBIx2RWrh9OxlLXneh3ebQNTt3LyxmbXHb9sLMfeUp+fditUsPmoLky9w1YC1b6M8bisuHakQvhgSpNcxNngrul+WtYNwqcaskjlvjZfVwRml2y2uI0Qiw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZpaDtZfL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZpaDtZfL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73536C4CEF7; Sat, 12 Jul 2025 07:40:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1752306045; bh=RYWUgGRqFS9sarDXCDokhJZmRsKnFc7OwpkggH1fV9A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZpaDtZfLINLW9U8IzoDoZA8E1Xo2njN0jZgTNbUrUqxQJ/AUnOQlCk3znzu80txi6 LzjdUrEFumG2/k7TgVF4PlVeZef8YlZJ/DkS93VYOO1Z2jhxLmYwPtPqw0vBumQ4dp AIOZZUp5OslCTDXdYA0dFudoZSUgglaslLEFburRLMsoBurjUiLe06RS3Cp/nTVBjj OzGpGKoHhNZbj0aPTKV1mDZNrBU15r98KJG7ZoeeRkl+dxHLiQpqwMxd5ePTxDeiPk SFRkpe1N2lFdDzO1HoWSsTg3m0QkUa8ppFCZNn2lqMQJKZRHqFWd9ttiynhpt6eWw8 aEdsUogQvi+zQ== Received: by wens.tw (Postfix, from userid 1000) id BFCBA5FE81; Sat, 12 Jul 2025 15:40:42 +0800 (CST) From: Chen-Yu Tsai To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Andre Przywara , linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v3 3/5] pmdomain: sunxi: add driver for Allwinner A523's PCK-600 power controller Date: Sat, 12 Jul 2025 15:40:19 +0800 Message-Id: <20250712074021.805953-4-wens@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250712074021.805953-1-wens@kernel.org> References: <20250712074021.805953-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen-Yu Tsai Allwinner A523 family has a second power controller, named PCK-600 in the datasheets and BSP. It is likely based on ARM's PCK-600 hardware block, with some additional delay controls. The only documentation for this hardware is the BSP driver. The standard registers defined in ARM's Power Policy Unit Architecture Specification line up. Some extra delay controls are found in the reserved range of registers. Add a driver for this power controller. Delay control register values and power domain names are from the BSP driver. Signed-off-by: Chen-Yu Tsai --- Changes since v2: - Fixed whitespace issue - Added explanation about possible PCK-600 lineage and document references to driver - Changed Kconfig option to tristate - Rewrote Kconfig option help text to make it clear that the driver is required for certain peripherals to work - Made it depend on ARCH_SUNXI or COMPILE_TEST - Made it enabled by default for ARCH_SUNXI - Renamed PPU_PWSR_PWR_STATUS to PPU_PWR_STATUS, and added a comment to note the macro is shared between two registers --- drivers/pmdomain/sunxi/Kconfig | 11 ++ drivers/pmdomain/sunxi/Makefile | 1 + drivers/pmdomain/sunxi/sun55i-pck600.c | 234 +++++++++++++++++++++++++ 3 files changed, 246 insertions(+) create mode 100644 drivers/pmdomain/sunxi/sun55i-pck600.c diff --git a/drivers/pmdomain/sunxi/Kconfig b/drivers/pmdomain/sunxi/Kconfig index 43eecb3ea981..eb1ce2dd8e53 100644 --- a/drivers/pmdomain/sunxi/Kconfig +++ b/drivers/pmdomain/sunxi/Kconfig @@ -18,3 +18,14 @@ config SUN50I_H6_PRCM_PPU Say y to enable the Allwinner H6/H616 PRCM power domain driver. This is required to enable the Mali GPU in the H616 SoC, it is optional for the H6. + +config SUN55I_PCK600 + tristate "Allwinner A523 PCK-600 power domain driver" + depends on ARCH_SUNXI || COMPILE_TEST + depends on PM + default ARCH_SUNXI + select PM_GENERIC_DOMAINS + help + Say y to enable the PCK-600 power domain driver. This is required + to enable power to certain peripherals, such as the display and + video engines. diff --git a/drivers/pmdomain/sunxi/Makefile b/drivers/pmdomain/sunxi/Makef= ile index c1343e123759..e344b232fc9f 100644 --- a/drivers/pmdomain/sunxi/Makefile +++ b/drivers/pmdomain/sunxi/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_SUN20I_PPU) +=3D sun20i-ppu.o obj-$(CONFIG_SUN50I_H6_PRCM_PPU) +=3D sun50i-h6-prcm-ppu.o +obj-$(CONFIG_SUN55I_PCK600) +=3D sun55i-pck600.o diff --git a/drivers/pmdomain/sunxi/sun55i-pck600.c b/drivers/pmdomain/sunx= i/sun55i-pck600.c new file mode 100644 index 000000000000..c7ab51514531 --- /dev/null +++ b/drivers/pmdomain/sunxi/sun55i-pck600.c @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Allwinner PCK-600 power domain support + * + * Copyright (c) 2025 Chen-Yu Tsai + * + * The hardware is likely based on the Arm PCK-600 IP, since some of + * the registers match Arm's documents, with additional delay controls + * that are in registers listed as reserved. + * + * Documents include: + * - "Arm CoreLink PCK-600 Power Control Kit" TRM + * - "Arm Power Policy Unit" architecture specification (DEN0051E) + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PPU_PWPR 0x0 +#define PPU_PWSR 0x8 +#define PPU_DCDR0 0x170 +#define PPU_DCDR1 0x174 + +/* shared definition for PPU_PWPR and PPU_PWSR */ +#define PPU_PWR_STATUS GENMASK(3, 0) +#define PPU_POWER_MODE_ON 0x8 +#define PPU_POWER_MODE_OFF 0x0 + +#define PPU_REG_SIZE 0x1000 + +struct sunxi_pck600_desc { + const char * const *pd_names; + unsigned int num_domains; + u32 logic_power_switch0_delay_offset; + u32 logic_power_switch1_delay_offset; + u32 off2on_delay_offset; + u32 device_ctrl0_delay; + u32 device_ctrl1_delay; + u32 logic_power_switch0_delay; + u32 logic_power_switch1_delay; + u32 off2on_delay; +}; + +struct sunxi_pck600_pd { + struct generic_pm_domain genpd; + struct sunxi_pck600 *pck; + void __iomem *base; +}; + +struct sunxi_pck600 { + struct device *dev; + struct genpd_onecell_data genpd_data; + struct sunxi_pck600_pd pds[]; +}; + +#define to_sunxi_pd(gpd) container_of(gpd, struct sunxi_pck600_pd, genpd) + +static int sunxi_pck600_pd_set_power(struct sunxi_pck600_pd *pd, bool on) +{ + struct sunxi_pck600 *pck =3D pd->pck; + struct generic_pm_domain *genpd =3D &pd->genpd; + int ret; + u32 val, reg; + + val =3D on ? PPU_POWER_MODE_ON : PPU_POWER_MODE_OFF; + + reg =3D readl(pd->base + PPU_PWPR); + FIELD_MODIFY(PPU_PWR_STATUS, ®, val); + writel(reg, pd->base + PPU_PWPR); + + /* push write out to hardware */ + reg =3D readl(pd->base + PPU_PWPR); + + ret =3D readl_poll_timeout_atomic(pd->base + PPU_PWSR, reg, + FIELD_GET(PPU_PWR_STATUS, reg) =3D=3D val, + 0, 10000); + if (ret) + dev_err(pck->dev, "failed to turn domain \"%s\" %s: %d\n", + genpd->name, str_on_off(on), ret); + + return ret; +} + +static int sunxi_pck600_power_on(struct generic_pm_domain *domain) +{ + struct sunxi_pck600_pd *pd =3D to_sunxi_pd(domain); + + return sunxi_pck600_pd_set_power(pd, true); +} + +static int sunxi_pck600_power_off(struct generic_pm_domain *domain) +{ + struct sunxi_pck600_pd *pd =3D to_sunxi_pd(domain); + + return sunxi_pck600_pd_set_power(pd, false); +} + +static void sunxi_pck600_pd_setup(struct sunxi_pck600_pd *pd, + const struct sunxi_pck600_desc *desc) +{ + writel(desc->device_ctrl0_delay, pd->base + PPU_DCDR0); + writel(desc->device_ctrl1_delay, pd->base + PPU_DCDR1); + writel(desc->logic_power_switch0_delay, + pd->base + desc->logic_power_switch0_delay_offset); + writel(desc->logic_power_switch1_delay, + pd->base + desc->logic_power_switch1_delay_offset); + writel(desc->off2on_delay, pd->base + desc->off2on_delay_offset); +} + +static int sunxi_pck600_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + const struct sunxi_pck600_desc *desc; + struct genpd_onecell_data *genpds; + struct sunxi_pck600 *pck; + struct reset_control *rst; + struct clk *clk; + void __iomem *base; + int i, ret; + + desc =3D of_device_get_match_data(dev); + + pck =3D devm_kzalloc(dev, struct_size(pck, pds, desc->num_domains), GFP_K= ERNEL); + if (!pck) + return -ENOMEM; + + pck->dev =3D &pdev->dev; + platform_set_drvdata(pdev, pck); + + genpds =3D &pck->genpd_data; + genpds->num_domains =3D desc->num_domains; + genpds->domains =3D devm_kcalloc(dev, desc->num_domains, + sizeof(*genpds->domains), GFP_KERNEL); + if (!genpds->domains) + return -ENOMEM; + + base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + rst =3D devm_reset_control_get_exclusive_released(dev, NULL); + if (IS_ERR(rst)) + return dev_err_probe(dev, PTR_ERR(rst), "failed to get reset control\n"); + + clk =3D devm_clk_get_enabled(dev, NULL); + if (IS_ERR(clk)) + return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n"); + + for (i =3D 0; i < desc->num_domains; i++) { + struct sunxi_pck600_pd *pd =3D &pck->pds[i]; + + pd->genpd.name =3D desc->pd_names[i]; + pd->genpd.power_off =3D sunxi_pck600_power_off; + pd->genpd.power_on =3D sunxi_pck600_power_on; + pd->base =3D base + PPU_REG_SIZE * i; + + sunxi_pck600_pd_setup(pd, desc); + ret =3D pm_genpd_init(&pd->genpd, NULL, false); + if (ret) { + dev_err_probe(dev, ret, "failed to initialize power domain\n"); + goto err_remove_pds; + } + + genpds->domains[i] =3D &pd->genpd; + } + + ret =3D of_genpd_add_provider_onecell(dev_of_node(dev), genpds); + if (ret) { + dev_err_probe(dev, ret, "failed to add PD provider\n"); + goto err_remove_pds; + } + + return 0; + +err_remove_pds: + for (i--; i >=3D 0; i--) + pm_genpd_remove(genpds->domains[i]); + + return ret; +} + +static const char * const sun55i_a523_pck600_pd_names[] =3D { + "VE", "GPU", "VI", "VO0", "VO1", "DE", "NAND", "PCIE" +}; + +static const struct sunxi_pck600_desc sun55i_a523_pck600_desc =3D { + .pd_names =3D sun55i_a523_pck600_pd_names, + .num_domains =3D ARRAY_SIZE(sun55i_a523_pck600_pd_names), + .logic_power_switch0_delay_offset =3D 0xc00, + .logic_power_switch1_delay_offset =3D 0xc04, + .off2on_delay_offset =3D 0xc10, + .device_ctrl0_delay =3D 0xffffff, + .device_ctrl1_delay =3D 0xffff, + .logic_power_switch0_delay =3D 0x8080808, + .logic_power_switch1_delay =3D 0x808, + .off2on_delay =3D 0x8 +}; + +static const struct of_device_id sunxi_pck600_of_match[] =3D { + { + .compatible =3D "allwinner,sun55i-a523-pck-600", + .data =3D &sun55i_a523_pck600_desc, + }, + {} +}; +MODULE_DEVICE_TABLE(of, sunxi_pck600_of_match); + +static struct platform_driver sunxi_pck600_driver =3D { + .probe =3D sunxi_pck600_probe, + .driver =3D { + .name =3D "sunxi-pck-600", + .of_match_table =3D sunxi_pck600_of_match, + /* Power domains cannot be removed if in use. */ + .suppress_bind_attrs =3D true, + }, +}; +module_platform_driver(sunxi_pck600_driver); + +MODULE_DESCRIPTION("Allwinner PCK-600 power domain driver"); +MODULE_AUTHOR("Chen-Yu Tsai "); +MODULE_LICENSE("GPL"); --=20 2.39.5 From nobody Sat Feb 7 13:56:13 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2EEE522129E; Sat, 12 Jul 2025 07:40:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752306046; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1752306045; bh=6uHbo6HUenPSIvGsm+OeKmKy0pXsvQeHi/n/do9ag0k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Yn3HgoY6eLTvQY6S6cDuf2aghwU79S3PZ0Tbv+hkCb9apGhxhd9IPYR6M/x3f/7My idhO6DhRZ8OU/2/HpBZvK3EhRiffItHCh7iZp/hsFB9g/qQlW/4PV1OpvekDx9WRyr wV83uWA0Pvl8w3KB1OQXu4M/GNh6OdWtyy8iCRl30oqWoeAQMW6dZEiRDOokIpANTq uabHlUeX5EHOyBuyRHFhOfft6Wb/nqEL00L4hpOp88XkxN6nb4H7O2q6Sy3j/Rj+Bj JeKxPqbovPxGs/T72Wa1XrISH3Dhj7Wf/SwPqNeexFgVZ2X61SW7iGXpj6/PRVpqz3 37tNPWINycrDg== Received: by wens.tw (Postfix, from userid 1000) id A3B8A5FFD1; Sat, 12 Jul 2025 15:40:42 +0800 (CST) From: Chen-Yu Tsai To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Andre Przywara , linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v3 4/5] pmdomain: sunxi: sun20i-ppu: change to tristate and enable for ARCH_SUNXI Date: Sat, 12 Jul 2025 15:40:20 +0800 Message-Id: <20250712074021.805953-5-wens@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250712074021.805953-1-wens@kernel.org> References: <20250712074021.805953-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen-Yu Tsai There is no reason why the sun20i-ppu cannot be built as a module. So change it to tristate. Also enable it by default for ARCH_SUNXI since this driver is required for some peripherals to work, and update the help text to reflect this requirement. This aligns it with the new PCK-600 driver. Signed-off-by: Chen-Yu Tsai --- Changes since v2: - New patch --- drivers/pmdomain/sunxi/Kconfig | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/pmdomain/sunxi/Kconfig b/drivers/pmdomain/sunxi/Kconfig index eb1ce2dd8e53..858446594c88 100644 --- a/drivers/pmdomain/sunxi/Kconfig +++ b/drivers/pmdomain/sunxi/Kconfig @@ -1,13 +1,15 @@ # SPDX-License-Identifier: GPL-2.0-only =20 config SUN20I_PPU - bool "Allwinner D1 PPU power domain driver" + tristate "Allwinner D1 PPU power domain driver" depends on ARCH_SUNXI || COMPILE_TEST depends on PM + default ARCH_SUNXI select PM_GENERIC_DOMAINS help - Say y to enable the PPU power domain driver. This saves power - when certain peripherals, such as the video engine, are idle. + Say y to enable the PPU power domain driver. This is required + to enable power to certain peripherals, such as the display + engine. =20 config SUN50I_H6_PRCM_PPU tristate "Allwinner H6 PRCM power domain driver" --=20 2.39.5 From nobody Sat Feb 7 13:56:13 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1310A1BEF8C; Sat, 12 Jul 2025 07:40:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752306046; cv=none; b=t5Pi/rvF+SNVbOyT779teoUnABlDeUTIlSP+liB2bTuHDNDaGp2zIF8GVbgSJEujuWiI+tgKBdLER8/3PLxUh+Yx/fgiZZqeFVwaLA0QVioy86WQ7HJ32k0qdOaljQuQPOQ4+h/KKRLR8yaQ4WSbKy+0VEkRb3Y1cnHaGGdsdvE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752306046; c=relaxed/simple; bh=Q6nAgSUeScunA7Cy3L5NXY072V+uXnej/Z2sR3Zl66U=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Shi/wBPklWHBPVjeHnS4hD0+1MXmYVMW/I/WZ6nv+07CRmi4edO2tRBXKESl3amh9XNoqf81vlvjwkNs8B6dyMbc2Fqz1c0RU2ThjIovH82e/yCKiu3C4XYnyrEhjNU1/3VRqWM7Jw1HKHg3YMo0+LdZuAs52r+MOZPCppKVJvA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=jK0Zw/U0; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="jK0Zw/U0" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6C6A2C4CEF4; Sat, 12 Jul 2025 07:40:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1752306045; bh=Q6nAgSUeScunA7Cy3L5NXY072V+uXnej/Z2sR3Zl66U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jK0Zw/U0hjtPWLjojRMurFzl7NBY1lwGSl9bxABYDqnkVy49Y5AbPiq4vmbQcnG0K BVsnmuEznH36Y65UXGM1DHpmPfVhsnWf7gsNwoYpJY6DKr0HfgEnFc3dGOUaQs8A4t kRRa7VKcYRwAQd4M0XIumlRD2KkooOc1PB7uGzkEzIZyKeCkEBjLjnM9JfaMkdzvQ8 Ick0/v0ciqMHuVAMKHGmxd3IOvHnsV4vNmamV/UEITLvKYeVbFPsfhQo2ZYj4Tki7T E/9zs0IdmvmhPs85b+SXWaX5y7K2qCAJ+9zl6Mlwr26Lej9Eiu5XFO66612y46Tlq1 t4F1KIvEqCIrg== Received: by wens.tw (Postfix, from userid 1000) id 9ED7D5FB60; Sat, 12 Jul 2025 15:40:42 +0800 (CST) From: Chen-Yu Tsai To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Andre Przywara , linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v3 5/5] arm64: dts: allwinner: a523: Add power controller device nodes Date: Sat, 12 Jul 2025 15:40:21 +0800 Message-Id: <20250712074021.805953-6-wens@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250712074021.805953-1-wens@kernel.org> References: <20250712074021.805953-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen-Yu Tsai The A523 SoC family has two power controllers, one based on the existing PPU, and one newer one based on ARM's PCK-600. Add device nodes for both of them. Reviewed-by: Andre Przywara Signed-off-by: Chen-Yu Tsai --- Changes since v2: - Fixed pck-600 header path --- arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun55i-a523.dtsi index cf0bc39aab04..2ac6580b2497 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -7,6 +7,8 @@ #include #include #include +#include +#include =20 / { interrupt-parent =3D <&gic>; @@ -576,6 +578,14 @@ mdio0: mdio { }; }; =20 + ppu: power-controller@7001400 { + compatible =3D "allwinner,sun55i-a523-ppu"; + reg =3D <0x07001400 0x400>; + clocks =3D <&r_ccu CLK_BUS_R_PPU1>; + resets =3D <&r_ccu RST_BUS_R_PPU1>; + #power-domain-cells =3D <1>; + }; + r_ccu: clock-controller@7010000 { compatible =3D "allwinner,sun55i-a523-r-ccu"; reg =3D <0x7010000 0x250>; @@ -622,6 +632,14 @@ r_i2c_pins: r-i2c-pins { }; }; =20 + pck600: power-controller@7060000 { + compatible =3D "allwinner,sun55i-a523-pck-600"; + reg =3D <0x07060000 0x8000>; + clocks =3D <&r_ccu CLK_BUS_R_PPU0>; + resets =3D <&r_ccu RST_BUS_R_PPU0>; + #power-domain-cells =3D <1>; + }; + r_i2c0: i2c@7081400 { compatible =3D "allwinner,sun55i-a523-i2c", "allwinner,sun8i-v536-i2c", --=20 2.39.5