From nobody Tue Oct 7 08:58:02 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 312C523B612 for ; Fri, 11 Jul 2025 23:54:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752278049; cv=none; b=QiRwTItFqe86XY7OkGxLJwITlSTcL2P6t30duv7wJBfXTgfRC2dEVtn8yG2dhG5rkpON/FoGKCU/MdhZ1G2EXuVOKsDkiv8cisNWKPiCA7celSUNZLnlrWkhzq06IjkvhrFNCkPqDT9NLznet7yd+n4Va6b3Iw2co90P6ryskCI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752278049; c=relaxed/simple; bh=XU2pP6ae/cniapa1Sz2PaiM0UHpWKJ2gkO0D9MEcsng=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ckX0uh6gNBFqDDmXHlkIAS9D+9b91wCouDukkzeNm22he0oLwDvuFhKcvFafSAQPViq2S3r3vEO6rIEl5vGJKXJ+H6YoiAEy9tLmgko3M2K6SUNsQ5eh17b/dT5eqRQzsFahZVk+aWL+1/MBOYYQyGN+XdtB2bFxIu+0AAtV2xI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=XbHViIue; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XbHViIue" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1752278047; x=1783814047; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XU2pP6ae/cniapa1Sz2PaiM0UHpWKJ2gkO0D9MEcsng=; b=XbHViIueOBB3VeNbIn5zliog+dqT5lfeugig6IY5/WSW8h+y+Z1A4oNn 4jfIBtaMLxMu9ftGRuFy/3qUOAYkiY6RlEmSdHghluBngIQKAX0nNoE9w cLQ+EBV/Rkie+W4kMWN8zoqcMEf4ASGV+RRbOQM1zJNAhhNsu/dVhj4t7 TA0fguyxcLuazKfXWPzl4xl2+L4w1Q9nDpIt/fX1kjKOCf/feu6+qfNcg GterpffNWCEtncuJz79oG3LxxfU6x0Qh/YI7qtOLfcuZf43Q/Y+ycES2s L4rvBnlyLdf+weNeqws6vYn/xXimEcvczcegEJLbcWZsHhThINGYybRz+ w==; X-CSE-ConnectionGUID: mZEqKVdbTEWhqdvUNg1yNQ== X-CSE-MsgGUID: jf3aI3J/TxiKuqhQyJC2KQ== X-IronPort-AV: E=McAfee;i="6800,10657,11491"; a="54292749" X-IronPort-AV: E=Sophos;i="6.16,305,1744095600"; d="scan'208";a="54292749" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jul 2025 16:54:03 -0700 X-CSE-ConnectionGUID: 1bP0pyA4Qk+7iLgnU3Q6Gw== X-CSE-MsgGUID: Zc0DmJRHRX69I64m9D6HVw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,305,1744095600"; d="scan'208";a="155902154" Received: from agluck-desk3.sc.intel.com ([172.25.103.51]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jul 2025 16:54:04 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , Anil Keshavamurthy , Chen Yu Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v7 22/31] x86/resctrl: Read telemetry events Date: Fri, 11 Jul 2025 16:53:29 -0700 Message-ID: <20250711235341.113933-23-tony.luck@intel.com> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20250711235341.113933-1-tony.luck@intel.com> References: <20250711235341.113933-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The resctrl file system passes requests to read event monitor files to the architecture resctrl_arch_rmid_read() to collect values from hardware counters. Use the resctrl resource to differentiate between calls to read legacy L3 events from the new telemetry events (which are attached to RDT_RESOURCE_PERF_PKG). There may be multiple aggregators tracking each package, so scan all of them and add up all counters. Enable the events marked as readable from any CPU providing an mon_evt::arch_priv pointer to the struct pmt_event for each event. At run time when a user reads an event file the file system code provides the enum resctrl_event_id for the event and the arch_priv pointer that was supplied when the event was enabled. Resctrl now uses readq() so depends on X86_64. Update Kconfig. Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/internal.h | 7 ++++ arch/x86/kernel/cpu/resctrl/intel_aet.c | 46 +++++++++++++++++++++++++ arch/x86/kernel/cpu/resctrl/monitor.c | 3 ++ arch/x86/Kconfig | 2 +- 4 files changed, 57 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index 36a2072c19c7..0081fb5a4420 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -172,9 +172,16 @@ void rdt_domain_reconfigure_cdp(struct rdt_resource *r= ); #ifdef CONFIG_X86_RESCTRL_CPU_INTEL_AET bool intel_aet_get_events(void); void __exit intel_aet_exit(void); +int intel_aet_read_event(int domid, int rmid, enum resctrl_event_id evtid, + void *arch_priv, u64 *val); #else static inline bool intel_aet_get_events(void) { return false; } static inline void __exit intel_aet_exit(void) { } +static inline int intel_aet_read_event(int domid, int rmid, enum resctrl_e= vent_id evtid, + void *arch_priv, u64 *val) +{ + return -EINVAL; +} #endif =20 #endif /* _ASM_X86_RESCTRL_INTERNAL_H */ diff --git a/arch/x86/kernel/cpu/resctrl/intel_aet.c b/arch/x86/kernel/cpu/= resctrl/intel_aet.c index f4bf0f2ccf26..bd6011a95d12 100644 --- a/arch/x86/kernel/cpu/resctrl/intel_aet.c +++ b/arch/x86/kernel/cpu/resctrl/intel_aet.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include =20 @@ -213,6 +214,13 @@ static int discover_events(struct event_group *e, stru= ct pmt_feature_group *p) =20 list_add(&e->list, &active_event_groups); =20 + for (int i =3D 0; i < e->num_events; i++) { + enum resctrl_event_id eventid; + + eventid =3D e->evts[i].id; + resctrl_enable_mon_event(eventid, true, e->evts[i].bin_bits, &e->evts[i]= ); + } + return 0; } =20 @@ -279,3 +287,41 @@ void __exit intel_aet_exit(void) list_del(&evg->list); } } + +#define DATA_VALID BIT_ULL(63) +#define DATA_BITS GENMASK_ULL(62, 0) + +/* + * Read counter for an event on a domain (summing all aggregators + * on the domain). + */ +int intel_aet_read_event(int domid, int rmid, enum resctrl_event_id eventi= d, + void *arch_priv, u64 *val) +{ + struct pmt_event *pevt =3D arch_priv; + struct pkg_mmio_info *mmi; + struct event_group *e; + u64 evtcount; + void *pevt0; + int idx; + + pevt0 =3D pevt - pevt->idx; + e =3D container_of(pevt0, struct event_group, evts); + idx =3D rmid * e->num_events; + idx +=3D pevt->idx; + mmi =3D e->pkginfo[domid]; + + if (idx * sizeof(u64) + sizeof(u64) > e->mmio_size) { + pr_warn_once("MMIO index %d out of range\n", idx); + return -EIO; + } + + for (int i =3D 0; i < mmi->num_regions; i++) { + evtcount =3D readq(mmi->addrs[i] + idx * sizeof(u64)); + if (!(evtcount & DATA_VALID)) + return -EINVAL; + *val +=3D evtcount & DATA_BITS; + } + + return 0; +} diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index 185b203f6321..51d7d99336c6 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -232,6 +232,9 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, stru= ct rdt_domain_hdr *hdr, =20 resctrl_arch_rmid_read_context_check(); =20 + if (r->rid =3D=3D RDT_RESOURCE_PERF_PKG) + return intel_aet_read_event(hdr->id, rmid, eventid, arch_priv, val); + if (r->rid !=3D RDT_RESOURCE_L3) return -EINVAL; =20 diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 21c2d1022b15..512286ef6d71 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -530,7 +530,7 @@ config X86_CPU_RESCTRL =20 config X86_RESCTRL_CPU_INTEL_AET bool "Intel Application Energy Telemetry" if INTEL_PMT_DISCOVERY=3Dy - depends on X86_CPU_RESCTRL && CPU_SUP_INTEL + depends on X86_64 && X86_CPU_RESCTRL && CPU_SUP_INTEL help Enable per-RMID telemetry events in resctrl =20 --=20 2.50.0