From nobody Tue Oct 7 08:53:17 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 20DF92F50A6 for ; Fri, 11 Jul 2025 18:37:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752259055; cv=none; b=NrMdGAIsU6gvlg3NsDRnqlAzTwpDTGYNo92FJUx90qjXdx/+flxzAeB+8JhtHLx5f5PbiNLkYiPZ251GqilTXQ8JzQfL0GpCnsHodgMxUujEUGZ0pvR9fOhK/v+aaOLg1wLZyUsa9lAkMp96Pqh3kq17ZNzZYX3HkdcKUPbnGEI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752259055; c=relaxed/simple; bh=fB/Mac7dloTJr+URythrGwfMFmVqdLQ+Qxj5a4PU3mY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=kQVfBvz/p8gEs1xOYaKXY/oppYJfzPUdgSRSOCPPsqHrKDtWdKlOAe3/3CUz+tq77WQsxBP2d8SUTNA75MHEpqlPtFbgzKTxhDJPaLvjVQWAyQkhy/zjWMxQxzzRmxPS8iAfrOXOkdD7i7nqCW7PIIQp4+7bDxmI3fxWMJFaTcc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EBFB12247; Fri, 11 Jul 2025 11:37:22 -0700 (PDT) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 85B573F694; Fri, 11 Jul 2025 11:37:30 -0700 (PDT) From: James Morse To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Ben Horgan , Rohit Mathew , Shanker Donthineni , Zeng Heng , Lecopzer Chen , Carl Worth , shameerali.kolothum.thodi@huawei.com, D Scott Phillips OS , lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Rex Nie , Dave Martin , Koba Ko , James Morse Subject: [RFC PATCH 09/36] arm64: kconfig: Add Kconfig entry for MPAM Date: Fri, 11 Jul 2025 18:36:21 +0000 Message-Id: <20250711183648.30766-10-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20250711183648.30766-1-james.morse@arm.com> References: <20250711183648.30766-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The bulk of the MPAM driver lives outside the arch code because it largely manages MMIO devices that generate interrupts. The driver needs a Kconfig symbol to enable it, as MPAM is only found on arm64 platforms, that is where the Kconfig option makes the most sense. This Kconfig option will later be used by the arch code to enable or disable the MPAM context-switch code, and registering the CPUs properties with the MPAM driver. Signed-off-by: James Morse Reviewed-by: Jonathan Cameron --- arch/arm64/Kconfig | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 55fc331af337..5f08214537d0 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2058,6 +2058,23 @@ config ARM64_TLB_RANGE ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a range of input addresses. =20 +config ARM64_MPAM + bool "Enable support for MPAM" + help + Memory Partitioning and Monitoring is an optional extension + that allows the CPUs to mark load and store transactions with + labels for partition-id and performance-monitoring-group. + System components, such as the caches, can use the partition-id + to apply a performance policy. MPAM monitors can use the + partition-id and performance-monitoring-group to measure the + cache occupancy or data throughput. + + Use of this extension requires CPU support, support in the + memory system components (MSC), and a description from firmware + of where the MSC are in the address space. + + MPAM is exposed to user-space via the resctrl pseudo filesystem. + endmenu # "ARMv8.4 architectural features" =20 menu "ARMv8.5 architectural features" --=20 2.39.5