From nobody Tue Oct 7 08:35:49 2025 Received: from out-171.mta1.migadu.com (out-171.mta1.migadu.com [95.215.58.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C78D72DCF6C for ; Fri, 11 Jul 2025 14:21:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752243721; cv=none; b=mYq52/WG7NprrIg8lhZ+AJ566hRqoAarfGQi5duYgzbaPhOIcoi4rAwOkh4HW6R4mj6j6WG5RhsyewsrFrkKLxXc3RMqYXLg67ka5zt4be4muv1DY3/3iOgHvBytgrH0mn6nGvxDKqTonDFGVhVkhsC9sA8Dhtk03bqKcu3Uk3o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752243721; c=relaxed/simple; bh=kqTyx3YtUrbH3F2LDtcHzUbTPg5QBCZ0+M7V2AskFmA=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=J4L0k2p2eqPTkTuRY4TpSDfw8M3+h4Q4ryhMqxgoQ7UUGvK5/AMYYdE1nayRcrAFJ+QHPziZIUFsSsvmvG1Y5TAOylt9iUzBRXEpBlC/g/g2aaIVO21hT/AQal911JhUZ37wjUbIRxr+dgKfC2I/6J+JJzLgcBMVygSgIC/wHUM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=cknow.org; spf=pass smtp.mailfrom=cknow.org; dkim=pass (2048-bit key) header.d=cknow.org header.i=@cknow.org header.b=Lg5ijLxO; arc=none smtp.client-ip=95.215.58.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=cknow.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cknow.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cknow.org header.i=@cknow.org header.b="Lg5ijLxO" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cknow.org; s=key1; t=1752243715; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=dhtbCU3GSz2mEXV2JGmRz2FQjficBt4XaAng4rRz9xo=; b=Lg5ijLxO5CRdonuTMfVh2iFNTsNoo2FIm5duJWI8gUfMuR2Bqp0Ouoql8t8y8woakXJqf6 J1nUXUX/uEN47Dn/ddcfqA1zfk/F8U6dPoCltAT9zwjL86Iv0q4nJAG0xdcOMw52fwzcWF gZOugybV2W0FrVZbF35XoUoWeG9Du6Fl8y3aPoMnVlPQK2t5B/y9EQqkK2IkToQoTUQqqZ wtbLxp/eiSnvAJ6i02TlLOjtVu3CRZrkwGL2TfBYcT8nRDWFbfddTefKRjDs26GK4wRUOF c8mnidSdNzSl9ti5K23O3vOZMZy0YFuY2YPTqNQbeKkctXD1RhKNuDMizKBINw== From: Diederik de Haas To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Diederik de Haas Subject: [PATCH v2] arm64: dts: rockchip: Add reset button to NanoPi R5S Date: Fri, 11 Jul 2025 16:20:37 +0200 Message-ID: <20250711142138.197445-1-didi.debian@cknow.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" The NanoPi R5S LTS version has a reset button, which is connected via GPIO. Note that the non-LTS version does not have the reset button and therefore on page 19 of the schematic version 2204 it is marked 'NC', but it is connected on the LTS version. Signed-off-by: Diederik de Haas --- Changes in v2: - add 'pin' suffix to pinctrl nodes names/labels .../boot/dts/rockchip/rk3568-nanopi-r5s.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-nanopi-r5s.dts index 3b31f0dd8f3b..c12bd01e2805 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts @@ -17,6 +17,19 @@ aliases { ethernet0 =3D &gmac0; }; =20 + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-0 =3D <&gpio4_a0_k1_pin>; + pinctrl-names =3D "default"; + + button-reset { + debounce-interval =3D <50>; + gpios =3D <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + label =3D "RESET"; + linux,code =3D ; + }; + }; + gpio-leds { compatible =3D "gpio-leds"; pinctrl-names =3D "default"; @@ -127,6 +140,12 @@ eth_phy0_reset_pin: eth-phy0-reset-pin { }; }; =20 + gpio-keys { + gpio4_a0_k1_pin: gpio4-a0-k1-pin { + rockchip,pins =3D <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + gpio-leds { lan1_led_pin: lan1-led-pin { rockchip,pins =3D <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; --=20 2.50.0