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charset="utf-8" Serial engines 2 and 3 on the IPQ5424 support I2C. The I2C instance operates on serial engine 2, designated as i2c0, and on serial engine 3, designated as i2c1. Add both the i2c0 and i2c1 nodes. Signed-off-by: Manikanta Mylavarapu --- arch/arm64/boot/dts/qcom/ipq5424.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qc= om/ipq5424.dtsi index 66bd2261eb25..858b9c714a13 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi @@ -425,6 +425,28 @@ uart1: serial@1a84000 { interrupts =3D ; }; =20 + i2c0: i2c@1a88000 { + compatible =3D "qcom,geni-i2c"; + reg =3D <0 0x01a88000 0 0x4000>; + clocks =3D <&gcc GCC_QUPV3_I2C0_CLK>; + clock-names =3D "se"; + interrupts =3D ; + assigned-clocks =3D <&gcc GCC_QUPV3_I2C0_CLK>; + assigned-clock-rates =3D <64000000>; + status =3D "disabled"; + }; + + i2c1: i2c@1a8c000 { + compatible =3D "qcom,geni-i2c"; + reg =3D <0 0x01a8c000 0 0x4000>; + clocks =3D <&gcc GCC_QUPV3_I2C1_CLK>; + clock-names =3D "se"; + interrupts =3D ; + assigned-clocks =3D <&gcc GCC_QUPV3_I2C1_CLK>; + assigned-clock-rates =3D <64000000>; + status =3D "disabled"; + }; + spi0: spi@1a90000 { compatible =3D "qcom,geni-spi"; reg =3D <0 0x01a90000 0 0x4000>; base-commit: 58ba80c4740212c29a1cf9b48f588e60a7612209 --=20 2.34.1